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1. 发明授权

US10403636B2 Semiconductor memory device and method for manufacturing the same 有权
公开(公告)号：US10403636B2
公开(公告)日：2019-09-03
申请号：US15263464
申请日：2016-09-13
申请人： Toshiba Memory Corporation
发明人： Hideki Inokuma , Osamu Matsuura , Masanari Fujita
IPC分类号： H01L27/115 , H01L21/311 , H01L21/28 , H01L27/11582 , H01L27/11565 , H01L27/11575
摘要： A semiconductor memory device according to the embodiment includes a substrate, electrodes, at least one pillar structure, at least one charge storage film, and at least one insulating member. The electrodes are provided on the substrate, are separately stacked each other, and constitute a stacked body. The electrodes have a first width in a first direction along a surface of the substrate and include a portion extending in a second direction crossing the first direction along the surface. The pillar structure is provided in the stacked body and includes a semiconductor layer extending in a stacking direction of the stacked body. The charge storage film is provided between the semiconductor layer and the electrodes. The insulating member has a width in the first direction smaller than the first width, pierces the electrodes, and is provided to extend in the stacking direction.

2. 发明授权

US10199498B2 Semiconductor memory device 有权
公开(公告)号：US10199498B2
公开(公告)日：2019-02-05
申请号：US15262433
申请日：2016-09-12
申请人： TOSHIBA MEMORY CORPORATION
发明人： Osamu Matsuura , Hideki Inokuma , Masanari Fujita
IPC分类号： H01L29/78 , H01L27/1157 , H01L27/11582
摘要： According to one embodiment, a semiconductor memory device includes a substrate, a stacked body, a pillar structure, at least one charge storage film, and a first electrode. The stacked body includes electrode films stacked separately from each other. The pillar structure is provided in the stacked body and includes a semiconductor layer extending in stacking direction of the stacked body. The charge storage film is provided between the semiconductor layer and the electrode films. The first electrode is provided in the stacked body, spreads in the stacking direction and a first direction along a surface of the substrate, and contacting the substrate. The first electrode includes a first portion containing a material having conductivity and a second portion containing a material that a linear expansion coefficient is lower than a linear expansion coefficient of silicon, and positioned at a substrate side than the first portion in the stacking direction.

3. 发明授权

US10074665B2 Three-dimensional semiconductor memory device including slit with lateral surfaces having periodicity 有权
公开(公告)号：US10074665B2
公开(公告)日：2018-09-11
申请号：US15257613
申请日：2016-09-06
申请人： Toshiba Memory Corporation
发明人： Genki Kawaguchi , Masanori Fujita , Hideki Inokuma , Osamu Matsuura , Takeshi Imamura , Hideo Wada , Makoto Watanabe , Hajime Kaneko , Kenichi Fujii , Takanobu Itoh
IPC分类号： H01L29/792 , H01L27/11582 , H01L27/11565
CPC分类号： H01L27/11582 , H01L27/11565
摘要： According to one embodiment, it includes a stacked body including N-number of layers (N is an integer of 2 or more) stacked on a semiconductor substrate, opening portions penetrating the stacked body in a stacking direction, columnar bodies respectively disposed in the opening portions, and a slit dividing M-number of layers (M is an integer of 1 or more and (N−2) or less) of the stacked body in a horizontal direction from above, wherein the slit is formed with lateral surfaces respectively having a spatial periodicity in a horizontal plane.

4. 发明授权

US10797077B2 Three-dimensional semiconductor memory device including slit with lateral surfaces having periodicity 有权
公开(公告)号：US10797077B2
公开(公告)日：2020-10-06
申请号：US16701981
申请日：2019-12-03
申请人： Toshiba Memory Corporation
发明人： Genki Kawaguchi , Masanari Fujita , Hideki Inokuma , Osamu Matsuura , Takeshi Imamura , Hideo Wada , Makoto Watanabe , Hajime Kaneko , Kenichi Fujii , Takanobu Itoh
IPC分类号： H01L27/11582 , H01L27/11565
摘要： According to one embodiment, it includes a stacked body including N-number of layers (N is an integer of 2 or more) stacked on a semiconductor substrate, opening portions penetrating the stacked body in a stacking direction, columnar bodies respectively disposed in the opening portions, and a slit dividing M-number of layers (M is an integer of 1 or more and (N−2) or less) of the stacked body in a horizontal direction from above, wherein the slit is formed with lateral surfaces respectively having a spatial periodicity in a horizontal plane.

5. 发明授权

US10790229B2 Semiconductor memory device 有权
公开(公告)号：US10790229B2
公开(公告)日：2020-09-29
申请号：US16115844
申请日：2018-08-29
申请人： Toshiba Memory Corporation
发明人： Kenta Yoshinaga , Hideki Inokuma , Hisashi Kato , Masakazu Sawano
IPC分类号： H01L23/528 , H01L29/792 , H01L27/10 , H01L21/02
摘要： A semiconductor memory device according to an embodiment includes a substrate; a plate-like first conductivity layer provided above the substrate and extending parallel to a substrate plane to bestride first and second regions; a plate-like second conductivity layer provided above the first conductivity layer to be separated from the first conductivity layer, an end portion of the first conductivity layer has a protruding staircase shape in the first region, the second conductivity layer extending parallel to the first conductivity layer to bestride the first and second regions; a first contact connected to the first conductivity layer at a side surface or a bottom surface of the first conductivity layer and extending from the first conductivity layer toward the substrate, the first contact being connected at a position where the end portion of the first conductivity layer in the first region protrudes, and a diameter size of a portion of the first contact connected at a side surface or a bottom surface of the first conductivity layer having a maximum diameter size; a second contact connected to the second conductivity layer at a side surface or a bottom surface of the second conductivity layer in the first region and extending from the second conductivity layer toward the substrate to penetrate the first conductivity layer, a diameter size of a portion of the second contact connected at a side surface or a bottom surface of the second conductivity layer having a maximum diameter size; a channel body penetrating the first and second conductivity layers in the second region; and a memory film including a charge accumulation portion provided between the first and second conductivity layers and the channel body in the second region.

6. 发明授权

US10541251B2 Three-dimensional semiconductor memory device including slit with lateral surfaces having periodicity 有权
公开(公告)号：US10541251B2
公开(公告)日：2020-01-21
申请号：US16042424
申请日：2018-07-23
申请人： Toshiba Memory Corporation
发明人： Genki Kawaguchi , Masanari Fujita , Hideki Inokuma , Osamu Matsuura , Takeshi Imamura , Hideo Wada , Makoto Watanabe , Hajime Kaneko , Kenichi Fujii , Takanobu Itoh
IPC分类号： H01L29/792 , H01L27/11582 , H01L27/11565
摘要： According to one embodiment, it includes a stacked body including N-number of layers (N is an integer of 2 or more) stacked on a semiconductor substrate, opening portions penetrating the stacked body in a stacking direction, columnar bodies respectively disposed in the opening portions, and a slit dividing M-number of layers (M is an integer of 1 or more and (N−2) or less) of the stacked body in a horizontal direction from above, wherein the slit is formed with lateral surfaces respectively having a spatial periodicity in a horizontal plane.

7. 发明申请

US20190393236A1 SEMICONDUCTOR MEMORY DEVICE 审中-公开
公开(公告)号：US20190393236A1
公开(公告)日：2019-12-26
申请号：US16129101
申请日：2018-09-12
申请人： TOSHIBA MEMORY CORPORATION
发明人： Hajime Kaneko , Takuya Inatsuka , Hideki Inokuma
IPC分类号： H01L27/11582 , H01L27/11573 , H01L27/1157
摘要： A semiconductor memory device includes a first member spreading along a first direction and a second direction, a stacked body provided on a third-direction side when viewed from the first member, and a second member provided inside the first member and exposed at a surface of the first member on the third-direction side. A configuration of an end portion in the first direction of the stacked body is a staircase configuration having terraces formed every conductive film. The second member is made from a material different from a material of the first member. The second member is totally disposed in a region opposing a total length of an end edge of the stacked body on the first-direction side, and not disposed in an outer region of the stacked body on the second-direction side.

8. 发明授权

US10483124B2 Semiconductor device 有权
公开(公告)号：US10483124B2
公开(公告)日：2019-11-19
申请号：US16126055
申请日：2018-09-10
申请人： Toshiba Memory Corporation
发明人： Masakazu Sawano , Takahiro Tomimatsu , Junichi Shibata , Hideki Inokuma , Hisashi Kato , Kenta Yoshinaga
IPC分类号： H01L23/48 , H01L29/40 , H01L21/311 , H01L27/11519 , H01L27/11582 , H01L27/11556 , H01L27/11565 , H01L27/11575 , H01L27/11548
摘要： According to one embodiment, a semiconductor device includes: a first stack above a substrate and including insulation layers and conductive layers alternately stacked in a first direction, the first stack including a staircase-shaped portion in an end portion of the first stack in a second direction parallel to a main face of the substrate, the staircase-shaped portion including steps and terraces corresponding to the conductive layers, at least a part of the steps having arc shape curved along a third direction crossing the second direction; and a second stack above the substrate and including first and second layers stacked in the first direction. In the second and/or third direction, a dimension of the first stack is larger than a dimension of the second stack.

9. 发明申请

US20190287903A1 SEMICONDUCTOR MEMORY DEVICE 审中-公开
公开(公告)号：US20190287903A1
公开(公告)日：2019-09-19
申请号：US16115844
申请日：2018-08-29
申请人： Toshiba Memory Corporation
发明人： Kenta Yoshinaga , Hideki Inokuma , Hisashi Kato , Masakazu Sawano
IPC分类号： H01L23/528 , H01L21/02 , H01L27/10 , H01L29/792
摘要： A semiconductor memory device according to an embodiment includes a substrate; a plate-like first conductivity layer provided above the substrate and extending parallel to a substrate plane to bestride first and second regions; a plate-like second conductivity layer provided above the first conductivity layer to be separated from the first conductivity layer, an end portion of the first conductivity layer has a protruding staircase shape in the first region, the second conductivity layer extending parallel to the first conductivity layer to bestride the first and second regions; a first contact connected to the first conductivity layer at a side surface or a bottom surface of the first conductivity layer and extending from the first conductivity layer toward the substrate, the first contact being connected at a position where the end portion of the first conductivity layer in the first region protrudes, and a diameter size of a portion of the first contact connected at a side surface or a bottom surface of the first conductivity layer having a maximum diameter size; a second contact connected to the second conductivity layer at a side surface or a bottom surface of the second conductivity layer in the first region and extending from the second conductivity layer toward the substrate to penetrate the first conductivity layer, a diameter size of a portion of the second contact connected at a side surface or a bottom surface of the second conductivity layer having a maximum diameter size; a channel body penetrating the first and second conductivity layers in the second region; and a memory film including a charge accumulation portion provided between the first and second conductivity layers and the channel body in the second region.

10. 发明授权

US10535678B1 Semiconductor memory device 有权
公开(公告)号：US10535678B1
公开(公告)日：2020-01-14
申请号：US16129101
申请日：2018-09-12
申请人： TOSHIBA MEMORY CORPORATION
发明人： Hajime Kaneko , Takuya Inatsuka , Hideki Inokuma
IPC分类号： H01L27/1157 , H01L27/11582 , H01L27/11573 , H01L27/11524
摘要： A semiconductor memory device includes a first member spreading along a first direction and a second direction, a stacked body provided on a third-direction side when viewed from the first member, and a second member provided inside the first member and exposed at a surface of the first member on the third-direction side. A configuration of an end portion in the first direction of the stacked body is a staircase configuration having terraces formed every conductive film. The second member is made from a material different from a material of the first member. The second member is totally disposed in a region opposing a total length of an end edge of the stacked body on the first-direction side, and not disposed in an outer region of the stacked body on the second-direction side.

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