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1. 发明授权

US08928426B2 Reducing coupling coefficient variation by using capacitors 有权
标题翻译：通过使用电容降低耦合系数变化
公开(公告)号：US08928426B2
公开(公告)日：2015-01-06
申请号：US13194864
申请日：2011-07-29
申请人： Yang Li , Xuanang Zhu , Dinhphuoc V. Hoang , Guohao Zhang , Russ Reisner , Dmitri Prikhodko , Jiunn-Sheng Guo , Bradley D. Scoles , David Viveiros
发明人： Yang Li , Xuanang Zhu , Dinhphuoc V. Hoang , Guohao Zhang , Russ Reisner , Dmitri Prikhodko , Jiunn-Sheng Guo , Bradley D. Scoles , David Viveiros
IPC分类号： H01P5/18
CPC分类号： H01P5/184 , H01P5/185 , H01P5/187 , Y10T29/49002 , Y10T29/49169 , Y10T29/49208
摘要： A coupler is presented that has high-directivity and low coupling coefficient variation. The coupler includes a first trace associated with a first port and a second port. The first port is configured substantially as an input port and the second port is configured substantially as an output port. The coupler further includes a second trace associated with a third port and a fourth port. The third port is configured substantially as a coupled port and the fourth port is configured substantially as an isolated port. In addition, the coupler includes a first capacitor configured to introduce a discontinuity to induce a mismatch in the coupler.
摘要翻译：提出了具有高方向性和低耦合系数变化的耦合器。耦合器包括与第一端口和第二端口相关联的第一迹线。第一端口被配置为基本上作为输入端口，并且第二端口基本上被配置为输出端口。耦合器还包括与第三端口和第四端口相关联的第二迹线。第三端口基本上配置为耦合端口，第四端口基本上被配置为隔离端口。另外，耦合器包括被配置为引入不连续性以引起耦合器中的失配的第一电容器。

2. 发明授权

US08941449B2 Reducing coupling coefficient variation by using angled connecting traces 有权
标题翻译：通过使用倾斜的连接迹线来减少耦合系数变化
公开(公告)号：US08941449B2
公开(公告)日：2015-01-27
申请号：US13194863
申请日：2011-07-29
申请人： Yang Li , Xuanang Zhu , Dinhphuoc V. Hoang , Guohao Zhang , Russ Reisner , Dmitri Prikhodko , Jiunn-Sheng Guo , Bradley D. Scoles , David Viveiros, Jr.
发明人： Yang Li , Xuanang Zhu , Dinhphuoc V. Hoang , Guohao Zhang , Russ Reisner , Dmitri Prikhodko , Jiunn-Sheng Guo , Bradley D. Scoles , David Viveiros, Jr.
IPC分类号： H01P5/18
CPC分类号： H01P5/184 , H01P5/185 , H01P5/187 , Y10T29/49002 , Y10T29/49169 , Y10T29/49208
摘要： A coupler is presented that has high-directivity and low coupling coefficient variation. The coupler includes a first trace associated with a first port and a second port. The first trace includes a first main arm, a first connecting trace connecting the first main arm to the second port, and a non-zero angle between the first main arm and the first connecting trace. Further, the coupler includes a second trace associated with a third port and a fourth port. The second trace includes a second main arm.
摘要翻译：提出了具有高方向性和低耦合系数变化的耦合器。耦合器包括与第一端口和第二端口相关联的第一迹线。第一迹线包括第一主臂，将第一主臂连接到第二端口的第一连接迹线以及第一主臂与第一连接迹线之间的非零角度。此外，耦合器包括与第三端口和第四端口相关联的第二跟踪。第二迹线包括第二主臂。

3. 发明申请

US20120038433A1 REDUCING COUPLING COEFFICIENT VARIATION BY USING ANGLED CONNECTING TRACES 有权
标题翻译：通过使用ANGED连接轨迹降低耦合系数变化
公开(公告)号：US20120038433A1
公开(公告)日：2012-02-16
申请号：US13194863
申请日：2011-07-29
申请人： Yang Li , Xuanang Zhu , Dinhphuoc V. Hoang , Guohao Zhang , Russ Reisner , Dmitri Prikhodko , Jiunn-Sheng Guo , Bradley D. Scoles , David Viveiros, JR.
发明人： Yang Li , Xuanang Zhu , Dinhphuoc V. Hoang , Guohao Zhang , Russ Reisner , Dmitri Prikhodko , Jiunn-Sheng Guo , Bradley D. Scoles , David Viveiros, JR.
IPC分类号： H01P5/18 , H01R43/20
CPC分类号： H01P5/184 , H01P5/185 , H01P5/187 , Y10T29/49002 , Y10T29/49169 , Y10T29/49208
摘要： A coupler is presented that has high-directivity and low coupling coefficient variation. The coupler includes a first trace associated with a first port and a second port. The first trace includes a first main arm, a first connecting trace connecting the first main arm to the second port, and a non-zero angle between the first main arm and the first connecting trace. Further, the coupler includes a second trace associated with a third port and a fourth port. The second trace includes a second main arm.
摘要翻译：提出了具有高方向性和低耦合系数变化的耦合器。耦合器包括与第一端口和第二端口相关联的第一迹线。第一迹线包括第一主臂，将第一主臂连接到第二端口的第一连接迹线以及第一主臂与第一连接迹线之间的非零角度。此外，耦合器包括与第三端口和第四端口相关联的第二跟踪。第二迹线包括第二主臂。

4. 发明申请

US20120032735A1 REDUCING COUPLING COEFFICIENT VARIATION BY USING CAPACITORS 有权
标题翻译：通过使用电容降低耦合系数变化
公开(公告)号：US20120032735A1
公开(公告)日：2012-02-09
申请号：US13194864
申请日：2011-07-29
申请人： Yang Li , Xuanang Zhu , Dinhphuoc V. Hoang , Guohao Zhang , Russ Reisner , Dmitri Prikhodko , Jiunn-Sheng Guo , Bradley D. Scoles , David Viveiros, JR.
发明人： Yang Li , Xuanang Zhu , Dinhphuoc V. Hoang , Guohao Zhang , Russ Reisner , Dmitri Prikhodko , Jiunn-Sheng Guo , Bradley D. Scoles , David Viveiros, JR.
IPC分类号： H01L25/00 , H01R43/00 , H01P5/12
CPC分类号： H01P5/184 , H01P5/185 , H01P5/187 , Y10T29/49002 , Y10T29/49169 , Y10T29/49208
摘要： A coupler is presented that has high-directivity and low coupling coefficient variation. The coupler includes a first trace associated with a first port and a second port. The first port is configured substantially as an input port and the second port is configured substantially as an output port. The coupler further includes a second trace associated with a third port and a fourth port. The third port is configured substantially as a coupled port and the fourth port is configured substantially as an isolated port. In addition, the coupler includes a first capacitor configured to introduce a discontinuity to induce a mismatch in the coupler.
摘要翻译：提出了具有高方向性和低耦合系数变化的耦合器。耦合器包括与第一端口和第二端口相关联的第一迹线。第一端口被配置为基本上作为输入端口，并且第二端口基本上被配置为输出端口。耦合器还包括与第三端口和第四端口相关联的第二迹线。第三端口基本上配置为耦合端口，第四端口基本上被配置为隔离端口。另外，耦合器包括被配置为引入不连续性以引起耦合器中的失配的第一电容器。

5. 发明申请

US20080007369A1 Bulk acoustic wave filter with reduced nonlinear signal distortion 有权
标题翻译：具有降低的非线性信号失真的体声波滤波器
公开(公告)号：US20080007369A1
公开(公告)日：2008-01-10
申请号：US11484042
申请日：2006-07-10
申请人： Bradley Barber , Sahana Kenchappa , Russ Reisner
发明人： Bradley Barber , Sahana Kenchappa , Russ Reisner
IPC分类号： H03H9/58
CPC分类号： H03H9/605 , H03H9/02086
摘要： A filter circuit includes at least one series resonator having a first terminal and a second terminal, where the first and second terminals of the at least one series resonator are coupled to an input and an output of the filter circuit, respectively. The filter circuit further includes at least one shunt resonator having a first terminal and a second terminal, where the first terminal of the at least one shunt resonator is coupled to the input of the filter circuit and the second terminal of the at least one shunt resonator is coupled to ground. A polarity of the first terminal of the at least one series resonator and a polarity of the first terminal of the at least one shunt resonator are selected so as to reduce harmonic signal generation and other types of distortion in the filter circuit.
摘要翻译：滤波器电路包括至少一个具有第一端子和第二端子的串联谐振器，其中至少一个串联谐振器的第一和第二端子分别耦合到滤波器电路的输入端和输出端。滤波器电路还包括具有第一端子和第二端子的至少一个并联谐振器，其中至少一个并联谐振器的第一端子耦合到滤波器电路的输入端并且至少一个并联谐振器的第二端子耦合到地面。选择至少一个串联谐振器的第一端子的极性和至少一个并联谐振器的第一端子的极性，以便减少滤波器电路中的谐波信号产生和其它类型的失真。

6. 发明授权

US5304944A High frequency linearizer 失效
标题翻译：高频线性化器
公开(公告)号：US5304944A
公开(公告)日：1994-04-19
申请号：US958619
申请日：1992-10-09
申请人： Wilbert Copeland , Russ Reisner
发明人： Wilbert Copeland , Russ Reisner
IPC分类号： H03F1/32
CPC分类号： H03F1/3241
摘要： A linearizer particularly valuable for millimeter wave satellite communications is disclosed. A satellite (12) divides signal into linear (20) and nonlinear (32) paths which are converted to finline. A pair of beamlead PIN diodes (48) and a pair of varactor diodes (52) extend across the finline linear path to constitute an attenuator and phase shifter. A pair of anti-parallel Schottky diodes (60) and a pair of PIN diodes (64) extend across the nonlinear path to constitute a limiter and an attenuator. A combiner (30) combines the linear and nonlinear signals for input to an amplifier.
摘要翻译：公开了对毫米波卫星通信特别有价值的线性化装置。卫星（12）将信号划分为线性（20）和非线性（32）路径，转换成finline。一对光束PIN二极管（48）和一对变容二极管（52）延伸穿过细线线路径以构成衰减器和移相器。一对反并联肖特基二极管（60）和一对PIN二极管（64）跨越非线性路径延伸以构成限幅器和衰减器。组合器（30）将用于输入的线性和非线性信号组合到放大器。

7. 发明授权

US08299572B2 Semiconductor die with backside passive device integration 有权
标题翻译：半导体芯片具有背面无源器件集成
公开(公告)号：US08299572B2
公开(公告)日：2012-10-30
申请号：US12156988
申请日：2008-06-06
申请人： Russ Reisner
发明人： Russ Reisner
IPC分类号： H01L27/08
CPC分类号： H01L27/0694 , H01L23/481 , H01L2924/0002 , H01L2924/09701 , H01L2924/00012 , H01L2924/00
摘要： According to an exemplary embodiment, a semiconductor die includes a backside surface opposite an active surface. The active surface includes at least one active device. The semiconductor die includes at least one passive device situated on the backside surface. The semiconductor die further includes an interconnect region situated over the active surface. The semiconductor die further includes at least one through-wafer via, where the at least one through-wafer via electrically connects the at least one passive device to the interconnect region. The interconnect region can include a number of solder bump pads or a number of bond pads.
摘要翻译：根据示例性实施例，半导体管芯包括与有源表面相对的背面。活动表面包括至少一个有效装置。半导体管芯包括位于背面上的至少一个无源器件。半导体管芯还包括位于有源表面上的互连区域。半导体管芯还包括至少一个贯通晶片通孔，其中至少一个贯通晶片通孔将至少一个无源器件电连接到互连区域。互连区域可以包括多个焊料凸块焊盘或多个焊盘。

8. 发明申请

US20080315356A1 Semiconductor die with backside passive device integration 有权
标题翻译：半导体芯片具有背面无源器件集成
公开(公告)号：US20080315356A1
公开(公告)日：2008-12-25
申请号：US12156988
申请日：2008-06-06
申请人： Russ Reisner
发明人： Russ Reisner
IPC分类号： H01L27/06
CPC分类号： H01L27/0694 , H01L23/481 , H01L2924/0002 , H01L2924/09701 , H01L2924/00012 , H01L2924/00
摘要： According to an exemplary embodiment, a semiconductor die includes a backside surface opposite an active surface. The active surface includes at least one active device. The semiconductor die includes at least one passive device situated on the backside surface. The semiconductor die further includes an interconnect region situated over the active surface. The semiconductor die further includes at least one through-wafer via, where the at least one through-wafer via electrically connects the at least one passive device to the interconnect region. The interconnect region can include a number of solder bump pads or a number of bond pads.
摘要翻译：根据示例性实施例，半导体管芯包括与有源表面相对的背面。活动表面包括至少一个有效装置。半导体管芯包括位于背面上的至少一个无源器件。半导体管芯还包括位于有源表面上的互连区域。半导体管芯还包括至少一个贯通晶片通孔，其中至少一个贯通晶片通孔将至少一个无源器件电连接到互连区域。互连区域可以包括多个焊料凸块焊盘或多个焊盘。

9. 发明申请

US20080217708A1 Integrated passive cap in a system-in-package 审中-公开
标题翻译：集成无源封装在系统级封装中
公开(公告)号：US20080217708A1
公开(公告)日：2008-09-11
申请号：US12006945
申请日：2008-01-08
申请人： Russ Reisner , Steve X. Liang , Sandra L. Petty-Weeks , Howard Chen , Ryan C. Lee
发明人： Russ Reisner , Steve X. Liang , Sandra L. Petty-Weeks , Howard Chen , Ryan C. Lee
IPC分类号： H01L29/84 , H01L21/52
CPC分类号： H01L23/3121 , H01L23/315 , H01L23/645 , H01L24/45 , H01L24/48 , H01L25/18 , H01L28/10 , H01L2224/45144 , H01L2224/4813 , H01L2224/73265 , H01L2924/01079 , H01L2924/09701 , H01L2924/12044 , H01L2924/14 , H01L2924/1461 , H01L2924/16235 , H01L2924/181 , H01L2924/19041 , H01L2924/00 , H01L2924/00014 , H01L2924/00012
摘要： According to an exemplary embodiment, a system-in-package includes at least one semiconductor die situated over a package substrate. The system-in-package further includes a wall structure situated on the at least one semiconductor die. The system-in-package further includes an integrated passive cap situated over the wall structure, where the integrated passive cap includes at least one passive component. The wall structure and the integrated passive cap form an air cavity over the at least one semiconductor die. The system-in-package can further include at least one bond pad situated on a cap substrate. The at least one bond pad on the cap substrate of the integrated passive cap can be electrically connected to a substrate bond pad on the package substrate.
摘要翻译：根据示例性实施例，系统级封装包括位于封装衬底上的至少一个半导体管芯。所述系统级封装还包括位于所述至少一个半导体管芯上的壁结构。所述系统级封装还包括位于所述壁结构上的集成无源盖，其中所述集成无源盖包括至少一个无源部件。所述壁结构和所述集成无源帽在所述至少一个半导体管芯上形成空气腔。系统级封装还可以包括位于盖基板上的至少一个接合焊盘。集成无源盖的帽基底上的至少一个接合焊盘可以电连接到封装衬底上的衬底接合焊盘。

10. 发明授权

US07535323B2 Bulk acoustic wave filter with reduced nonlinear signal distortion 有权
标题翻译：具有降低的非线性信号失真的体声波滤波器
公开(公告)号：US07535323B2
公开(公告)日：2009-05-19
申请号：US11484042
申请日：2006-07-10
申请人： Bradley Barber , Sahana Kenchappa , Russ Reisner
发明人： Bradley Barber , Sahana Kenchappa , Russ Reisner
IPC分类号： H03H9/54
CPC分类号： H03H9/605 , H03H9/02086
摘要： A filter circuit includes at least one series resonator having a first terminal and a second terminal, where the first and second terminals of the at least one series resonator are coupled to an input and an output of the filter circuit, respectively. The filter circuit further includes at least one shunt resonator having a first terminal and a second terminal, where the first terminal of the at least one shunt resonator is coupled to the input of the filter circuit and the second terminal of the at least one shunt resonator is coupled to ground. A polarity of the first terminal of the at least one series resonator and a polarity of the first terminal of the at least one shunt resonator are selected so as to reduce harmonic signal generation and other types of distortion in the filter circuit.
摘要翻译：滤波器电路包括至少一个具有第一端子和第二端子的串联谐振器，其中至少一个串联谐振器的第一和第二端子分别耦合到滤波器电路的输入端和输出端。滤波器电路还包括具有第一端子和第二端子的至少一个并联谐振器，其中至少一个并联谐振器的第一端子耦合到滤波器电路的输入端并且至少一个并联谐振器的第二端子耦合到地面。选择至少一个串联谐振器的第一端子的极性和至少一个并联谐振器的第一端子的极性，以便减少滤波器电路中的谐波信号产生和其它类型的失真。

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