专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07863598B2 Nonvolatile memory device 失效
标题翻译：非易失性存储器件
公开(公告)号：US07863598B2
公开(公告)日：2011-01-04
申请号：US11650577
申请日：2007-01-08
申请人： Yasuhiro Sugita , Yukio Tamai
发明人： Yasuhiro Sugita , Yukio Tamai
IPC分类号： H01L29/06 , H01L47/00
CPC分类号： G11C13/0007 , G11C7/04 , G11C13/0033 , G11C2213/51 , G11C2213/72 , H01L27/2409 , H01L27/2463 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/128 , H01L45/144 , H01L45/147 , H01L45/1675
摘要： A nonvolatile memory device comprises memory cells, each including a variable resistor element for storing data in accordance with a change in electrical resistance due to application of electrical stress, and a thermal diffusion barrier on a thermal diffusion path, wherein the thermal diffusion barrier is capable of suppressing a change in resistance of the variable resistor element due to heat diffusion from one of two adjacent memory cells separated by an electrical insulator from each other where heat is generated by applying the electrical stress for changing the electrical resistance of the variable resistor element to the other memory cell via the thermal diffusion path including an electrically conductive wiring material higher in thermal conductivity than that of the electrical insulator.
摘要翻译：非易失性存储器件包括存储单元，每个存储单元包括可变电阻器元件，用于根据电应力引起的电阻变化来存储数据，以及在热扩散路径上具有热扩散阻挡层，其中热扩散阻挡层能够抑制由于由电绝缘体分离的两个相邻的存储单元之一的热量扩散导致的可变电阻元件的电阻的变化，其中通过施加用于将可变电阻器元件的电阻改变的电应力施加到可变电阻器元件的电应力而产生热量经由热扩散路径的另一个存储单元包括导电性比导电性高于电绝缘体的导电布线材料。

2. 发明申请

US20070159868A1 Nonvolatile memory device 失效
标题翻译：非易失性存储器件
公开(公告)号：US20070159868A1
公开(公告)日：2007-07-12
申请号：US11650577
申请日：2007-01-08
申请人： Yasuhiro Sugita , Yukio Tamai
发明人： Yasuhiro Sugita , Yukio Tamai
IPC分类号： G11C17/00
CPC分类号： G11C13/0007 , G11C7/04 , G11C13/0033 , G11C2213/51 , G11C2213/72 , H01L27/2409 , H01L27/2463 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/128 , H01L45/144 , H01L45/147 , H01L45/1675
摘要： A nonvolatile memory device comprises memory cells, each including a variable resistor element for storing data in accordance with a change in electrical resistance due to application of electrical stress, and a thermal diffusion barrier on a thermal diffusion path, wherein the thermal diffusion barrier is capable of suppressing a change in resistance of the variable resistor element due to heat diffusion from one of two adjacent memory cells separated by an electrical insulator from each other where heat is generated by applying the electrical stress for changing the electrical resistance of the variable resistor element to the other memory cell via the thermal diffusion path including an electrically conductive wiring material higher in thermal conductivity than that of the electrical insulator.
摘要翻译：非易失性存储器件包括存储单元，每个存储单元包括可变电阻器元件，用于根据电应力引起的电阻变化来存储数据，以及在热扩散路径上具有热扩散阻挡层，其中热扩散阻挡层能够抑制由于由电绝缘体分离的两个相邻的存储单元之一的热量扩散导致的可变电阻元件的电阻的变化，其中通过施加用于将可变电阻器元件的电阻改变的电应力施加到可变电阻器元件的电应力而产生热量经由热扩散路径的另一个存储单元包括导电性比导电性高于电绝缘体的导电布线材料。

3. 发明申请

US20120069626A1 SEMICONDUCTOR MEMORY DEVICE 有权
标题翻译：半导体存储器件
公开(公告)号：US20120069626A1
公开(公告)日：2012-03-22
申请号：US13215594
申请日：2011-08-23
申请人： Takashi Nakano , Yukio Tamai , Nobuyoshi Awaya
发明人： Takashi Nakano , Yukio Tamai , Nobuyoshi Awaya
IPC分类号： G11C11/00
CPC分类号： G11C29/028 , G11C13/0007 , G11C13/0033 , G11C13/0035 , G11C2013/0083 , G11C2029/0409 , G11C2029/0411
摘要： The invention provides a semiconductor memory device including a variable resistance element capable of decreasing a variation of a resistance value of stored data due to a large number of times of switching operations and capable of performing a stable writing operation. The device has a circuit that applies a reforming voltage pulse to a memory cell including a variable resistance element of a degraded switching characteristic and a small read margin due to a large number of times of application of a write voltage pulse, to return each resistance state of the variable resistance element to an initial resistance state. By applying the reforming voltage pulse, the variable resistance element can recover at least one resistance state from a variation from the initial resistance state, and can recover the switching characteristic. Accordingly, there is obtained a semiconductor memory device in which a reduction of a read margin is suppressed.
摘要翻译：本发明提供了一种包括可变电阻元件的半导体存储器件，该可变电阻元件能够由于大量的开关操作而减少存储数据的电阻值的变化并且能够执行稳定的写入操作。该装置具有电路，该电路将重整电压脉冲施加到由于施加写入电压脉冲的次数多的包括具有劣化的开关特性的可变电阻元件和小的读取余量的存储单元，以使每个电阻状态的可变电阻元件到初始电阻状态。通过施加重整电压脉冲，可变电阻元件可以从初始电阻状态的变化恢复至少一个电阻状态，并且可以恢复开关特性。因此，获得了抑制读取余量的减小的半导体存储器件。

4. 发明授权

US07923711B2 Switching elements and production methods thereof 有权
标题翻译：开关元件及其制造方法
公开(公告)号：US07923711B2
公开(公告)日：2011-04-12
申请号：US11881575
申请日：2007-07-26
申请人： Hisashi Shima , Hiroyuki Akinaga , Fumiyoshi Takano , Yukio Tamai
发明人： Hisashi Shima , Hiroyuki Akinaga , Fumiyoshi Takano , Yukio Tamai
IPC分类号： H01L47/00
CPC分类号： H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1625 , H01L45/1641 , H01L45/1675
摘要： The present invention provides switching elements having a readout margin suitable for data storage units of nonvolatile memories, which are obtained by improving the resistance ratio of metal oxide thin films having reversible variable resistance properties. The present invention provides switching elements having a metal oxide consisting of a transition metal and oxygen formed between a first electrode and a second electrode, by modifying one or more of the crystal structure, ionic valence number of metal element, and nonstoichiometricity of a stoichiometric compound consisted of the transition metal and oxygen. The present invention also provides methods for producing switching elements having reversible variable resistance characteristics due to electric power application history.
摘要翻译：本发明提供了具有适合于非易失性存储器的数据存储单元的读出裕度的开关元件，其通过改善具有可逆可变电阻特性的金属氧化物薄膜的电阻比而获得。本发明提供了通过改变晶体结构，金属元素的离子价数和化学计量比的化学计量的一种或多种来形成具有由过渡金属和氧形成的金属氧化物的开关元件，所述过渡金属和氧形成在第一电极和第二电极之间由过渡金属和氧气组成。本发明还提供了由于电力使用历史而产生具有可逆电阻特性的开关元件的方法。

5. 发明授权

US07236388B2 Driving method of variable resistance element and memory device 有权
标题翻译：可变电阻元件和存储器件的驱动方法
公开(公告)号：US07236388B2
公开(公告)日：2007-06-26
申请号：US11169535
申请日：2005-06-28
申请人： Yasunari Hosoi , Yukio Tamai , Kazuya Ishihara , Shinji Kobayashi , Nobuyoshi Awaya
发明人： Yasunari Hosoi , Yukio Tamai , Kazuya Ishihara , Shinji Kobayashi , Nobuyoshi Awaya
IPC分类号： G11C11/00
CPC分类号： G11C29/50 , G11C13/0007 , G11C13/0069 , G11C29/50008 , G11C2013/009 , G11C2213/31
摘要： A variable resistance element is configured to be provided with a perovskite-type oxide between a first electrode and a second electrode, of which electric resistance between the first electrode and the second electrode is changed by applying a voltage pulse of a predetermined polarity between the first electrode and the second electrode, and the variable resistance element has a resistance hysteresis characteristic, in which a changing rate of a resistance value is changed from positive to negative with respect to increase of a cumulative pulse applying time in the application of the voltage pulse. The voltage pulse is applied to the variable resistance element so that the cumulative pulse applying time is not longer than a specific cumulative pulse applying time, in which the changing rate of the, resistance value is changed from positive to negative with respect to increase of the cumulative pulse applying time in the resistance hysteresis characteristic.
摘要翻译：可变电阻元件被配置为在第一电极和第二电极之间设置有钙钛矿型氧化物，其中通过在第一电极和第二电极之间施加预定极性的电压脉冲来改变第一电极和第二电极之间的电阻电极和第二电极，并且可变电阻元件具有电阻滞后特性，其中电阻值的变化率相对于施加电压脉冲的累积脉冲施加时间的增加而从正变化到负。电压脉冲被施加到可变电阻元件，使得累积脉冲施加时间不长于特定的累积脉冲施加时间，其中电阻值的变化率相对于增加的电阻值从正变化到负累积脉冲施加时间在电阻滞后特性。

6. 发明授权

US06992920B2 Nonvolatile semiconductor memory device, and programming method and erasing method thereof 有权
标题翻译：非易失性半导体存储器件及其编程方法及其擦除方法
公开(公告)号：US06992920B2
公开(公告)日：2006-01-31
申请号：US10872100
申请日：2004-06-17
申请人： Yukio Tamai , Kohji Inoue , Teruaki Morita
发明人： Yukio Tamai , Kohji Inoue , Teruaki Morita
IPC分类号： G11C11/00
CPC分类号： G11C13/0007 , G11C13/0069 , G11C16/3427 , G11C2013/009 , G11C2213/31 , G11C2213/77
摘要： One end of each variable resistive element, which forms a memory array, in the same row is connected to the same word line and the other end of each variable resistive element in the same column is connected to the same bit line. A first word line voltage is selected and applied to the selected word line, a second word line voltage is selected and applied to the unselected word lines, a first bit line voltage is selected and applied to the selected bit line, and a second bit line voltage is selected and applied to the unselected bit lines. The voltage difference between the first word line voltage and the first bit line voltage is set at a value that is no less than the first voltage difference that changes the resistance value of a variable resistive element, and the voltage difference between the first word line voltage and the second bit line voltage, the voltage difference between the second word line voltage and the first bit line voltage and the voltage difference between the second word line voltage and the second bit line voltage are respectively set at a value that is no greater than the second voltage difference that does not change the resistance value of a variable resistive element.
摘要翻译：在相同行中形成存储器阵列的每个可变电阻元件的一端连接到相同的字线，并且同一列中的每个可变电阻元件的另一端连接到相同的位线。选择第一字线电压并将其施加到所选字线，选择第二字线电压并将其施加到未选字线，选择第一位线电压并将其施加到所选择的位线，并且将第二位线电压施加到第二位线电压被选择并施加到未选择的位线。将第一字线电压与第一位线电压之间的电压差设定为不小于改变可变电阻元件的电阻值的第一电压差和第一字线电压之间的电压差和第二位线电压，将第二字线电压与第一位线电压之间的电压差和第二字线电压与第二位线电压之间的电压差分别设定为不大于不改变可变电阻元件的电阻值的第二电压差。

7. 发明申请

US20050151277A1 Nonvolatile semiconductor memory device 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US20050151277A1
公开(公告)日：2005-07-14
申请号：US11035592
申请日：2005-01-13
申请人： Hidechika Kawazoe , Yukio Tamai , Atsushi Shimaoka , Naoto Hagiwara , Hidetoshi Masuda , Toshimasa Suzuki
发明人： Hidechika Kawazoe , Yukio Tamai , Atsushi Shimaoka , Naoto Hagiwara , Hidetoshi Masuda , Toshimasa Suzuki
IPC分类号： H01L27/105 , G11C13/00 , G11C16/02 , H01L27/115 , H01L27/24 , H01L45/00 , H01L27/11
CPC分类号： H01L27/2436 , G11C13/0007 , G11C13/003 , G11C2213/31 , G11C2213/78 , G11C2213/79 , H01L45/04 , H01L45/1233 , H01L45/147 , H01L45/1625 , H01L45/1641
摘要： A nonvolatile memory element is formed by layering a lower electrode, a variable resistor and an upper electrode in sequence. The variable resistor is formed in which crystallinity and amorphism are mixed. Thus, the nonvolatile memory element is formed. More preferably, the variable resistor is a praseodymium-calcium-manganese oxide represented by a general formula, Pr1-xCaxMnO3, that has been formed at a film forming temperature from 350° C. to 500° C. Alternatively, the variable resistor is formed as a film at a film forming temperature that allows the variable resistor to become of an amorphous state or a state where crystallinity and amorphism are mixed and, then, is subjected to an annealing process at a temperature higher than the film forming temperature, in a temperature range where the variable resistor can maintain the state where crystallinity and amorphism are mixed.
摘要翻译：通过依次层叠下电极，可变电阻器和上电极来形成非易失性存储元件。形成结晶性和非晶态混合的可变电阻器。因此，形成非易失性存储元件。更优选地，可变电阻器是由通式为Pr 1-x M x MnO 3 N 3表示的镨 - 钙 - 锰氧化物，在350℃至500℃的成膜温度下形成的可变电阻器。或者，可变电阻器以允许可变电阻器变为非晶态的成膜温度或结晶度的状态形成为膜并且将非晶化混合，然后在可变电阻器可以保持结晶性和非晶态混合的状态的温度范围内，在高于成膜温度的温度下进行退火处理。

8. 发明申请

US20130285005A1 VARIABLE RESISTIVE ELEMENT, METHOD FOR PRODUCING THE SAME, AND NONVOLATILE SEMICONDUCTOR MEMORY DEVICE INCLUDING THE VARIABLE RESISTIVE ELEMENT 有权
标题翻译：可变电阻元件及其制造方法，以及包括可变电阻元件的非易失性半导体存储器件
公开(公告)号：US20130285005A1
公开(公告)日：2013-10-31
申请号：US13927261
申请日：2013-06-26
申请人： Yukio Tamai
发明人： Yukio Tamai
IPC分类号： H01L45/00
CPC分类号： H01L45/1253 , H01L27/24 , H01L45/08 , H01L45/145 , H01L45/16
摘要： A variable resistive element configured to reduce a forming voltage while reducing a variation in forming voltage among elements, a method for producing it, and a highly integrated nonvolatile semiconductor memory device provided with the variable resistive element are provided. The variable resistive element includes a resistance change layer (first metal oxide film) and a control layer (second metal oxide film) having contact with a first electrode sandwiched between the first electrode and a second electrode. The control layer includes a metal oxide film having a low work function (4.5 eV or less) and capable of extracting oxygen from the resistance change layer. The first electrode includes a metal having a low work function similar to the above metal, and a material having oxide formation free energy higher than that of an element included in the control layer, to prevent oxygen from being thermally diffused from the control layer.
摘要翻译：提供了一种可变电阻元件，其被配置为在减小元件之间的形成电压的变化的同时降低成形电压，其制造方法以及设置有可变电阻元件的高度集成的非易失性半导体存储器件。可变电阻元件包括与夹在第一电极和第二电极之间的第一电极接触的电阻变化层（第一金属氧化物膜）和控制层（第二金属氧化物膜）。控制层包括具有低功函数（4.5eV或更低）并且能够从电阻变化层提取氧的金属氧化物膜。第一电极包括具有与上述金属相似的低功函数的金属和具有比包含在对照层中的元素的氧化物形成自由能高的材料，以防止氧从控制层热扩散。

9. 发明授权

US07894239B2 Variable resistance element, method for producing the same, and nonvolatile semiconductor storage device 有权
标题翻译：可变电阻元件及其制造方法以及非易失性半导体存储器件
公开(公告)号：US07894239B2
公开(公告)日：2011-02-22
申请号：US12328648
申请日：2008-12-04
申请人： Yukio Tamai , Yasunari Hosoi , Nobuyoshi Awaya , Shigeo Ohnishi , Kazuya Ishihara , Hisashi Shima , Fumiyoshi Takano , Hiroyuki Akinaga
发明人： Yukio Tamai , Yasunari Hosoi , Nobuyoshi Awaya , Shigeo Ohnishi , Kazuya Ishihara , Hisashi Shima , Fumiyoshi Takano , Hiroyuki Akinaga
IPC分类号： G11C7/00
CPC分类号： G11C8/08 , G11C13/0007 , G11C13/0028 , G11C2013/0083 , G11C2213/32 , G11C2213/56 , G11C2213/77 , H01C7/108 , H01L45/04 , H01L45/1233 , H01L45/1246 , H01L45/146 , H01L45/1658 , Y10T29/49082
摘要： The variable resistance element of the present invention is a variable resistance element having an electrode, the other electrode, and a metal oxide material sandwiched between the electrodes and having an electrical resistance, between the electrodes, changing reversibly in response to a voltage applied between the electrodes. The variable resistance element further includes, inside the metal oxide material, a low resistance material having a lower electrical resistance than the metal oxide material and being out of contact with at least either one of the electrodes. This makes it possible to reduce a forming voltage for providing a conductive section inside the metal oxide material, without causing a leakage current to increase.
摘要翻译：本发明的可变电阻元件是具有电极，另一个电极和夹在电极之间并具有电阻的金属氧化物材料的可变电阻元件，在电极之间，响应于施加在电极之间的电压而可逆地改变电极。可变电阻元件还包括在金属氧化物材料内部的具有比金属氧化物材料低的电阻并且与至少任一个电极不接触的低电阻材料。这使得可以降低用于在金属氧化物材料内部提供导电部分的形成电压，而不会导致泄漏电流增加。

10. 发明授权

US07697317B2 Nonvolatile semiconductor memory device 失效
标题翻译：非易失性半导体存储器件
公开(公告)号：US07697317B2
公开(公告)日：2010-04-13
申请号：US11913490
申请日：2006-04-26
申请人： Atsushi Shimaoka , Hidechika Kawazoe , Yukio Tamai
发明人： Atsushi Shimaoka , Hidechika Kawazoe , Yukio Tamai
IPC分类号： G11C11/00 , G11C11/14 , G11C11/15
CPC分类号： G11C13/00 , G11C8/08 , G11C13/0028 , G11C13/0069 , G11C2013/0073 , G11C2013/009 , G11C2213/77 , H01L27/101
摘要： A nonvolatile semiconductor storage device is provided with a memory cell selecting circuit which selects a selected memory cell from a memory cell array; and a write voltage applying circuit, which applies a row write voltage and a column write voltage to a selected word line and a selected bit line, respectively, and applies a row write blocking voltage and a column write blocking voltage to an unselected word line and an unselected bit line, respectively, and applies a write voltage sufficient for writing only on both ends of the selected memory cell. The write voltage applying circuit applies a write compensating voltage, which has a polarity opposite to that of the voltage applied on the both ends of the unselected memory cells other than the selected memory cell, on both ends of the unselected memory cells, while the write voltage is applied to the selected memory cell.
摘要翻译：非易失性半导体存储装置具有存储单元选择电路，其从存储单元阵列中选择选定的存储单元; 以及写入电压施加电路，其分别对所选择的字线和选定的位线施加行写入电压和列写入电压，并向未选择的字线施加行写入阻塞电压和列写入阻塞电压，分别是未选择的位线，并且施加足以仅写入所选择的存储器单元的两端的写电压。写入电压施加电路在未选择的存储单元的两端上施加写入补偿电压，该补偿电压具有与所选存储单元以外的未选择的存储单元的两端上施加的电压的极性相反的写入补偿电压，而写入电压被施加到所选择的存储单元。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式