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    • 1. 发明申请
    • THIN FILM TRANSISTOR SUBSTRATE
    • 薄膜晶体管基板
    • US20090141207A1
    • 2009-06-04
    • US12255908
    • 2008-10-22
    • Yoon-Sung UMHoon KimHye-Ran YouJae-Jin LyuSeung-Beom Park
    • Yoon-Sung UMHoon KimHye-Ran YouJae-Jin LyuSeung-Beom Park
    • G02F1/136H01L29/04H01L21/00
    • H01L29/6675G02F1/13624G02F2001/134345H01L27/1288
    • In a thin film transistor, first and second thin film transistors are connected to an Nth gate line and an Mth data line, and first and second sub pixel electrodes are connected to the first and second thin film transistors, respectively. A third thin film transistor includes a gate electrode connected to an (N+1)th gate line, a semiconductor layer overlapping with the gate electrode, a source electrode connected to the second sub pixel electrode and partially overlapping with the gate electrode, and a drain electrode facing the source electrode. A first auxiliary electrode is connected to the drain electrode and arranged on the same layer as the first and second sub pixel electrodes. An opposite electrode is arranged on the same layer as the gate line and at least partially overlaps with the first auxiliary electrode with at least one insulating layer disposed therebetween.
    • 在薄膜晶体管中,第一和第二薄膜晶体管连接到第N栅极线和第M数据线,第一和第二子像素电极分别连接到第一和第二薄膜晶体管。 第三薄膜晶体管包括连接到第(N + 1)栅极线的栅电极,与栅电极重叠的半导体层,连接到第二子像素电极并与栅电极部分重叠的源极, 漏电极面对源电极。 第一辅助电极连接到漏电极并且设置在与第一和第二子像素电极相同的层上。 相对电极布置在与栅极线相同的层上,并且与第一辅助电极至少部分重叠,并且其间设置有至少一个绝缘层。
    • 3. 发明授权
    • Thin film transistor substrate
    • 薄膜晶体管基板
    • US08026991B2
    • 2011-09-27
    • US12255908
    • 2008-10-22
    • Yoon-Sung UmHoon KimHye-Ran YouJae-Jin LyuSeung-Beom Park
    • Yoon-Sung UmHoon KimHye-Ran YouJae-Jin LyuSeung-Beom Park
    • G02F1/136H01L29/04H01L21/00
    • H01L29/6675G02F1/13624G02F2001/134345H01L27/1288
    • In a thin film transistor, first and second thin film transistors are connected to an Nth gate line and an Mth data line, and first and second sub pixel electrodes are connected to the first and second thin film transistors, respectively. A third thin film transistor includes a gate electrode connected to an (N+1)th gate line, a semiconductor layer overlapping with the gate electrode, a source electrode connected to the second sub pixel electrode and partially overlapping with the gate electrode, and a drain electrode facing the source electrode. A first auxiliary electrode is connected to the drain electrode and arranged on the same layer as the first and second sub pixel electrodes. An opposite electrode is arranged on the same layer as the gate line and at least partially overlaps with the first auxiliary electrode with at least one insulating layer disposed therebetween.
    • 在薄膜晶体管中,第一和第二薄膜晶体管连接到第N栅极线和第M数据线,第一和第二子像素电极分别连接到第一和第二薄膜晶体管。 第三薄膜晶体管包括连接到第(N + 1)栅极线的栅电极,与栅电极重叠的半导体层,连接到第二子像素电极并与栅电极部分重叠的源极, 漏电极面对源电极。 第一辅助电极连接到漏电极并且设置在与第一和第二子像素电极相同的层上。 相对电极布置在与栅极线相同的层上,并且与第一辅助电极至少部分重叠,并且其间设置有至少一个绝缘层。