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1. 发明申请

US20100100663A1 Method of Performing Wear Leveling with Variable Threshold 有权
标题翻译：用可变阈值进行磨损均衡的方法
公开(公告)号：US20100100663A1
公开(公告)日：2010-04-22
申请号：US12255633
申请日：2008-10-21
申请人： Yu-Mao Kao , Yung-Li Ji , Chih-Nan Yen , Fuja Shone
发明人： Yu-Mao Kao , Yung-Li Ji , Chih-Nan Yen , Fuja Shone
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F2212/7211
摘要： A wear leveling limit and/or an overall erase count threshold used for activating wear leveling in a non-volatile memory may be adjusted by determining a stage according to a highest erase count, and determining the wear leveling limit and/or the overall erase count threshold corresponding to the stage. Wear leveling may then be performed according to the wear leveling limit and/or the overall erase count threshold.
摘要翻译：用于激活非易失性存储器中的磨损均衡的磨损均衡限制和/或整体擦除计数阈值可以通过根据最高擦除次数确定一个级，并且确定磨损平衡极限和/或整体擦除计数阈值对应于舞台。然后可以根据磨损平衡极限和/或总体擦除次数阈值进行磨损平衡。

2. 发明授权

US08082386B2 Method of performing wear leveling with variable threshold 有权
标题翻译：用可变阈值进行磨损均衡的方法
公开(公告)号：US08082386B2
公开(公告)日：2011-12-20
申请号：US12255633
申请日：2008-10-21
申请人： Yu-Mao Kao , Yung-Li Ji , Chih-Nan Yen , Fuja Shone
发明人： Yu-Mao Kao , Yung-Li Ji , Chih-Nan Yen , Fuja Shone
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F2212/7211
摘要： A wear leveling limit and/or an overall erase count threshold used for activating wear leveling in a non-volatile memory may be adjusted by determining a stage according to a highest erase count, and determining the wear leveling limit and/or the overall erase count threshold corresponding to the stage. Wear leveling may then be performed according to the wear leveling limit and/or the overall erase count threshold.
摘要翻译：用于激活非易失性存储器中的磨损均衡的磨损均衡限制和/或整体擦除计数阈值可以通过根据最高擦除次数确定一个级，并且确定磨损平衡极限和/或整体擦除次数阈值对应于舞台。然后可以根据磨损平衡极限和/或总体擦除次数阈值进行磨损平衡。

3. 发明授权

US07911840B2 Logged-based flash memory system and logged-based method for recovering a flash memory system 有权
标题翻译：基于日志的闪存系统和基于日志的方法来恢复闪存系统
公开(公告)号：US07911840B2
公开(公告)日：2011-03-22
申请号：US12318872
申请日：2009-01-12
申请人： Hsin-Hsien Wu , Yu-Mao Kao , Yung-Li Ji , Chih-Nan Yen , Fu-Ja Shone
发明人： Hsin-Hsien Wu , Yu-Mao Kao , Yung-Li Ji , Chih-Nan Yen , Fu-Ja Shone
IPC分类号： G11C14/00
CPC分类号： G11C16/349
摘要： A flash memory system includes a path selector to determine to write to a non-volatile memory, a volatile memory or both the non-volatile memory and the volatile memory when the flash memory system is to write data. A record is stored in the non-volatile memory which is updated the status of the non-volatile memory after each one or more writing operations. When the flash memory system is powered on after a power loss, it could be recovered to a command executed prior to the power loss or to any checkpoint prior to the power loss by using the record.
摘要翻译：闪速存储器系统包括路径选择器，用于在闪存系统要写入数据时确定写入非易失性存储器，易失性存储器或非易失性存储器和易失性存储器。一个记录被存储在非易失性存储器中，在每个一个或多个写入操作之后更新非易失性存储器的状态。当闪存系统在掉电后上电时，可以将其恢复到在掉电前执行的命令，或者通过使用该记录恢复到断电前的任何检查点。

4. 发明授权

US07839684B2 Defective block handling method for a multiple data channel flash memory storage device 有权
标题翻译：用于多数据通道闪存存储设备的不良块处理方法
公开(公告)号：US07839684B2
公开(公告)日：2010-11-23
申请号：US12382204
申请日：2009-03-11
申请人： Yu-Mao Kao , Yung-Li Ji , Chih-Nan Yen , Fu-Ja Shone
发明人： Yu-Mao Kao , Yung-Li Ji , Chih-Nan Yen , Fu-Ja Shone
IPC分类号： G11C16/00
CPC分类号： G11C29/88 , G11C29/82
摘要： The block groups of a multiple data channel flash memory storage device are detected for defective blocks. The block group containing any defective blocks is divided into subgroups, each of which contains only defective blocks or only good blocks. The subgroups containing only good blocks are selected to establish a new block group having the same amount of blocks as that of the original block groups.
摘要翻译：针对缺陷块检测多数据通道闪存存储设备的块组。包含任何缺陷块的块组被划分为子组，每个子组仅包含缺陷块或仅包含好的块。选择仅包含好的块的子组以建立具有与原始块组相同的块数量的新块组。

5. 发明申请

US20100061150A1 Logged-based flash memory system and logged-based method for recovering a flash memory system 有权
标题翻译：基于日志的闪存系统和基于日志的方法来恢复闪存系统
公开(公告)号：US20100061150A1
公开(公告)日：2010-03-11
申请号：US12318872
申请日：2009-01-12
申请人： Hsin-Hsien Wu , Yu-Mao Kao , Yung-Li Ji , Chih-Nan Yen , Fu-Ja Shone
发明人： Hsin-Hsien Wu , Yu-Mao Kao , Yung-Li Ji , Chih-Nan Yen , Fu-Ja Shone
IPC分类号： G11C16/04 , G11C16/06 , G11C5/14
CPC分类号： G11C16/349
摘要： A flash memory system includes a path selector to determine to write to a non-volatile memory, a volatile memory or both the non-volatile memory and the volatile memory when the flash memory system is to write data. A record is stored in the non-volatile memory which is updated the status of the non-volatile memory after each one or more writing operations. When the flash memory system is powered on after a power loss, it could be recovered to a command executed prior to the power loss or to any checkpoint prior to the power loss by using the record.
摘要翻译：闪速存储器系统包括路径选择器，用于在闪存系统要写入数据时确定写入非易失性存储器，易失性存储器或非易失性存储器和易失性存储器。一个记录被存储在非易失性存储器中，在每个一个或多个写入操作之后更新非易失性存储器的状态。当闪存系统在掉电后上电时，可以将其恢复到在掉电前执行的命令，或者通过使用该记录恢复到断电前的任何检查点。

6. 发明授权

US09086456B2 Optimization of a storage system containing ECC and scramble engines 有权
标题翻译：优化包含ECC和加扰引擎的存储系统
公开(公告)号：US09086456B2
公开(公告)日：2015-07-21
申请号：US13934239
申请日：2013-07-03
申请人： Chih-Nan Yen , Chia-Wei Chang
发明人： Chih-Nan Yen , Chia-Wei Chang
IPC分类号： G01R31/3185 , G11C29/00 , G11C29/04
CPC分类号： G01R31/318536 , G06F11/1048 , G11C29/00 , G11C2029/0411
摘要： A method for selecting the scrambling and descrambling data transmitted in a storage system containing ECC and scramble engines with a seed table is disclosed and the steps comprises: encoding a data sent from a HOST interface by an ECC encoding engine and transmitting the data to a LFSR scramble engine; scrambling the data by the LFSR scramble engine and transmitting to a storage device; creating a seed value and transmitting the seed value to a seed table by the LFSR scramble engine; receiving the seed value from the seed table and the scrambled data from the storage device by a LFSR descramble engine, and descrambling the scrambled data based on the seed value and transmitting to an ECC decoding engine; and decoding the descrambled data received from the LFSR descramble engine and then acquiring the original data sent from the HOST interface.
摘要翻译：公开了一种用于选择在具有种子表的包含ECC和加扰引擎的存储系统中发送的加扰和解扰数据的方法，所述步骤包括：通过ECC编码引擎对从HOST接口发送的数据进行编码，并将数据发送到LFSR 争夺引擎通过LFSR加扰引擎扰乱数据并发送到存储设备; 创建种子值并通过LFSR加扰引擎将种子值发送到种子表; 通过LFSR解扰引擎从种子表接收来自种子表的种子值和来自存储装置的加密数据，并且基于种子值对加扰数据进行解扰并发送到ECC解码引擎; 并对从LFSR解扰引擎接收的解扰数据进行解码，然后获取从HOST接口发送的原始数据。

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