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1. 发明授权

US10917096B1 Low-power biasing networks for superconducting integrated circuits 有权
公开(公告)号：US10917096B1
公开(公告)日：2021-02-09
申请号：US15852910
申请日：2017-12-22
申请人： Hypres, Inc.
发明人： Oleg A. Mukhanov , Alexander F. Kirichenko , Dimitri Kirichenko
IPC分类号： H01L39/22 , H03K19/195
摘要： A superconducting integrated circuit, comprising a plurality of superconducting circuit elements, each having a variation in operating voltage over time; a common power line; and a plurality of bias circuits, each connected to the common power line, and to a respective superconducting circuit element, wherein each respective bias circuit is superconducting during at least one time portion of the operation of a respective superconducting circuit element, and is configured to supply the variation in operating voltage over time to the respective superconducting circuit element.

2. 发明授权

US10230389B1 Superconductor analog to digital converter 有权
公开(公告)号：US10230389B1
公开(公告)日：2019-03-12
申请号：US15679829
申请日：2017-08-17
申请人： Hypres, Inc.
发明人： Amol Inamdar , Deepnarayan Gupta
IPC分类号： H03M3/00 , H03M1/08 , H03M1/12
摘要： Superconductor analog-to-digital converters (ADC) offer high sensitivity and large dynamic range. One approach to increasing the dynamic range further is with a subranging architecture, whereby the output of a coarse ADC is converted back to analog and subtracted from the input signal, and the residue signal fed to a fine ADC for generation of additional significant bits. This also requires a high-gain broadband linear amplifier, which is not generally available within superconductor technology. In a preferred embodiment, a distributed digital fluxon amplifier is presented, which also integrates the functions of integration, filtering, and flux subtraction. A subranging ADC design provides two ADCs connected with the fluxon amplifier and subtractor circuitry that would provide a dynamic range extension by about 30-35 dB.

3. 发明授权

US09747968B2 Magnetic RAM array architecture 有权
公开(公告)号：US09747968B2
公开(公告)日：2017-08-29
申请号：US15356117
申请日：2016-11-18
申请人： RAYTHEON BBN TECHNOLOGIES CORP. , HYPRES, INC.
发明人： Thomas Ohki , Oleg Mukhanov , Alex Kirichenko
IPC分类号： G11C11/00 , G11C11/16 , G11C11/18
CPC分类号： G11C11/1675 , G11C11/161 , G11C11/1655 , G11C11/1657 , G11C11/1659 , G11C11/1673 , G11C11/18
摘要： A magnetic random access memory (MRAM) array including: a plurality of MRAM cells arranged in an array configuration, each comprising a first type nTron and a magnetic memory element; a wordline select circuit comprising of a second type nTron to drive a plurality of parallel wordlines; and a plurality of bitline select circuits, each comprising of said second type nTron for writing to and reading from a column of memory cells in the array and each capable of selecting a single MRAM cell for a memory read or write operation, wherein the second nTron has a higher current drive than the first nTron.

4. 发明授权

US09742429B1 Superconductor analog to digital converter 有权
公开(公告)号：US09742429B1
公开(公告)日：2017-08-22
申请号：US15095730
申请日：2016-04-11
申请人： Hypres, Inc.
发明人： Amol Inamdar , Deepnarayan Gupta
IPC分类号： H03M1/12 , H03M3/00 , H03M1/08
CPC分类号： H03M3/458 , H03M1/0854 , H03M1/12 , H03M1/1245 , H03M1/68 , H03M3/02 , H03M3/46
摘要： Superconductor analog-to-digital converters (ADC) offer high sensitivity and large dynamic range. One approach to increasing the dynamic range further is with a subranging architecture, whereby the output of a coarse ADC is converted back to analog and subtracted from the input signal, and the residue signal fed to a fine ADC for generation of additional significant bits. This also requires a high-gain broadband linear amplifier, which is not generally available within superconductor technology. In a preferred embodiment, a distributed digital fluxon amplifier is presented, which also integrates the functions of integration, filtering, and flux subtraction. A subranging ADC design provides two ADCs connected with the fluxon amplifier and subtractor circuitry that would provide a dynamic range extension by about 30-35 dB.

5. 发明授权

US09741920B1 System and method for providing multi-conductive layer metallic interconnects for superconducting integrated circuits 有权
公开(公告)号：US09741920B1
公开(公告)日：2017-08-22
申请号：US14844866
申请日：2015-09-03
申请人： Hypres Inc.
发明人： Sergey K. Tolpygo , Denis Amparo , Richard Hunt , John Vivalda , Daniel Yohannes
IPC分类号： H01L39/24 , H01L39/02 , H01L39/22
CPC分类号： H01L39/2493 , H01L23/48 , H01L27/18 , H01L39/025 , H01L39/223 , H01L2924/0002 , H01L2924/00011 , H01L2924/00
摘要： Superconducting integrated circuits require several wiring layers to distribute bias and signals across the circuit, which must cross each other both with and without contacts. All wiring lines and contacts must be fully superconducting, and in the prior art each wiring layer comprises a single metallic thin film. An alternative wiring layer is disclosed that comprises sequential layers of two or more different metals. Such a multi-metallic wiring layer may offer improved resistance to impurity diffusion, better surface passivation, and/or reduction of stress, beyond that which is attainable with a single-metallic wiring layer. The resulting process leads to improved margin and yield in an integrated circuit comprising a plurality of Josephson junctions. Several preferred embodiments are disclosed, for both planarized and non-planarized processes. These preferred and other methods may be applied to digital circuits based on Rapid Single Flux Quantum logic, and to quantum computing using Josephson junction qubits.

6. 发明授权

US09595656B2 Double-masking technique for increasing fabrication yield in superconducting electronics 有权
标题翻译：双屏蔽技术，用于提高超导电子产品的制造成本
公开(公告)号：US09595656B2
公开(公告)日：2017-03-14
申请号：US14850634
申请日：2015-09-10
申请人： Hypres Inc.
发明人： Sergey K. Tolpygo
IPC分类号： H01L29/06 , H01L39/24 , H01L39/02 , H01L39/12 , H01L39/22 , H01L27/18
CPC分类号： H01L27/18 , H01L39/025 , H01L39/12 , H01L39/223 , H01L39/2406 , H01L39/249 , H01L39/2493
摘要： An improved microfabrication technique for Josephson junctions in superconducting integrated circuits, based on the use of a double-layer lithographic mask for partial anodization of the side-walls and base electrode of the junctions. The top layer of the mask is a resist material, and the bottom layer is a dielectric material chosen so to maximize adhesion between the resist and the underlying superconducting layer, be etch-compatible with the underlying superconducting layer, and be insoluble in the resist and anodization processing chemistries. The superconductor is preferably niobium, under a silicon dioxide layer, with a conventional photoresist or electron-beam resist as the top layer. This combination results in a substantial increase in the fabrication yield of high-density superconducting integrated circuits, increase in junction uniformity and reduction in defect density. A dry etch more compatible with microlithography may be employed.
摘要翻译：基于使用双层光刻掩模对结点的侧壁和基极进行部分阳极氧化的改进的超导集成电路中约瑟夫森结的微细加工技术。掩模的顶层是抗蚀剂材料，并且底层是选择的电介质材料，以使抗蚀剂和下面的超导层之间的粘合力最大化，与下面的超导层进行蚀刻兼容，并且不溶于抗蚀剂，阳极氧化处理化学品。超导体优选是在二氧化硅层下的铌，其中常规的光致抗蚀剂或电子束抗蚀剂作为顶层。这种组合导致高密度超导集成电路的制造产量的显着增加，结点均匀性的增加和缺陷密度的降低。可以采用与微光刻相容的干蚀刻。

7. 发明授权

US09136457B2 Double-masking technique for increasing fabrication yield in superconducting electronics 有权
标题翻译：双屏蔽技术，用于提高超导电子产品的制造成本
公开(公告)号：US09136457B2
公开(公告)日：2015-09-15
申请号：US13771330
申请日：2013-02-20
申请人： Hypres, Inc.
发明人： Sergey K. Tolpygo
IPC分类号： H01L29/06 , H01L39/02 , H01L39/24
CPC分类号： H01L27/18 , H01L39/025 , H01L39/12 , H01L39/223 , H01L39/2406 , H01L39/249 , H01L39/2493
摘要： An improved microfabrication technique for Josephson junctions in superconducting integrated circuits, based on the use of a double-layer lithographic mask for partial anodization of the side-walls and base electrode of the junctions. The top layer of the mask is a resist material, and the bottom layer is a dielectric material chosen so to maximize adhesion between the resist and the underlying superconducting layer, be etch-compatible with the underlying superconducting layer, and be insoluble in the resist and anodization processing chemistries. The superconductor is preferably niobium, under a silicon dioxide layer, with a conventional photoresist or electron-beam resist as the top layer. This combination results in a substantial increase in the fabrication yield of high-density superconducting integrated circuits, increase in junction uniformity and reduction in defect density. A dry etch more compatible with microlithography may be employed.
摘要翻译：基于使用双层光刻掩模对结点的侧壁和基极进行部分阳极氧化的改进的超导集成电路中约瑟夫森结的微细加工技术。掩模的顶层是抗蚀剂材料，并且底层是选择的电介质材料，以使抗蚀剂和下面的超导层之间的粘合力最大化，与下面的超导层进行蚀刻兼容，并且不溶于抗蚀剂，阳极氧化处理化学品。超导体优选是在二氧化硅层下的铌，其中常规的光致抗蚀剂或电子束抗蚀剂作为顶层。这种组合导致高密度超导集成电路的制造产量的显着增加，结点均匀性的增加和缺陷密度的降低。可以采用与微光刻相容的干蚀刻。

8. 发明授权

US09020079B2 Wideband digital spectrometer 有权
标题翻译：宽带数字光谱仪
公开(公告)号：US09020079B2
公开(公告)日：2015-04-28
申请号：US13967488
申请日：2013-08-15
申请人： Hypres, Inc.
发明人： Deepnarayan Gupta
IPC分类号： H04L27/06 , H04B1/12 , H04B1/10
CPC分类号： H04B1/123 , H04B1/0028 , H04B1/109 , H04B1/38 , H04L27/2649
摘要： A processor, comprising a first data input configured to receive a stream of samples of a first signal having a spectral space, the stream having a data rate of at least 4 GHz; a second data input configured to receive a stream of samples of a second signal; a multitap correlator, configured to receive the first stream of samples and the second stream of samples, and producing at least one correlation output for each respective sequential sample of the first signal received; and a programmable control configured to alter a relationship of the stream of samples of the first signal and the stream of samples of the second signal, to thereby select, under program control, an alterable correlation output.
摘要翻译：一种处理器，包括被配置为接收具有频谱空间的第一信号的样本流的第一数据输入，所述流具有至少4GHz的数据速率; 第二数据输入，被配置为接收第二信号的采样流; 多位相关器，被配置为接收所述第一采样流和所述第二采样流，并且为接收到的所述第一信号的每个相应顺序采样产生至少一个相关输出; 以及可编程控制，被配置为改变第一信号的采样流与第二信号的采样流的关系，从而在程序控制下选择可变相关输出。

9. 发明授权

US08872690B1 Superconductor analog to digital converter 有权
标题翻译：超导体模数转换器
公开(公告)号：US08872690B1
公开(公告)日：2014-10-28
申请号：US13482266
申请日：2012-05-29
申请人： Amol Inamdar , Deepnarayan Gupta
发明人： Amol Inamdar , Deepnarayan Gupta
IPC分类号： H03M1/12
CPC分类号： H03M3/458 , H03M1/0854 , H03M1/12 , H03M1/1245 , H03M1/68 , H03M3/02 , H03M3/46
摘要： Superconductor analog-to-digital converters (ADC) offer high sensitivity and large dynamic range. One approach to increasing the dynamic range further is with a subranging architecture, whereby the output of a coarse ADC is converted back to analog and subtracted from the input signal, and the residue signal fed to a fine ADC for generation of additional significant bits. This also requires a high-gain broadband linear amplifier, which is not generally available within superconductor technology. In a preferred embodiment, a distributed digital fluxon amplifier is presented, which also integrates the functions of integration, filtering, and flux subtraction. A subranging ADC design provides two ADCs connected with the fluxon amplifier and subtractor circuitry that would provide a dynamic range extension by about 30-35 dB.
摘要翻译：超导体模数转换器（ADC）具有高灵敏度和大动态范围。进一步增加动态范围的一种方法是使用子架构，由此将粗略ADC的输出转换回模拟并从输入信号中减去，并将剩余信号馈送到精细ADC以产生额外的有效位。这也需要高增益宽带线性放大器，这在超导体技术中通常不可用。在优选实施例中，提出了分布式数字通量放大器，其还集成了积分，滤波和磁通减法的功能。子阵列ADC设计提供了两个与物理放大器和减法器电路连接的ADC，可提供大约30-35 dB的动态范围扩展。

10. 发明授权

US08811536B2 Oversampling digital receiver for radio-frequency signals 有权
标题翻译：用于射频信号的过采样数字接收机
公开(公告)号：US08811536B2
公开(公告)日：2014-08-19
申请号：US13911288
申请日：2013-06-06
申请人： Hypres Inc.
发明人： Deepnarayan Gupta
IPC分类号： H03K9/00
CPC分类号： H04W56/0015 , H04B1/005 , H04B1/0483 , H04B1/40
摘要： A system and method for receiving a radio frequency signal, comprising a device for digitizing, without prior alteration of frequency, an analog radio frequency representation of each of a plurality of radio frequency signals to produce a respective plurality of digital radio frequency signals having a respective associated radio frequency digital clock, the plurality of digital radio frequency signals having a sufficiently high respective associated clock rate to preserve an information content of an information communication present in the analog radio frequency representation; a switch matrix adapted to concurrently switch the plurality of digital radio frequency signals and associated digital radio frequency clock to ones of a plurality of digital signal processors; and a control adapted to selectively automatically control the concurrent switching of a plurality of digital signals and associated digital clock to the respective plurality of digital signal processors; wherein the digital signal processors produce processed representations of information contained in respective analog radio frequency representations.
摘要翻译：一种用于接收射频信号的系统和方法，包括用于在不改变频率的情况下数字化数字化的装置，用于产生多个数字射频信号，所述数字射频信号具有相应的多个数字射频信号相关联的射频数字时钟，所述多个数字射频信号具有足够高的相应的相关时钟速率，以保持存在于模拟射频表示中的信息通信的信息内容; 适于将多个数字射频信号和相关联的数字射频时钟同时切换到多个数字信号处理器中的数字射频时钟的开关矩阵; 以及控制器，其适于选择性地自动控制多个数字信号和相关联的数字时钟的并发切换到相应的多个数字信号处理器; 其中数字信号处理器产生处理在各模拟射频表示中的信息的表示。

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