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1. 发明申请

US20180276133A1 LOCKING A CACHE LINE FOR WRITE OPERATIONS ON A BUS 审中-公开
公开(公告)号：US20180276133A1
公开(公告)日：2018-09-27
申请号：US15990558
申请日：2018-05-25
申请人： International Business Machines Corporation
发明人： Stephen L. Blinick , Charles S. Cardinell , Roger G. Hathorn , Benhard Laubli , Miguel A. Montoya , Timothy J. Van Patten
IPC分类号： G06F12/0879 , G06F12/0891 , G06F12/0804 , G06F12/0802 , G06F12/14 , G06F12/1009 , G06F12/0831 , G06F12/127
CPC分类号： G06F12/0879 , G06F12/0802 , G06F12/0804 , G06F12/0833 , G06F12/0891 , G06F12/1009 , G06F12/127 , G06F12/1475 , G06F2212/1052 , G06F2212/303 , G06F2212/604 , G06F2212/62 , G06F2212/657
摘要： Provided are a computer program product, system, and method for locking a cache line for a burst write operations on a bus. A cache line is allocated in a cache for a target address. A lock is set for the cache line, wherein setting the lock prevents the data in the cache line from being cast out. Data is written to the cache line. All the data in the cache line is flushed to the target address over a bus in response to completing writing to the cache line.

2. 发明申请

US20170116350A1 VALIDATION OF SCHEMA AND SCHEMA CONFORMANCE VERIFICATION 审中-公开
公开(公告)号：US20170116350A1
公开(公告)日：2017-04-27
申请号：US15399004
申请日：2017-01-05
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Steven B. Pitschke
IPC分类号： G06F17/30 , G06F17/27
CPC分类号： G06F17/30914 , G06F17/2705 , G06F17/30908
摘要： A schema can be received as an input. For at least one element in the schema, the element can be parsed from the schema. The parsed element can be validated by comparing the parsed element to a node within a first schema parse tree. A parse tree node can be generated for the parsed element. The parse tree node can be configured to call at least one validation rule, external to a second schema parse tree, which validates an element of a document corresponding to the parse tree node. The parse tree node can be added to the second schema parse tree. The second schema parse tree can be output.

3. 发明申请

US20160217820A1 CONSTRAINING FIR FILTER TAPS IN AN ADAPTIVE ARCHITECTURE 有权
标题翻译：在自适应建筑中约束FIR滤波器
公开(公告)号：US20160217820A1
公开(公告)日：2016-07-28
申请号：US15087836
申请日：2016-03-31
申请人： International Business Machines Corporation
发明人： Robert A. Hutchins
IPC分类号： G11B20/10 , G11B5/008
CPC分类号： G11B20/10046 , G11B5/00813
摘要： According to one embodiment, a system for processing data includes a processor and logic integrated with and/or executable by the processor. The logic is configured to individually set, for each of one or more range-constrained finite impulse response (FIR) filter taps configured for use in a FIR filter, a predetermined range of values suitable for controlling an equalizer response. The logic is also configured to pass data through the equalizer comprising the FIR filter to obtain equalized data. Each of the one or more range-constrained FIR filter taps are individually adaptive within its predetermined range of values. Also, the data is read from a magnetic storage medium.
摘要翻译：根据一个实施例，用于处理数据的系统包括与处理器集成和/或可执行的处理器和逻辑。逻辑被配置为针对被配置为在FIR滤波器中使用的一个或多个范围约束的有限脉冲响应（FIR）滤波器抽头中的每个单独设置适合于控制均衡器响应的预定范围的值。逻辑还被配置为通过包括FIR滤波器的均衡器传递数据以获得均衡的数据。一个或多个范围受限的FIR滤波器抽头中的每一个在其预定的值范围内是单独自适应的。此外，从磁存储介质读取数据。

4. 发明申请

US20200073816A1 SPECULATIVE CHECKIN OF ERAT CACHE ENTRIES 审中-公开
公开(公告)号：US20200073816A1
公开(公告)日：2020-03-05
申请号：US16117099
申请日：2018-08-30
申请人： International Business Machines Corporation
发明人： Bartholomew Blaner , Jay G. Heaslip , Robert D. Herzl , Jody B. Joyner , Jeffrey A. Stuecheli
IPC分类号： G06F12/0897 , G06F12/1009 , G06F12/02
摘要： A method, computer program product, and a computer system are disclosed for processing information in a processor that in one or more embodiments includes setting a threshold number of free Effective to Real Address Translation (ERAT) cache entries in an ERAT cache; determining whether a total number of free ERAT cache entries is less than or equal to the threshold number of free ERAT cache entries; allocating, in response to determining that the total number of free entries is less than or equal to the threshold number, one or more active ERAT cache entries to be speculatively checked in to a memory management unit (MMU); and speculatively checking in the one or more active ERAT cache entries to the MMU.

5. 发明申请

US20160076167A1 RINSING AND DRYING FOR ELECTROCHEMICAL PROCESSING 有权
公开(公告)号：US20160076167A1
公开(公告)日：2016-03-17
申请号：US14948259
申请日：2015-11-21
申请人： International Business Machines Corporation
发明人： Charles L. Arvin , Raschid J. Bezama , Hariklia Deligianni
IPC分类号： C25F7/00 , C25F3/12
CPC分类号： C25D17/00 , C25D5/48 , C25D21/08 , C25F3/02 , C25F3/12 , C25F7/00
摘要： An electroplating/etch apparatus including a fluid jet and a dryer present over the tank containing the electrolyte for the electroplating/etch process. The fluid jet and the dryer remove excess liquids, such as electrolyte, from the component being plated or etched, e.g., working electrode. The working electrode is present on a holder that traverses from a first position within the tank during a plating or etch operation to a second position that is outside the containing the plating electrolyte. The fluid jet rinses the working electrode when the holder is in the second position, and the forced air dryer blows any remaining fluid from the fluid jet and the electrolyte from the working electrode into the tank.

6. 发明申请

US20050248390A1 INTEGRATED CIRCUIT CURRENT REGULATOR 失效
标题翻译：集成电路电流调节器
公开(公告)号：US20050248390A1
公开(公告)日：2005-11-10
申请号：US10908289
申请日：2005-05-05
申请人： Roland Frech , Bernd Garben
发明人： Roland Frech , Bernd Garben
IPC分类号： G06F1/26
CPC分类号： G06F1/26
摘要： An integrated circuit current regulator that compensates for variation in current required based on the switching activity of the integrated circuit. A first embodiment incorporates a voltage controlled on-chip bypass circuit with a scaling unit to divide an input voltage into n fractional voltages and an on-chip voltage monitor to compare a fraction of the on-chip supply voltage with a reference voltage and control a corresponding on-chip power supply bypass. At least one bypass resistor per comparator is switched between the supply voltage and ground potential according to the output signal of the corresponding comparator to dampen power supply noise. The value of the by-pass resistance R increases with decreasing on-chip supply voltage and decreases with increasing supply voltage. A resistance as a function of supply voltage R(Vdd) characteristic is realized to reduce or eliminate mid-frequency power supply noise, caused by on-chip switching activity variations while minimizing additional on-chip power dissipation.
摘要翻译：集成电路电流调节器，其基于集成电路的开关活动来补偿所需电流的变化。第一实施例包括具有缩放单元的电压控制片上旁路电路，以将输入电压分成n个分数电压，并且片上电压监视器将片上电源电压的一部分与参考电压进行比较，并且控制相应的片上电源旁路。每个比较器至少有一个旁路电阻根据相应比较器的输出信号在电源电压和地电位之间切换，以抑制电源噪声。旁路电阻R的值随着片上电源电压的降低而增加，随着电源电压的增加而减小。实现了作为电源电压R（Vdd）特性的电阻，以减少或消除由片上开关活动变化引起的中频电源噪声，同时最大限度地减少额外的片上功耗。

7. 发明申请

US20180122408A1 TAPE HEAD AND SYSTEM HAVING ASYMMETRICAL CONSTRUCTION 审中-公开
公开(公告)号：US20180122408A1
公开(公告)日：2018-05-03
申请号：US15789477
申请日：2017-10-20
申请人： International Business Machines Corporation
发明人： Robert G. Biskeborn
IPC分类号： G11B5/187 , G11B5/008 , G11B5/48
CPC分类号： G11B5/187 , G11B5/00813 , G11B5/4893
摘要： An apparatus according to one embodiment includes a module having a tape bearing surface, a first edge, and a second edge, where a tape tenting region extends from the first edge toward the second edge, the first edge being a first end of the tape tenting region, a second end of the tape tenting region being positioned between the first and second edges. The apparatus includes a guide positioned relative to the first edge for inducing tenting of a moving magnetic recording tape and a transducer positioned in the tape tenting region. In addition, the module has a wear coating on a media facing side of the transducer, where a peak height is defined between the peak of tenting and an upper surface of the coating. The thickness of the wear coating is in a range of between about 0.5 and about 3 times the peak height.

8. 发明申请

US20170244794A1 SERVICE MANAGEMENT MODES OF OPERATION IN DISTRIBUTED NODE SERVICE MANAGEMENT 审中-公开
公开(公告)号：US20170244794A1
公开(公告)日：2017-08-24
申请号：US15588348
申请日：2017-05-05
申请人： International Business Machines Corporation
发明人： Joseph W. Dain , Stefan Lehmann , Dan Melamed
IPC分类号： H04L29/08
CPC分类号： H04L67/16 , G06F9/5061 , H04L67/10
摘要： A distributed node service management system utilizes multiple existing processor nodes of a distributed computing system, in support of the primary data processing functions of the distributed computing system. The distributed node service management system coordinates and manages service functions on behalf of processor nodes of the distributed computing system. Other features and aspects may be realized, depending upon the particular application.

9. 发明授权

US4817186A Locating individual images in a field for recognition or the like 失效
标题翻译：在字段中查找单个图像以进行识别等
公开(公告)号：US4817186A
公开(公告)日：1989-03-28
申请号：US024905
申请日：1987-03-12
申请人： Michael A. Goolsbey , Eugene R. Jones , William F. Micka , Thomas S. Robinson
发明人： Michael A. Goolsbey , Eugene R. Jones , William F. Micka , Thomas S. Robinson
IPC分类号： G06K9/34 , G06K9/20
CPC分类号： G06K9/342 , G06K2209/01
摘要： A field of scanned video pels is first broken up into cells representing small portions of characters to be recognized, according to a first set of logics. A second set of logics then recombines the cells into blocks containing individual characters separated from their neighbors.
摘要翻译：根据第一组逻辑，扫描的视频像素的字段首先被分解成表示待识别的小部分字符的单元。然后，第二组逻辑将单元格重新组合成包含与其邻居分离的单独字符的块。

10. 发明申请

US20200382301A1 ANONYMOUS RATING STRUCTURE FOR DATABASE 审中-公开
公开(公告)号：US20200382301A1
公开(公告)日：2020-12-03
申请号：US16428418
申请日：2019-05-31
申请人： International Business Machines Corporation
发明人： Rishi Saket , Pankaj S. Dayama , Nitin Singh
IPC分类号： H04L9/32 , H04L9/08 , H04L29/06
摘要： An example operation may include one or more of receiving, from an executing client, a blockchain transaction comprising an anonymous rating related to an authorizing client, a merkle tree root node value, a proof, and a nullifier, and in response, executing, by a smart contract, a valid historical value assert call on a lookback key storing the merkle tree root node value, verifying, through a valid historical value assert call, that the merkle tree root node value is a current or previous value of the merkle tree root node value, verifying the proof with the merkle tree root node value and the nullifier, adding the anonymous rating to a shared ledger, marking the nullifier as used, and storing the marked nullifier to the shared ledger.

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