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    • 2. 发明授权
    • Data archive system
    • 数据归档系统
    • US09390745B2
    • 2016-07-12
    • US14623981
    • 2015-02-17
    • Hitachi-LG Data Storage, Inc.
    • Shinichi ShimodaSeiji Miura
    • G11B21/08G11B17/00G11B17/22G11B27/00G11B19/20
    • G11B17/005G11B17/228G11B19/209G11B27/002G11B2220/2537G11B2220/41
    • A data archive system includes a data library apparatus and a server. The data library apparatus includes recording media having recording surfaces on both surfaces, a recording media storage unit for storing the recording media, a recording/reproducing unit for the surface for recording/reproducing the data on/from the surface of the recording media, a recording/reproducing unit for the rear surface for recording/reproducing the data on/from the rear surface, and a recording media transporting unit for transporting the recording media between the recording media storage units. The server includes a data configuration unit for allocating the data for recording on the surface and the rear surface of the recording media and a controller for controlling the data library apparatus. The data configuration unit of the server alternately allocates the recording data on the surface and the rear surface of the recording media different from each other.
    • 数据存档系统包括数据库装置和服务器。 数据库装置包括在两面上具有记录面的记录介质,用于存储记录介质的记录介质存储单元,用于在记录介质的表面上记录/再现数据的表面的记录/再现单元, 记录/再现单元,用于在后表面上记录/再现数据的后表面;以及记录介质传送单元,用于在记录介质存储单元之间传送记录介质。 服务器包括用于在记录介质的表面和后表面上分配用于记录的数据的数据配置单元和用于控制数据库设备的控制器。 服务器的数据配置单元交替地将记录数据彼此分配在记录介质的表面和后表面上。
    • 4. 发明申请
    • DATA ARCHIVE SYSTEM
    • 数据存档系统
    • US20150279414A1
    • 2015-10-01
    • US14623981
    • 2015-02-17
    • HITACHI-LG DATA STORAGE, INC.
    • Shinichi SHIMODASeiji MIURA
    • G11B17/00G11B19/20
    • G11B17/005G11B17/228G11B19/209G11B27/002G11B2220/2537G11B2220/41
    • A data archive system includes a data library apparatus and a server. The data library apparatus includes recording media having recording surfaces on both surfaces, a recording media storage unit for storing the recording media, a recording/reproducing unit for the surface for recording/reproducing the data on/from the surface of the recording media, a recording/reproducing unit for the rear surface for recording/reproducing the data on/from the rear surface, and a recording media transporting unit for transporting the recording media between the recording media storage units. The server includes a data configuration unit for allocating the data for recording on the surface and the rear surface of the recording media and a controller for controlling the data library apparatus. The data configuration unit of the server alternately allocates the recording data on the surface and the rear surface of the recording media different from each other.
    • 数据存档系统包括数据库装置和服务器。 数据库装置包括在两面上具有记录面的记录介质,用于存储记录介质的记录介质存储单元,用于在记录介质的表面上记录/再现数据的表面的记录/再现单元, 记录/再现单元,用于在后表面上记录/再现数据的后表面;以及记录介质传送单元,用于在记录介质存储单元之间传送记录介质。 服务器包括用于在记录介质的表面和后表面上分配用于记录的数据的数据配置单元和用于控制数据库设备的控制器。 服务器的数据配置单元交替地将记录数据彼此分配在记录介质的表面和后表面上。
    • 8. 发明授权
    • Method and apparatus for defect recovery
    • 缺陷恢复方法和装置
    • US08930781B2
    • 2015-01-06
    • US13301199
    • 2011-11-21
    • Estuardo LiconaMats Oberg
    • Estuardo LiconaMats Oberg
    • G11C29/00G11B20/10G11B27/36G11B20/18
    • G11B20/10009G11B20/10027G11B20/10222G11B20/1037G11B20/10435G11B20/10481G11B27/36G11B2020/1823G11B2220/2537
    • A signal processing circuit includes a plurality of processing-circuit modules and a logic control circuit. The plurality of processing-circuit modules is configured to process an electrical signal. The plurality of processing-circuit modules has at least one processing parameter that is adaptively adjusted based on the electrical signal. The logic control circuit is configured to receive signals from the plurality of processing-circuit modules, validate the processing based on the received signals, and control a storage circuit to sample and store a value of the processing parameter when the processing is validated. Further, the logic control circuit is configured to control the storage circuit to maintain the value of processing parameter when the processing fails validation, and to control the storage circuit to recover the processing parameter in the plurality of processing-circuit modules to the stored value when the plurality of processing-circuit modules is disturbed by a defect.
    • 信号处理电路包括多个处理电路模块和逻辑控制电路。 多个处理电路模块被配置为处理电信号。 多个处理电路模块具有至少一个基于电信号自适应地调整的处理参数。 逻辑控制电路被配置为从多个处理电路模块接收信号,基于接收到的信号来验证处理,并且当处理被验证时,控制存储电路采样并存储处理参数的值。 此外,逻辑控制电路被配置为当处理失败确认时控制存储电路来维持处理参数的值,并且控制存储电路将多个处理电路模块中的处理参数恢复为存储值 多个处理电路模块受到缺陷的干扰。
    • 9. 发明授权
    • Data capture device and method thereof
    • 数据采集​​装置及其方法
    • US08913472B2
    • 2014-12-16
    • US13747491
    • 2013-01-23
    • Chang-Jin SongPing-Chiang Yang
    • Chang-Jin SongPing-Chiang Yang
    • G11B7/00G11B20/10G11B20/12
    • G11B20/10G11B20/10222G11B2020/122G11B2220/2537
    • A data capture device including a signal processing unit, a frequency locked circuit and a match circuit is provided. The signal processing unit converts a radio frequency signal to a return-to-zero signal. The frequency locked circuit estimates a minimum interval length by the return-to-zero signal in a plurality of detecting periods, and generates an enable signal according to the minimum interval length and the return-to-zero signal. The frequency locked circuit determines whether to calibrate the enable signal according to a distribution of a plurality of enable pulses in the enable signal to generate a sampling signal. The match circuit samples the return-to-zero signal by the sampling signal and generates a synchronization signal according to a sampling result. The match circuit generates a composite synchronization signal by a virtual signal and the synchronization signal, and captures a plurality of row data from the return-to-zero signal according to the composite synchronization signal.
    • 提供了包括信号处理单元,频率锁定电路和匹配电路的数据采集装置。 信号处理单元将射频信号转换为归零信号。 频率锁定电路通过多个检测周期中的归零信号来估计最小间隔长度,并且根据最小间隔长度和归零信号产生使能信号。 频率锁定电路根据使能信号中的多个使能脉冲的分布来确定是否校准使能信号以产生采样信号。 匹配电路通过采样信号对归零信号进行采样,并根据采样结果产生同步信号。 匹配电路通过虚拟信号和同步信号生成复合同步信号,并根据复合同步信号从返回零信号中捕获多个行数据。