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1. 发明申请

US20180166313A1 THERMOPLASTIC ELASTOMER (TPE) ADHESIVE CARRIER TAPE 审中-公开
公开(公告)号：US20180166313A1
公开(公告)日：2018-06-14
申请号：US15376042
申请日：2016-12-12
申请人： Intel Corporation
发明人： Mingzhi Dai , Wen Yin , Craig S. Dunning , Robert D. Callan
IPC分类号： H01L21/683 , H01L23/00
CPC分类号： H01L21/6836 , H01L21/6835 , H01L24/83 , H01L24/93 , H01L2221/68313
摘要： Embodiments relate to a carrier tape that includes a first layer of thermoplastic elastomer (TPE) adhesive tape. The carrier tape may further include a second layer of rigid polymer with a cavity. The rigid polymer may be coupled with a surface of the TPE adhesive tape such that the TPE adhesive tape is exposed by the cavity. A die may be coupled with the TPE adhesive tape within the cavity. Other embodiments may be described and/or claimed.

2. 发明授权

US09991149B2 Semiconductor bonding with compliant resin and utilizing hydrogen implantation for transfer-wafer removal 有权
公开(公告)号：US09991149B2
公开(公告)日：2018-06-05
申请号：US14933694
申请日：2015-11-05
申请人： Skorpios Technologies, Inc.
发明人： Damien Lambert , John Spann , Stephen Krasulick
IPC分类号： H01L21/683 , H01L21/027 , H01L23/00 , H01L21/762 , G02B6/42 , H01L21/20
CPC分类号： H01L21/6835 , G02B6/4201 , H01L21/0274 , H01L21/2007 , H01L21/683 , H01L21/76254 , H01L24/03 , H01L24/27 , H01L24/75 , H01L24/83 , H01L24/89 , H01L24/94 , H01L24/95 , H01L2221/68313 , H01L2221/68318 , H01L2221/6834 , H01L2221/68354 , H01L2221/68368 , H01L2221/68381 , H01L2224/0362 , H01L2224/75305 , H01L2224/75315 , H01L2224/80201 , H01L2224/83001 , H01L2224/83203 , H01L2225/06593 , H01L2924/01014 , H01L2924/1032 , H01L2924/12041 , H01L2924/12042 , H01L2924/12043 , H01L2924/15738
摘要： A transfer substrate with a compliant resin is used to bond one or more chips to a target wafer. An implant region is formed in a transfer substrate. A portion of the transfer substrate is etched to form a riser. Compliant material is applied to the transfer substrate. A chip is secured to the compliant material, wherein the chip is secured to the compliant material above the riser. The chip is bonded to a target wafer while the chip is secured to the compliant material. The transfer substrate and compliant material are removed from the chip. The transfer substrate is opaque to UV light.

3. 发明授权

US09761566B1 Multi-die structure and method of forming same 有权
公开(公告)号：US09761566B1
公开(公告)日：2017-09-12
申请号：US15097445
申请日：2016-04-13
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Chen-Hua Yu , Po-Hao Tsai , Jing-Cheng Lin , Li-Hui Cheng
IPC分类号： H01L21/48 , H01L25/10 , H01L23/552 , H01L25/00 , H01L21/683 , H01L23/31 , H01L21/56 , H01L23/00
CPC分类号： H01L25/105 , H01L21/561 , H01L21/565 , H01L21/568 , H01L21/6835 , H01L23/3128 , H01L23/552 , H01L24/11 , H01L24/14 , H01L25/50 , H01L2221/68313 , H01L2221/68345 , H01L2221/68359 , H01L2221/68381 , H01L2224/13009 , H01L2224/18 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058
摘要： A method includes forming a semiconductor device comprising a semiconductor die surrounded by a molding material, wherein a contact metal of the semiconductor device has an exposed edge, placing the semiconductor device into a tray having an inner wall and an outer wall, wherein the inner wall is underneath the semiconductor device and between an outer edge of the semiconductor device and an outer edge of bumps of the semiconductor device, depositing a metal shielding layer on the semiconductor device and the tray, wherein the metal shielding layer is in direct contact with the exposed edge of the contact metal and separating the semiconductor device from the tray.

4. 发明申请

US20170256502A1 Wafer Level Shielding in Multi-Stacked Fan Out Packages and Methods of Forming Same 审中-公开
公开(公告)号：US20170256502A1
公开(公告)日：2017-09-07
申请号：US15601625
申请日：2017-05-22
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Wei-Yu Chen , Hsien-Wei Chen , An-Jhih Su , Jo-Mei Wang , Tien-Chung Yang
IPC分类号： H01L23/552 , H01L25/00 , H01L25/065 , H01L23/48 , H01L21/56 , H01L23/29 , H01L21/78 , H01L21/768 , H01L21/683 , H01L21/3205 , H01L23/31
CPC分类号： H01L23/552 , H01L21/3205 , H01L21/561 , H01L21/565 , H01L21/568 , H01L21/6835 , H01L21/76802 , H01L21/76877 , H01L21/78 , H01L23/293 , H01L23/3107 , H01L23/481 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L24/32 , H01L24/73 , H01L24/92 , H01L24/97 , H01L25/0657 , H01L25/50 , H01L2221/68313 , H01L2221/68331 , H01L2221/68345 , H01L2221/68359 , H01L2221/68372 , H01L2224/04105 , H01L2224/12105 , H01L2224/19 , H01L2224/32225 , H01L2224/73267 , H01L2224/92244 , H01L2225/06548 , H01L2924/18162 , H01L2924/3025 , H01L2224/83005
摘要： An embodiment device package includes a device die, a molding compound surrounding the device die, a conductive through inter-via (TIV) extending through the molding compound, and an electromagnetic interference (EMI) shield disposed over and extending along sidewalls of the molding compound. The EMI shield contacts the conductive TIV, and the conductive TIV electrically connects the EMI shield to an external connector. The external connector and the EMI shield are disposed on opposing sides of the device die.

5. 发明申请

US20170110413A1 WAFER LEVEL SHIELDING IN MULTI-STACKED FAN OUT PACKAGES AND METHODS OF FORMING SAME 有权
公开(公告)号：US20170110413A1
公开(公告)日：2017-04-20
申请号：US14918311
申请日：2015-10-20
申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
发明人： Wei-Yu Chen , Hsien-Wei Chen , An-Jhih Su , Jo-Mei Wang , Tien-Chung Yang
IPC分类号： H01L23/552 , H01L23/48 , H01L23/29 , H01L25/065 , H01L21/78 , H01L21/56 , H01L21/683 , H01L21/3205 , H01L25/00 , H01L23/31 , H01L21/768
CPC分类号： H01L23/552 , H01L21/3205 , H01L21/561 , H01L21/565 , H01L21/568 , H01L21/6835 , H01L21/76802 , H01L21/76877 , H01L21/78 , H01L23/293 , H01L23/3107 , H01L23/481 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L24/32 , H01L24/73 , H01L24/92 , H01L24/97 , H01L25/0657 , H01L25/50 , H01L2221/68313 , H01L2221/68331 , H01L2221/68345 , H01L2221/68359 , H01L2221/68372 , H01L2224/04105 , H01L2224/12105 , H01L2224/19 , H01L2224/32225 , H01L2224/73267 , H01L2224/92244 , H01L2225/06548 , H01L2924/18162 , H01L2924/3025 , H01L2224/83005
摘要： An embodiment device package includes a device die, a molding compound surrounding the device die, a conductive through inter-via (TIV) extending through the molding compound, and an electromagnetic interference (EMI) shield disposed over and extending along sidewalls of the molding compound. The EMI shield contacts the conductive TIV, and the conductive TIV electrically connects the EMI shield to an external connector. The external connector and the EMI shield are disposed on opposing sides of the device die.

6. 发明申请

US20160141198A1 PROCESS FOR TRANSFERRING LAYERS 有权
标题翻译：传送层的过程
公开(公告)号：US20160141198A1
公开(公告)日：2016-05-19
申请号：US14938492
申请日：2015-11-11
申请人： Soitec
发明人： Marcel Broekaart
IPC分类号： H01L21/683
CPC分类号： H01L21/6835 , H01L21/02002 , H01L21/185 , H01L21/7806 , H01L2221/68313 , H01L2221/68327 , H01L2221/6834 , H01L2221/68363
摘要： The invention relates to a process for transferring an active layer to a final substrate using a temporary substrate, the active layer comprises a first side having a three-dimensional surface topology, the process comprising: a first step of bonding the first side of the active layer to one side of the temporary substrate; a second step of bonding a second side of the active layer to the final substrate; and a third step of separating the active layer and the temporary substrate; the process being characterized in that the side of the temporary substrate possesses a surface topology complementary to the surface topology of the first side of the active layer, so that the surface topology of the temporary substrate encapsulates the surface topology of the first side of the active layer in the bonding first step.
摘要翻译：本发明涉及一种使用临时衬底将活性层转移到最终衬底的方法，所述活性层包括具有三维表面拓扑结构的第一侧，所述方法包括：将活性物质的第一面接合的第一步骤层到临时衬底的一侧; 将有源层的第二面接合到最终基板的第二步骤; 以及分离有源层和临时衬底的第三步骤; 该方法的特征在于，临时衬底的侧面具有与有源层的第一侧的表面拓扑互补的表面拓扑，使得临时衬底的表面拓扑封装有源层的第一侧的表面拓扑结构接合第一步中的层。

7. 发明授权

US09209142B1 Semiconductor bonding with compliant resin and utilizing hydrogen implantation for transfer-wafer removal 有权
标题翻译：与顺应性树脂半导体结合，并利用氢注入转移晶片去除
公开(公告)号：US09209142B1
公开(公告)日：2015-12-08
申请号：US14562169
申请日：2014-12-05
申请人： Skorpios Technologies, Inc.
发明人： Damien Lambert , John Spann , Stephen Krasulick
IPC分类号： H01L21/67 , H01L23/00 , H01L21/762 , H01L21/683 , H01L21/20
CPC分类号： H01L21/6835 , G02B6/4201 , H01L21/0274 , H01L21/2007 , H01L21/683 , H01L21/76254 , H01L24/03 , H01L24/27 , H01L24/75 , H01L24/83 , H01L24/89 , H01L24/94 , H01L24/95 , H01L2221/68313 , H01L2221/68318 , H01L2221/6834 , H01L2221/68354 , H01L2221/68368 , H01L2221/68381 , H01L2224/0362 , H01L2224/75305 , H01L2224/75315 , H01L2224/80201 , H01L2224/83001 , H01L2224/83203 , H01L2225/06593 , H01L2924/01014 , H01L2924/1032 , H01L2924/12041 , H01L2924/12042 , H01L2924/12043 , H01L2924/15738
摘要： A transfer substrate with a compliant resin is used to bond one or more chips to a target wafer. An implant region is formed in a transfer substrate. A portion of the transfer substrate is etched to form a riser. Compliant material is applied to the transfer substrate. A chip is secured to the compliant material, wherein the chip is secured to the compliant material above the riser. The chip is bonded to a target wafer while the chip is secured to the compliant material. The transfer substrate and compliant material are removed from the chip. The transfer substrate is opaque to UV light.
摘要翻译：使用具有顺应性树脂的转印衬底将一个或多个芯片结合到目标晶片。植入区域形成在转印衬底中。转印衬底的一部分被蚀刻以形成提升器。将合适的材料施加到转印基板上。芯片被固定到柔性材料上，其中芯片被固定到提升管上方的柔性材料。当芯片固定到顺应性材料时，芯片被结合到目标晶片。从芯片上去除转印衬底和柔顺材料。转印衬底对UV光是不透明的。

8. 发明申请

US20120292775A1 MOUNTING METHOD AND MOUNTING DEVICE 失效
标题翻译：安装方法和安装设备
公开(公告)号：US20120292775A1
公开(公告)日：2012-11-22
申请号：US13519243
申请日：2010-12-24
申请人： Michikazu Nakamura , Masahiko Sugiyama , Dai Shinozaki , Naoki Akiyama
发明人： Michikazu Nakamura , Masahiko Sugiyama , Dai Shinozaki , Naoki Akiyama
IPC分类号： H01L23/48 , H01L21/60
CPC分类号： H01L24/83 , H01L21/67132 , H01L21/67144 , H01L21/6835 , H01L24/27 , H01L24/29 , H01L24/743 , H01L24/75 , H01L24/97 , H01L2221/68313 , H01L2224/27312 , H01L2224/7565 , H01L2224/83002 , H01L2224/83143 , H01L2224/83192 , H01L2224/83193 , H01L2224/838 , H01L2224/92 , H01L2224/97 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01033 , H01L2924/01047 , H01L2924/01073 , H01L2924/14 , H01L2924/15788 , H01L2224/27 , H01L2224/83 , H01L2924/00
摘要： A mounting method of sequentially mounting elements on a substrate includes a mounting process of mounting one element, which is taken out by a take-out part from an accommodating part in which the elements are accommodated, on a first contact region of the surface of the substrate where a liquid is coated. The method further includes a coating process of coating a liquid, by a coating part movably provided together with the take-out part, on a contact region of the surface of the substrate different from the first contact region when the one element is mounted on the first region.
摘要翻译：将元件依次安装在基板上的安装方法包括安装过程，该安装方法将一个元件安装在一个元件的表面的第一接触区域上，该元件由取出部分从容纳元件被容纳的容纳部分中取出，衬底，其中涂布液体。该方法还包括一种涂覆方法，该涂覆方法通过可移动地与取出部分一起设置的涂层部分涂覆在与该第一接触区域不同的第一接触区域的基板的表面的接触区域上，第一区。

9. 发明授权

US08216919B2 Method of manufacturing a semiconductor device and substrate carrier structure 有权
标题翻译：制造半导体器件和衬底载体结构的方法
公开(公告)号：US08216919B2
公开(公告)日：2012-07-10
申请号：US13009673
申请日：2011-01-19
申请人： Yuichi Kaneko
发明人： Yuichi Kaneko
IPC分类号： H01L21/263
CPC分类号： H01L21/6835 , H01L2221/68313 , H01L2221/6835
摘要： A substrate carrier structure includes a tray and a secondary electron absorbing material. The tray holds a semiconductor substrate having a first surface on which semiconductor device elements are formed. The secondary electron absorbing material is interposed between the tray and this first surface of the semiconductor substrate. When the semiconductor substrate is irradiated with charged particles to form lattice defects, the secondary electron absorbing material prevents unwanted trapping of secondary electrons emitted from the tray, and thereby reduces the variability of electrical characteristics of semiconductor device elements formed on the semiconductor substrate.
摘要翻译：衬底载体结构包括托盘和二次电子吸收材料。托盘保持具有形成半导体器件元件的第一表面的半导体衬底。二次电子吸收材料介于托盘和半导体衬底的第一表面之间。当半导体衬底被带电粒子照射以形成晶格缺陷时，二次电子吸收材料防止从托盘发射的二次电子的不期望的捕获，从而减少形成在半导体衬底上的半导体器件元件的电特性的变化。

10. 发明授权

US08118584B2 Device and method for processing carrier tape 失效
标题翻译：载带处理装置及方法
公开(公告)号：US08118584B2
公开(公告)日：2012-02-21
申请号：US10519207
申请日：2003-06-23
申请人： Noriaki Yukawa , Hiroshi Otsuka
发明人： Noriaki Yukawa , Hiroshi Otsuka
IPC分类号： B29C59/02
CPC分类号： B29C51/18 , B29C51/261 , B29C2793/0018 , B29C2793/0036 , B65B15/04 , B65B47/04 , H01L21/6835 , H01L2221/68313 , Y10T156/1023 , Y10T428/24678
摘要： A carrier tape forming apparatus includes a tape paying-out unit for paying out a tape to be worked, a tape feeding unit for feeding the tape, a forming unit for effecting embossing on the tape, a perforating unit for perforating at least a feeding hole in the tape, and a tape taking-up unit for taking up the finished (embossed) tape thereabout. The apparatus includes also double-acting driving units provided as driving sources at least for the tape feeding unit, the forming unit and the tape taking-up unit, each driving unit being fluid-operated and movable along a straight path and a controller for independently controlling driving/stopping of the double-acting driving units for the forming unit and the tape taking-up unit in association with driving/stopping of said double-acting driving unit for the feeding unit.
摘要翻译：载带形成装置包括用于支付待加工的带的带子支付单元，用于馈送带的带馈送单元，用于在带上进行压花的成形单元，用于对至少一个进给孔进行穿孔的穿孔单元在胶带中，以及用于在其上卷取成品（压花）胶带的胶带卷取单元。该装置还包括至少用于带馈送单元，成形单元和带卷取单元作为驱动源设置的双作用驱动单元，每个驱动单元被流体操作并且可沿着直线路径移动，并且用于独立地控制器与用于进给单元的所述双作用驱动单元的驱动/停止相关联地控制用于成形单元和带卷取单元的双作用驱动单元的驱动/停止。

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