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1. 发明申请

US20190189586A1 COMPONENT JOINING APPARATUS, COMPONENT JOINING METHOD AND MOUNTED STRUCTURE 审中-公开
公开(公告)号：US20190189586A1
公开(公告)日：2019-06-20
申请号：US16205184
申请日：2018-11-29
申请人： Panasonic Intellectual Property Management Co., Ltd.
发明人： RYO FUJITA
IPC分类号： H01L23/00 , H01L33/62 , H01L33/64 , B23K3/03 , B23K35/26
CPC分类号： H01L24/75 , B23K3/0338 , B23K35/262 , H01L24/32 , H01L24/83 , H01L33/62 , H01L33/641 , H01L2224/32245 , H01L2224/75253 , H01L2224/75744 , H01L2224/83075 , H01L2224/83815 , H01L2924/0105 , H01L2924/01079 , H01L2924/014 , H01L2924/12041 , H01L2924/15747 , H01L2933/0066
摘要： A component joining apparatus, which can realize positioning between a component and a substrate with high accuracy by avoiding influence of thermal expansion of the substrate at the time of joining the component to the substrate by heating at a high temperature, includes a component supply head holding a component and a heating stage heating and holding a substrate, in which a heating region where the heating stage contacts the substrate includes a joining region of the substrate in which the component is joined, and the substrate is larger than the heating stage and a peripheral part of the substrate does not contact the heating stage.

2. 发明授权

US09984943B2 Systems and methods for aligning and coupling semiconductor structures 有权
公开(公告)号：US09984943B2
公开(公告)日：2018-05-29
申请号：US15388625
申请日：2016-12-22
申请人： Massachusetts Institute of Technology
发明人： Keith Warner , Richard P. D'Onofrio , Donna-Ruth W. Yost
IPC分类号： H01L21/66 , H01L23/00 , H01L27/06
CPC分类号： H01L22/20 , H01L21/6835 , H01L21/76898 , H01L21/8221 , H01L22/12 , H01L23/544 , H01L24/75 , H01L24/80 , H01L24/82 , H01L24/83 , H01L24/92 , H01L27/0688 , H01L2223/54426 , H01L2223/54453 , H01L2224/75744 , H01L2224/75745 , H01L2224/75753 , H01L2224/80006 , H01L2224/8013 , H01L2224/80896 , H01L2224/8203 , H01L2224/821 , H01L2224/8313 , H01L2224/9222 , H01L2224/80001 , H01L2224/82
摘要： In a system for aligning at least two semiconductor structures for coupling, an alignment device includes a mounting structure having at least first and second opposing portions. The alignment device also includes a first mounting portion movably coupled to the first portion of the mounting structure, the first mounting portion configured to couple to a first surface of a first semiconductor structure. The alignment device additionally includes a second mounting portion movably coupled to the second portion of the mounting structure, the second mounting portion configured to couple to a second surface of a second semiconductor structure. The alignment device further includes one or more imaging devices disposed above at least one of the first and second mounting portions of the alignment device, the imaging devices configured to capture and/or or detect alignment marks in at least the first semiconductor structure. A corresponding method for aligning two or more semiconductor structures for coupling is also provided.

3. 发明申请

US20180090395A1 SYSTEMS AND METHODS FOR BONDING SEMICONDUCTOR ELEMENTS 审中-公开
公开(公告)号：US20180090395A1
公开(公告)日：2018-03-29
申请号：US15830164
申请日：2017-12-04
申请人： Kulicke and Soffa Industries, Inc.
发明人： James E. Eder , David C. Schalcosky
IPC分类号： H01L21/66 , H01L23/544 , H01L23/00
CPC分类号： H01L22/20 , H01L23/544 , H01L24/75 , H01L24/81 , H01L2223/54426 , H01L2223/54486 , H01L2224/16145 , H01L2224/16225 , H01L2224/16245 , H01L2224/75343 , H01L2224/75701 , H01L2224/75734 , H01L2224/75744 , H01L2224/75753 , H01L2224/75755 , H01L2224/81121 , H01L2224/8118 , H01L2224/81203 , H01L2224/81205 , H01L2225/06513 , H01L2225/06593 , H01L2924/15311 , H01L2924/00014
摘要： A bonding machine for bonding semiconductor elements, the bonding machine including: a support structure for supporting a substrate; a bond head assembly, the bond head assembly including a bonding tool configured to bond a plurality of semiconductor elements to the substrate; an alignment structure including first alignment markings; an alignment element configured to be placed on the alignment structure using the bonding tool, the alignment element including second alignment markings; an imaging system configured to image relative positions of the first alignment markings and corresponding ones of the second alignment markings; and a computer system configured to provide an adjustment to a position of at least one of the bonding tool and the support structure during bonding of ones of the plurality of semiconductor elements to the substrate, the computer being configured to provide the adjustment at least partially based on the relative positions of the first alignment markings and the corresponding ones of the second alignment markings, the adjustment being specific to bonding of the ones of the plurality of semiconductor elements to a corresponding region of the substrate.

4. 发明授权

US09905530B2 Systems and methods for bonding semiconductor elements 有权
公开(公告)号：US09905530B2
公开(公告)日：2018-02-27
申请号：US15449466
申请日：2017-03-03
申请人： Kulicke and Soffa Industries, Inc.
发明人： Robert N. Chylak , Dominick A. DeAngelis
IPC分类号： H01L23/00 , H01L25/00 , H01L25/10 , H01L25/065
CPC分类号： H01L24/81 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/48 , H01L24/75 , H01L25/03 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2224/1134 , H01L2224/1145 , H01L2224/11462 , H01L2224/13082 , H01L2224/131 , H01L2224/13109 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13624 , H01L2224/16148 , H01L2224/16225 , H01L2224/16238 , H01L2224/48091 , H01L2224/48225 , H01L2224/48227 , H01L2224/75251 , H01L2224/75252 , H01L2224/75301 , H01L2224/75343 , H01L2224/75348 , H01L2224/75349 , H01L2224/75744 , H01L2224/75745 , H01L2224/759 , H01L2224/8112 , H01L2224/81121 , H01L2224/81193 , H01L2224/81201 , H01L2224/81203 , H01L2224/81205 , H01L2224/81207 , H01L2224/81409 , H01L2224/81424 , H01L2224/81439 , H01L2224/81444 , H01L2224/81447 , H01L2224/818 , H01L2224/81801 , H01L2224/81895 , H01L2224/81906 , H01L2225/06513 , H01L2225/1023 , H01L2225/1058 , H01L2924/01047 , H01L2924/01049 , H01L2924/01079 , H01L2924/01082 , H01L2924/15311 , H01L2924/181 , H01L2924/20102 , H01L2924/20103 , H01L2924/20104 , H01L2924/20105 , H01L2924/20106 , H01L2924/20107 , H01L2924/20301 , H01L2924/20302 , H01L2924/20303 , H01L2924/20304 , H01L2924/20305 , H01L2924/20306 , H01L2924/20307 , H01L2924/00014 , H01L2924/01029 , H01L2924/01014 , H01L2924/00012 , H01L2924/014 , H01L2224/8121 , H01L2924/00
摘要： A method of ultrasonically bonding semiconductor elements includes the steps of: (a) aligning surfaces of a plurality of first conductive structures of a first semiconductor element to respective surfaces of a plurality of second conductive structures of a second semiconductor element, wherein the surfaces of each of the plurality of first conductive structures and the plurality of second conductive structures include aluminum; and (b) ultrasonically bonding ones of the first conductive structures to respective ones of the second conductive structures.

5. 发明申请

US20170330805A1 SYSTEMS AND METHODS FOR ALIGNING AND COUPLING SEMICONDUCTOR STRUCTURES 有权
公开(公告)号：US20170330805A1
公开(公告)日：2017-11-16
申请号：US15388625
申请日：2016-12-22
申请人： Massachusetts Institute of Technology
发明人： Keith Warner , Richard P. D'Onofrio , Donna-Ruth W. Yost
IPC分类号： H01L21/66 , H01L23/00 , H01L27/06
CPC分类号： H01L22/20 , H01L21/6835 , H01L21/76898 , H01L21/8221 , H01L22/12 , H01L23/544 , H01L24/75 , H01L24/80 , H01L24/82 , H01L24/83 , H01L24/92 , H01L27/0688 , H01L2223/54426 , H01L2223/54453 , H01L2224/75744 , H01L2224/75745 , H01L2224/75753 , H01L2224/80006 , H01L2224/8013 , H01L2224/80896 , H01L2224/8203 , H01L2224/821 , H01L2224/8313 , H01L2224/9222 , H01L2224/80001 , H01L2224/82
摘要： In a system for aligning at least two semiconductor structures for coupling, an alignment device includes a mounting structure having at least first and second opposing portions. The alignment device also includes a first mounting portion movably coupled to the first portion of the mounting structure, the first mounting portion configured to couple to a first surface of a first semiconductor structure. The alignment device additionally includes a second mounting portion movably coupled to the second portion of the mounting structure, the second mounting portion configured to couple to a second surface of a second semiconductor structure. The alignment device further includes one or more imaging devices disposed above at least one of the first and second mounting portions of the alignment device, the imaging devices configured to capture and/or or detect alignment marks in at least the first semiconductor structure. A corresponding method for aligning two or more semiconductor structures for coupling is also provided.

6. 发明申请

US20170186718A1 ELECTRONIC DEVICE, ELECTRONIC DEVICE FABRICATION METHOD, AND ELECTRONIC APPARATUS 审中-公开
公开(公告)号：US20170186718A1
公开(公告)日：2017-06-29
申请号：US15368732
申请日：2016-12-05
申请人： FUJITSU LIMITED
发明人： Hidehiko Kira , Naoaki Nakamura , Sanae IIJIMA
IPC分类号： H01L23/00 , H01L23/367 , H01L21/683 , H01L23/29 , H01L25/00 , H01L21/78 , H01L25/065 , H01L23/31
CPC分类号： H01L24/17 , H01L21/56 , H01L21/6838 , H01L21/78 , H01L23/295 , H01L23/3142 , H01L23/3178 , H01L23/367 , H01L24/16 , H01L24/32 , H01L24/73 , H01L24/75 , H01L24/81 , H01L24/83 , H01L24/92 , H01L24/94 , H01L25/0657 , H01L25/50 , H01L2224/13023 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/16113 , H01L2224/16148 , H01L2224/16235 , H01L2224/16238 , H01L2224/2919 , H01L2224/2929 , H01L2224/29324 , H01L2224/29339 , H01L2224/29344 , H01L2224/29347 , H01L2224/29387 , H01L2224/73104 , H01L2224/73204 , H01L2224/75152 , H01L2224/75252 , H01L2224/75744 , H01L2224/75745 , H01L2224/75981 , H01L2224/81007 , H01L2224/81136 , H01L2224/81139 , H01L2224/81191 , H01L2224/81193 , H01L2224/81203 , H01L2224/81815 , H01L2224/831 , H01L2224/83203 , H01L2224/83862 , H01L2224/9211 , H01L2224/94 , H01L2224/97 , H01L2225/06513 , H01L2225/06589 , H01L2924/014 , H01L2924/04642 , H01L2924/05032 , H01L2924/0665 , H01L2924/0715 , H01L2924/10158 , H01L2924/00014 , H01L2224/81 , H01L2924/01047 , H01L2924/01029
摘要： An electronic device includes an electronic part including a first substrate having a group of first terminals over a first front surface and having a concavity in a back surface, a filler placed in the concavity, and a flat plate placed over the back surface with the filler therebetween, and further includes a second substrate disposed on the first front surface side of the first substrate and having a group of second terminals bonded to the group of first terminals over a second front surface opposite the first front surface. The filler and flat plate minimize deformation of the first substrate and variation in the distance between the group of first terminals and the group of second terminals caused by the deformation of the first substrate, which thereby reduces the occurrence of a failure in bonding together the group of first terminals and the group of second terminals.

7. 发明申请

US20170053889A1 BONDING DEVICE 审中-公开
标题翻译：绑定设备
公开(公告)号：US20170053889A1
公开(公告)日：2017-02-23
申请号：US15255111
申请日：2016-09-01
申请人： SHINKAWA LTD.
发明人： OSAMU KAKUTANI , HIDEHIRO TAZAWA , MASAHITO TUJI
IPC分类号： H01L23/00
CPC分类号： H01L24/741 , H01L24/75 , H01L2224/75651 , H01L2224/75744 , H01L2224/75745 , H01L2224/75804 , H01L2224/75841
摘要： Provided is a bonding apparatus including a table (52), a first reaction member (58A) and a second reaction member (58B), which are each provided movably in a Y axis direction with respect to a pedestal (41). The first and second reaction members are each configured to move in a direction opposite to the table in the Y axis direction when the table moves in the Y axis direction. As viewed in an X axis direction, the first and second reaction members are arranged on both sides of the table, respectively, with the table being interposed between the first and second reaction members, so that the centers of gravity of the first and second reaction members are positioned based on the center of gravity of the table. Consequently, the bonding apparatus can suppress an increase in space, and can improve a weight balance on the pedestal.
摘要翻译：提供了一种接合装置，其包括相对于基座（41）沿Y轴方向可移动地设置的工作台（52），第一反作用部件（58A）和第二反作用部件（58B）。第一反作用构件和第二反作用构件被构造成当工作台沿Y轴方向移动时沿与Y工作台相反的方向移动。从X轴方向观察，第一反应构件和第二反应构件分别设置在工作台的两侧，工作台位于第一和第二反应构件之间，使得第一和第二反应的重心构件基于桌子的重心定位。因此，接合装置能够抑制空间的增加，能够提高基座上的重量平衡。

8. 发明授权

US09538582B2 Warpage control in the packaging of integrated circuits 有权
标题翻译：集成电路封装中的翘曲控制
公开(公告)号：US09538582B2
公开(公告)日：2017-01-03
申请号：US13559318
申请日：2012-07-26
申请人： Ming-Da Cheng , Hsiu-Jen Lin , Cheng-Ting Chen , Wei-Yu Chen , Chien-Wei Lee , Chung-Shi Liu
发明人： Ming-Da Cheng , Hsiu-Jen Lin , Cheng-Ting Chen , Wei-Yu Chen , Chien-Wei Lee , Chung-Shi Liu
IPC分类号： B23K31/02 , H01L21/00 , H05B3/02 , H01L21/677 , H01L21/683 , H01L23/00
CPC分类号： H05B3/02 , B23K3/087 , B23K2101/40 , H01L21/67721 , H01L21/6838 , H01L24/75 , H01L24/81 , H01L2224/131 , H01L2224/16225 , H01L2224/16227 , H01L2224/75744 , H01L2224/7598 , H01L2224/81191 , H01L2224/81815 , H01L2224/97 , H01L2924/3511 , H01L2924/37001 , Y10T29/41 , H01L2924/00014 , H01L2224/81 , H01L2924/014
摘要： A method includes placing a first package component over a vacuum boat, wherein the vacuum boat comprises a hole, and wherein the first package component covers the hole. A second package component is placed over the first package component, wherein solder regions are disposed between the first and the second package components. The hole is vacuumed, wherein the first package component is pressed by a pressure against the vacuum boat, and wherein the pressure is generated by a vacuum in the hole. When the vacuum in the hole is maintained, the solder regions are reflowed to bond the second package component to the first package component.
摘要翻译：一种方法包括将第一包装部件放置在真空舟皿上，其中真空舟皿包括孔，并且其中第一包装部件覆盖该孔。第二包装部件放置在第一包装部件上，其中焊料区域设置在第一和第二包装部件之间。该孔被抽真空，其中第一包装部件被压靠在真空舟皿上的压力，并且其中压力由孔中的真空产生。当保持孔中的真空时，回流焊接区域以将第二包装部件结合到第一包装部件。

9. 发明申请

US20160254252A1 SYSTEMS AND METHODS FOR BONDING SEMICONDUCTOR ELEMENTS 有权
公开(公告)号：US20160254252A1
公开(公告)日：2016-09-01
申请号：US15147015
申请日：2016-05-05
申请人： Kulicke and Soffa Industries, Inc.
发明人： Robert N. Chylak , Dominick A. DeAngelis
IPC分类号： H01L25/065 , H01L23/00
CPC分类号： H01L24/81 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/48 , H01L24/75 , H01L25/03 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2224/1134 , H01L2224/1145 , H01L2224/11462 , H01L2224/13082 , H01L2224/131 , H01L2224/13109 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13624 , H01L2224/16148 , H01L2224/16225 , H01L2224/16238 , H01L2224/48091 , H01L2224/48225 , H01L2224/48227 , H01L2224/75251 , H01L2224/75252 , H01L2224/75301 , H01L2224/75343 , H01L2224/75348 , H01L2224/75349 , H01L2224/75744 , H01L2224/75745 , H01L2224/759 , H01L2224/8112 , H01L2224/81121 , H01L2224/81193 , H01L2224/81201 , H01L2224/81203 , H01L2224/81205 , H01L2224/81207 , H01L2224/81409 , H01L2224/81424 , H01L2224/81439 , H01L2224/81444 , H01L2224/81447 , H01L2224/818 , H01L2224/81801 , H01L2224/81895 , H01L2224/81906 , H01L2225/06513 , H01L2225/1023 , H01L2225/1058 , H01L2924/01047 , H01L2924/01049 , H01L2924/01079 , H01L2924/01082 , H01L2924/15311 , H01L2924/181 , H01L2924/20102 , H01L2924/20103 , H01L2924/20104 , H01L2924/20105 , H01L2924/20106 , H01L2924/20107 , H01L2924/20301 , H01L2924/20302 , H01L2924/20303 , H01L2924/20304 , H01L2924/20305 , H01L2924/20306 , H01L2924/20307 , H01L2924/00014 , H01L2924/01029 , H01L2924/01014 , H01L2924/00012 , H01L2924/014 , H01L2224/8121 , H01L2924/00
摘要： A method of ultrasonically bonding semiconductor elements includes the steps of: (a) aligning surfaces of a plurality of first conductive structures of a first semiconductor element to respective surfaces of a plurality of second conductive structures of a second semiconductor element, wherein the surfaces of each of the plurality of first conductive structures and the plurality of second conductive structures include aluminum; and (b) ultrasonically bonding ones of the first conductive structures to respective ones of the second conductive structures.

10. 发明授权

US09406640B2 Flip chip bonder and method of correcting flatness and deformation amount of bonding stage 有权
标题翻译：倒角焊接机及矫正平台度和焊接阶段变形量的方法
公开(公告)号：US09406640B2
公开(公告)日：2016-08-02
申请号：US14743050
申请日：2015-06-18
申请人： Shinkawa Ltd.
发明人： Kohei Seyama
IPC分类号： B23K31/02 , B23K37/00 , H01L23/00 , B23K3/00 , B23K37/04 , B23K1/00
CPC分类号： H01L24/75 , B23K1/0016 , B23K3/00 , B23K37/04 , H01L24/13 , H01L24/81 , H01L2224/13082 , H01L2224/13101 , H01L2224/16225 , H01L2224/75701 , H01L2224/75703 , H01L2224/75744 , H01L2224/75801 , H01L2224/75824 , H01L2224/75842 , H01L2224/75901 , H01L2224/7592 , H01L2224/81815 , H01L2924/014 , H01L2924/00014
摘要： Provided is a flip chip bonder including: a base (12); a bonding stage (20); a plurality of vertical-position adjustment support mechanisms (30) attached to the base (12), and respectively configured to support, in a vertical direction, the bonding stage (20) at a plurality of supporting points being provided on a lower surface (22) of the bonding stage (20), and to adjust positions of the supporting points in the vertical direction; and a leaf spring mechanism (40) configured to connect the base (12) with the bonding stage (20). The leaf spring mechanism (40) restrains movement of the bonding stage (20) relative to the base (12) in an X axis along a surface (21) of the bonding stage (20) and a Y axis perpendicular to the X axis, and allows first twisting about the X axis and second twisting about the Y axis of the bonding stage (20) relative to the base (12), and movement of the bonding stage (20) relative to the base (12) in the vertical direction. This provides the flip chip bonder with improved bonding quality and increased bonding speed.
摘要翻译：提供一种倒装芯片接合器，包括：基座（12）; 接合台（20）; 多个垂直位置调整支撑机构（30），其安装在所述基座（12）上，并且分别构造成在垂直方向上支撑在多个支撑点处的接合台（20），所述多个支撑点设置在下表面 22），并且调整支撑点在垂直方向上的位置; 以及板弹簧机构（40），其构造成将所述基座（12）与所述接合台（20）连接。板簧机构（40）沿着接合台（20）的表面（21）和垂直于X轴的Y轴在X轴上限制接合台（20）相对于基座（12）的移动，并且允许围绕X轴的第一扭转和关于接合台（20）的Y轴相对于基部（12）的第二扭转，以及接合台（20）相对于基座（12）在垂直方向上的移动。这提供了具有改进的接合质量和增加的接合速度的倒装焊接机。

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