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    • 7. 发明授权
    • Adjustable gain audio power amplifying circuit
    • 可调增益音频功率放大电路
    • US08643434B2
    • 2014-02-04
    • US13494991
    • 2012-06-13
    • Guojun Zhu
    • Guojun Zhu
    • H03F3/45H03G3/20
    • H03G1/04H03G3/3005
    • An adjustable gain audio power amplifying circuit includes an input unit, an audio amplifying unit connected to the input unit, a gain adjusting unit connected to the audio amplifying unit, a controlling unit connected to the gain adjusting unit, a comparing unit connected between the gain adjusting unit and the controlling unit and an output unit connected to the audio amplifying unit. The comparing unit compares an outputted signal of the output unit with a common-mode reference voltage, outputs a gain adjustment controlling signal and sends the gain adjustment controlling signal into the controlling unit. When the outputted signal equals the common-mode reference voltage, the gain adjustment controlling signal turns over and then the controlling unit detects the turnover and sends a received gain adjustment signal into the gain adjusting unit. Based on the received gain adjustment signal, the gain adjusting unit controls gains of the adjustable gain audio power amplifying circuit.
    • 可调增益音频功率放大电路包括输入单元,连接到输入单元的音频放大单元,连接到音频放大单元的增益调节单元,连接到增益调整单元的控制单元,连接在增益之间的比较单元 调节单元和控制单元以及连接到音频放大单元的输出单元。 比较单元将输出单元的输出信号与共模参考电压进行比较,输出增益调整控制信号,并将增益调整控制信号发送到控制单元。 当输出信号等于共模参考电压时,增益调整控制信号转过来,然后控制单元检测到周转量,并将接收到的增益调整信号发送到增益调整单元。 基于所接收的增益调整信号,增益调整单元控制可调节增益音频功率放大电路的增益。
    • 9. 发明申请
    • Attenuating Noise and Cross-Talk in an Audio System by Offsetting Outputs In Phase
    • 音频系统中的衰减噪声和对讲功率相位偏移输出
    • US20130088296A1
    • 2013-04-11
    • US13595276
    • 2012-08-27
    • Douglas E. HeinemanMark A. Alexander
    • Douglas E. HeinemanMark A. Alexander
    • H03F1/32H03F3/217
    • H03G3/3026H03F1/26H03F3/185H03F3/189H03F3/2173H03F3/45H03F3/45179H03F2200/03H03G1/04H03K5/003
    • An amplifier may include two or more pulse-width modulators (PWMs) controlling respective sets of switches to produce an amplified version of a source signal. The clocking for the amplifier may be controlled to delay signal processing within the PWMs relative to one another in time, thereby providing an effective time offset between the respective edge transitions of the controlling signals provided to the respective sets of switches. The PWMs may count down to zero from the next PWM duty-cycle value when a new data sample is detected, beginning a new count for each new sample, with the PWM outputting a pulse when the counter value is nonzero. A “data-sample-ready” signal may be decoded from a master counter, which may be clocked based on the high speed PWM clock, and the decode value may be adjusted to determine when the PWM should initialize to the next data sample.
    • 放大器可以包括两个或更多个脉冲宽度调制器(PWM),其控制各组开关以产生源信号的放大版本。 可以控制放大器的时钟以在时间上相对于彼此延迟PWM内的信号处理,从而在提供给各组开关的控制信号的各个边沿跃迁之间提供有效的时间偏移。 当检测到新的数据采样时,PWM可以从下一个PWM占空比值倒数为零,开始每个新采样的新计数,当计数器值为非零时,PWM输出脉冲。 数据采样就绪信号可以从主计数器解码,主计数器可以基于高速PWM时钟进行计时,并且可以调整解码值以确定PWM应该何时初始化到下一个数据采样。