会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明申请
    • Method for driving a power semiconductor
    • 驱动功率半导体的方法
    • US20030067342A1
    • 2003-04-10
    • US10246407
    • 2002-09-19
    • Oscar ApeldoornEric CarrollPeter StreitAndre Weber
    • H03K017/72
    • H03K17/0403H03K17/08124H03K17/105
    • The integrated gate dual transistor (IGDT) has two controllable gates (G1, G2), a first gate (G1) being provided on the cathode side and being driven via a low-inductance first gate terminal with a first gate current, and a second gate (G2) being provided on the anode side and being driven via a low-inductance second gate terminal with a second gate current. In the switch-off operation of the IGDT, the rate of rise of the voltage across the IGDT is limited via the two gates. Limiting the rate of rise of the voltage across the IGDT prevents voltages from building up at different speeds in a series circuit of IGDTs, and thus unequal loads from overheating and destroying the individual IGDTs.
    • 集成栅极双晶体管(IGDT)具有两个可控制栅极(G1,G2),第一栅极(G1)设置在阴极侧并通过具有第一栅极电流的低电感第一栅极端子驱动,第二栅极 栅极(G2)设置在阳极侧,并通过具有第二栅极电流的低电感第二栅极端子驱动。 在IGDT的关断操作中,IGDT两端的电压上升速率通过两个门限制。 限制IGDT两端电压的上升速率可防止IGDT串联电路中以不同速度建立电压,从而防止各个IGDT过热和破坏的负载不相等。
    • 5. 发明授权
    • Protective device against excessive currents, in particular for resettable protection of a controlled switch
    • 防过载电流的保护装置,特别是受控开关的可复位保护
    • US06342994B1
    • 2002-01-29
    • US09367351
    • 2000-02-04
    • Jean-Pierre CousySerge Batongue
    • Jean-Pierre CousySerge Batongue
    • H02H504
    • H03K17/08124H02H9/026H03K17/08144
    • A protective device against excessive currents occurring in an electric circuit between a voltage source and a load mounted downstream of said device, comprising a first triggering component with high current sensitivity and adapted to be triggered, rapidly, but reversibly, in case of excessive current in the circuit, and a second triggering component, mounted in parallel with the first, capable of bearing a temporary voltage higher than the power supply voltage, when the first component is triggered, and of being triggered rapidly and reversibly thereafter. The triggering component are preferably conductive polymer components. Also, a triac switch comprising such a protective device mounted upstream of the triac and a third component is mounted on the triac trigger.
    • 一种保护装置,用于防止在电压源和安装在所述装置下游的负载之间的电路中产生的电流的过大电流,包括具有高电流灵敏度的第一触发部件,并且适于在过大电流的情况下快速但可逆地触发 所述电路和与所述第一触发部件并联安装的第二触发部件能够承受比所述第一部件触发时高于所述电源电压的临时电压,并且此后被迅速且可逆地触发。 触发组分优选为导电聚合物组分。 此外,包括安装在三端双向可控硅开关元件上游的这种保护装置和第三部件的三端双向可控硅开关安装在三端双向可控硅触发器上。
    • 6. 发明授权
    • Semiconductor switching apparatus and method of controlling a
semiconductor switching element
    • 半导体开关装置及半导体开关元件的控制方法
    • US5777506A
    • 1998-07-07
    • US700874
    • 1996-08-21
    • Kazuhiro KurachiMasanori Yamamoto
    • Kazuhiro KurachiMasanori Yamamoto
    • H01L29/744H01L29/74H02M1/06H03K17/0812H03K17/0814H03K17/16H03K17/72H03K17/732
    • H03K17/08144H03K17/08124H03K17/16H03K17/732
    • An inductance in a path (R1) from a gate electrode (3G) of a GTO (3) through a gate driver (4) and a node (13) to a cathode electrode (3K) is determined so that a turn-off gain may be not more than 1. At a turn-off, a main current (I.sub.A) is entirely commutated from the gate electrode (3G) towards the node (13) through the gate driver (4) in a direction reverse to a turn-off control current (I.sub.G) A peak voltage suppressing circuit (5) clamps an anode-cathode voltage (V.sub.A-K) which rises on, to a prescribed voltage value for a prescribed time. This prevents losses caused by a snubber circuit. Commutation of a main current to the gate prevents locally concentrating in the cathode side of the semiconductor switching element, to thereby increase the turn off capability of the semiconductor switching element. Further, this prevents or reduces dissipation of large amount produced by a discharge of the electric charges from a snubber capacitor. Thus, reduction in dissipation and in size of the whole apparatus can be achieved.
    • 确定从GTO(3)通过栅极驱动器(4)和节点(13)到阴极电极(3K)的栅电极(3G)的路径(R1)中的电感,使得关断增益 在关断时,主电流(IA)通过栅极驱动器(4)在与栅极电极(3G)相反的方向上从栅电极(3G)整个地转向节点(13) 关闭控制电流(IG)峰值电压抑制电路(5)将上升的阳极 - 阴极电压(VA-K)钳位到规定电压值达规定时间。 这可以防止由缓冲电路引起的损耗。 对栅极的主电流的换向防止半导体开关元件的阴极侧的局部集中,从而增加半导体开关元件的关断能力。 此外,这防止或减少由缓冲电容器放电电荷产生的大量的耗散。 因此,可以实现整个装置的耗散和大小的减小。
    • 7. 发明授权
    • Multi-series inverter arrangement
    • 多系列变频器布置
    • US5400242A
    • 1995-03-21
    • US21671
    • 1993-02-24
    • Takeshi AndoAkira HorieYoshio Tsutsui
    • Takeshi AndoAkira HorieYoshio Tsutsui
    • H02M1/08H02M7/48H02M7/515H03K17/0812H03K17/082H02M7/521
    • H02M7/487H03K17/08124H03K17/0824
    • In a multi-series inverter arrangement comprising a DC circuit including a neutral point output terminal and a multi-series inverter including three series connections of first through fourth GTOs, each connected in parallel with the DC circuit, the juncture of the first and second GTOs and the juncture of the third and fourth GTOs being connected to the neutral point output terminal via respective clamping diodes and the first and third GTOs and the second and fourth GTOs being on and off controlled each other in a conjugate relationship, individual gate driving circuits for the second and third GTOs being designed to provide a larger gate current, in particular, a larger wide width gate forward current to the corresponding GTOs than that provided by individual gate driving circuits for the first and fourth GTOs to the corresponding GTOs.
    • 在包括中性点输出端子的DC电路和包括第一至第四GTO的三个串联连接的多串联逆变器的多串联逆变器装置中,每一个与DC电路并联连接,第一和第二GTO的接合点 并且第三和第四GTO的接合部经由相应的钳位二极管连接到中性点输出端子,并且第一和第三GTO和第二和第四GTO彼此以共轭关系彼此接通和关断,各个栅极驱动电路用于 第二和第三GTO被设计为向相应的GTO提供比由第一和第四GTO的各个栅极驱动电路提供给相应的GTO的更大的栅极电流,特别是向相应的GTO提供更大的宽度的栅极正向电流。
    • 8. 发明授权
    • Procedure and device for detecting the non-conducting state of turn-off
thyristors
    • 检测关断晶闸管不导通状态的步骤和装置
    • US4682278A
    • 1987-07-21
    • US775471
    • 1985-09-12
    • Rainer MarquardtTheodor SalzmannMichael Peppel
    • Rainer MarquardtTheodor SalzmannMichael Peppel
    • H02M1/06G01R19/165H03K17/0812H03K17/18H03K17/73H02H7/122
    • H03K17/18G01R19/16585H03K17/08124
    • This invention concerns a procedure to operate a turn-off thyristor which can be set to a current-conducting state or a current-blocking state as a function of a switch-on command or a switch-off command. To permit particularly reliable and optimal operation of the turn-off thyristor, the voltage between its gate terminal, G, and its cathode terminal, K, is detected and when it drops below a negative threshold current value U.sub.GKS, a status signal, Z, is generated which indicates the current-blocking state of the turn-off thyristor. A further embodiment detects the gate current of the turn-off thyristor and after the appearance of the switch-off command, the status signal is generated as the polarity changes in accordance with the time derivative of the gate current. An overload of the turn-off thyristor is best recognized by having simultaneous to the appearance of the switch-off command, a time function with a preset expiration time initiated, and having a malfunction notification signal, F, generated for protective ignition of the turn-off thyristor if the time function expires prior to the appearance of the status signal.
    • 本发明涉及操作关闭晶闸管的过程,该晶闸管可以被设置为导通状态或当前阻断状态,作为接通命令或关断命令的功能。 为了允许关断晶闸管的特别可靠和最佳的操作,检测其栅极端子G及其阴极端子K之间的电压,并且当其降到低于负阈值电流值UGKS时,状态信号Z, 产生,表示关断晶闸管的电流阻断状态。 另一实施例检测关断晶闸管的栅极电流,并且在出现关断命令之后,根据栅极电流的时间导数随着极性变化而产生状态信号。 关断晶闸管的过载最好通过同时关闭断开指令的外观识别,具有预设到期时间的时间功能启动,并且具有故障通知信号F,用于保护点火的转弯 如果时间功能在状态信号出现之前到期,则断开晶闸管。
    • 9. 发明授权
    • Semiconductor switch
    • 半导体开关
    • US4071779A
    • 1978-01-31
    • US715156
    • 1976-08-17
    • Mitsuru KawanamiIchiro OhhinataShinzi Okuhara
    • Mitsuru KawanamiIchiro OhhinataShinzi Okuhara
    • H02M1/08H03K17/0812H03K17/16H03K17/73H03K17/02H03K17/60
    • H03K17/08124H03K17/73
    • A semiconductor switch of a PNPN structure comprises a PNPN switch of an equivalently four-layered structure including a P-type anode, N-type cathode, N-type gate and P-type gate, a first NPN transistor, a second PNP transistor, a level shifting circuit, and an impedance element, wherein the impedance element is connected between the collector and emitter of the first transistor, the first transistor has its collector and emitter connected to the P-type gate and N-type cathode respectively, and the second transistor has its emitter and base connected to the P-type anode and N-type gate, respectively, and has its collector connected to the base of the first transistor through the level shifting circuit. In this arrangement, the first transistor is driven by the current flowing through a PN junction at the end on the side of the anode of the PNPN switch and the level shifting circuit, so that the semiconductor switch has a great dv/dt withstanding power, operates with high sensitivity, has a high breakdown voltage in both directions and facilitates the setting of circuit constants.
    • PNPN结构的半导体开关包括具有P型阳极,N型阴极,N型栅极和P型栅极的等效四层结构的PNPN开关,第一NPN晶体管,第二PNP晶体管, 电平移动电路和阻抗元件,其中阻抗元件连接在第一晶体管的集电极和发射极之间,第一晶体管的集电极和发射极分别连接到P型栅极和N型阴极, 第二晶体管的发射极和基极分别连接到P型阳极和N型栅极,并且其集电极通过电平移位电路连接到第一晶体管的基极。 在这种布置中,第一晶体管由流过PNPN开关和电平移动电路的阳极侧端部的PN结的电流驱动,使得半导体开关具有很好的dv / dt承受功率, 以高灵敏度工作,在两个方向上具有高击穿电压,并有助于设置电路常数。