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1. 发明申请

US20160226294A1 APPARATUS AND METHOD FOR CONTROLLING DIFFERENTIAL SIGNALS OF WIRELESS POWER TRANSMITTER 有权
标题翻译：用于控制无线发射机差分信号的装置和方法
公开(公告)号：US20160226294A1
公开(公告)日：2016-08-04
申请号：US15008932
申请日：2016-01-28
申请人： Samsung Electronics Co., Ltd.
发明人： Mincheol HA , Kang-Ho BYUN , Kihyun KIM , Jihye KIM , Seho PARK , Kumjong SUN , Wooram LEE
IPC分类号： H02J7/02 , H02J7/04 , H02J50/12
CPC分类号： H02J7/025 , H02J7/04 , H02J50/12 , H03K5/151 , H04B5/0031 , H04B5/0037 , H04B5/0075
摘要： Various embodiments of the present disclosure relate to an apparatus and method for controlling a differential signal of a wireless power transmitter. For example, an apparatus for controlling a differential signal of a wireless power transmitter may include a converter configured to convert a single signal into differential signals; an amplifier operably coupled to the converter and configured amplify power of the differential signals, thereby providing amplified differential signals; a gauge operably coupled to the amplifier and configured to measure a phase difference and amplitude between the amplified differential signals; and a controller for converting a pulse width of the differential signals by controlling the converter according to measurements by the gauge. Further, various embodiments of the present disclosure also include other embodiments other than the aforementioned embodiments.
摘要翻译：本公开的各种实施例涉及用于控制无线电力发射机的差分信号的装置和方法。例如，用于控制无线电力发射机的差分信号的装置可以包括被配置为将单个信号转换成差分信号的转换器; 放大器，其可操作地耦合到所述转换器并且被配置放大所述差分信号的功率，由此提供放大的差分信号; 可操作地耦合到放大器并且被配置为测量放大的差分信号之间的相位差和幅度的量表; 以及控制器，用于通过根据量规的测量来控制转换器来转换差分信号的脉冲宽度。此外，本公开的各种实施例还包括除了上述实施例之外的其他实施例。

2. 发明授权

US08618842B2 Differential PVT/timing-skew-tolerant self-correcting circuits 有权
标题翻译：差分PVT /定时偏差自校正电路
公开(公告)号：US08618842B2
公开(公告)日：2013-12-31
申请号：US13249285
申请日：2011-09-30
申请人： Chang Ki Kwon
发明人： Chang Ki Kwon
IPC分类号： H03B1/00 , H03K3/00
CPC分类号： H03K5/151 , H03K5/1565
摘要： Systems and methods for circuits that self-correct errors due to variations in fabrication processes, voltages, and temperature (PVT), as well as input timing errors. In an exemplary embodiment, a method for improving output signal quality in a complementary logic circuit is provided. An n-type transistor in the complementary logic circuit is digitally enabled or biased with a first variable power supply. A p-type transistor in the complementary logic circuit is digitally enabled or biased with a second variable power supply, providing a voltage different from that of the first variable power supply, to mitigate a difference in the switching times between the p-type transistor and the n-type transistor.
摘要翻译：由于制造工艺，电压和温度（PVT）的变化以及输入定时误差自校正误差的电路的系统和方法。在示例性实施例中，提供了一种用于提高互补逻辑电路中的输出信号质量的方法。互补逻辑电路中的n型晶体管通过第一可变电源数字使能或偏置。互补逻辑电路中的p型晶体管通过第二可变电源数字使能或偏置，提供与第一可变电源不同的电压，以减轻p型晶体管与 n型晶体管。

3. 发明授权

US08493103B2 Output driver circuit 有权
标题翻译：输出驱动电路
公开(公告)号：US08493103B2
公开(公告)日：2013-07-23
申请号：US12987092
申请日：2011-01-08
申请人： Koji Fukuda , Hiroki Yamashita
发明人： Koji Fukuda , Hiroki Yamashita
IPC分类号： H03B1/00 , H03K3/00
CPC分类号： H03K5/151 , H03K19/01721 , H04L25/0272 , H04L25/0278 , H04L25/0282 , H04L25/0286 , H04L25/03878
摘要： Disclosed is an output driver circuit capable of realizing reduction in power consumption, and/or enhancement in transmission waveform quality in addition to an increase in transmission speed. The output driver circuit is provided with, for example, a voltage-signal generation circuit block VSG_BK for driving positive negative output-nodes (TXP, TXN) by voltage, -pulse-signal generation circuits PGEN1, PGEN 2 for generating a pulse signal upon a transition of data input signals DIN_P, DIN_N, and current-signal generation circuit blocks ISG_BKp1, ISG_BKn1, for driving TXP, TXN by current for the duration of a pulse width of the pulse-signal. The current-signal generation circuit block executes high-speed charging of parasitic capacitors Cp1, Cp2, occurring to TXP, TXN, respectively, while executing charging of parasitic capacitors Cp1, Cp2, occurring to impedance Z0 respectively. VSG_BK decides a voltage level at TXP, TXN, in the stationary state, keeping TXP, TXN as terminal nodes at impedance Z0, respectively.
摘要翻译：公开了除了传输速度的提高之外，还能够实现功率消耗的降低和/或传输波形质量的提高。输出驱动电路例如具有用于通过电压驱动正负输出节点（TXP，TXN）的电压信号生成电路块VSG_BK，用于产生脉冲信号的脉冲信号生成电路PGEN1，PGEN2 数据输入信号DIN_P，DIN_N和电流信号产生电路块ISG_BKp1，ISG_BKn1的转换，用于在脉冲信号的脉冲宽度的持续时间内通过电流驱动TXP，TXN。电流信号发生电路块分别对发生在阻抗Z0上的寄生电容器Cp1，Cp2进行充电，分别执行对TXP，TXN发生的寄生电容器Cp1，Cp2的高速充电。在固定状态下，VSG_BK决定TXP，TXN的电压电平，分别将TXP，TXN作为终端节点保持在阻抗Z0。

4. 发明授权

US08436661B2 Input buffer capable of expanding an input level range 失效
标题翻译：能够扩展输入电平范围的输入缓冲器
公开(公告)号：US08436661B2
公开(公告)日：2013-05-07
申请号：US13030337
申请日：2011-02-18
申请人： Dong Uk Lee
发明人： Dong Uk Lee
IPC分类号： H03K3/00
CPC分类号： H03K19/017509 , H03K5/082 , H03K5/151 , H03K5/1565 , H03K19/018564
摘要： An input buffer includes a first amplification block, a second amplification block, and a buffer block. The first amplification block is configured to be driven by an external voltage, to differentially amplify an input signal and a reference voltage in response to a bias voltage, and to subsequently generate first and second differential signals. The second amplification block is configured to be driven by an internal voltage, to differentially amplify the first and second differential signals, and to generate an output signal. The buffer block is configured to be driven by the internal voltage, to buffer the output signal, and to output an inverted output signal.
摘要翻译：输入缓冲器包括第一放大块，第二放大块和缓冲块。第一放大块被配置为由外部电压驱动，以响应于偏置电压差分地放大输入信号和参考电压，并且随后产生第一和第二差分信号。第二放大块被配置为由内部电压驱动，差分放大第一和第二差分信号，并产生输出信号。缓冲块被配置为由内部电压驱动，以缓冲输出信号，并输出反相输出信号。

5. 发明申请

US20130082743A1 SEMICONDUCTOR DEVICE GENERATES COMPLEMENTARY OUTPUT SIGNALS 失效
标题翻译：半导体器件产生补充输出信号
公开(公告)号：US20130082743A1
公开(公告)日：2013-04-04
申请号：US13610541
申请日：2012-09-11
申请人： Takenori SATO , Shinya Miyazaki
发明人： Takenori SATO , Shinya Miyazaki
IPC分类号： H03B27/00
CPC分类号： H03K5/151
摘要： A splitter circuit in a semiconductor device includes a first inverter that receives an input signal and outputs an inverted signal, a second inverter that receives the inverted signal and outputs a non-inverted signal (a first output signal), a third inverter that receives the input signal and outputs an inverted signal (a second output signal) and an auxiliary inverter that shares an output signal line with the third inverter. The third inverter and the auxiliary inverter use an inverted signal of the input signal as power supplies.
摘要翻译：半导体器件中的分路器电路包括接收输入信号并输出反相信号的第一反相器，接收反相信号并输出非反相信号（第一输出信号）的第二反相器，接收第输出信号并输出与第三反相器共享输出信号线的反相信号（第二输出信号）和辅助逆变器。第三个逆变器和辅助逆变器使用输入信号的反相信号作为电源。

6. 发明申请

US20120146987A1 SIGNAL TRANSMITTING ASSEMBLY FOR CUTTING OFF DRIVING SIGNAL FOR DRIVING DESIGNATED LIGHT SOURCE AND ELECTRONIC APPARATUS HAVING THE SAME 有权
标题翻译：用于切断用于驱动指定光源的驱动信号的信号发送组件和具有该光源的电子设备
公开(公告)号：US20120146987A1
公开(公告)日：2012-06-14
申请号：US13243279
申请日：2011-09-23
申请人： Chun-Hung Chen , Tzu-Chi Liu
发明人： Chun-Hung Chen , Tzu-Chi Liu
IPC分类号： G06F3/038
CPC分类号： H03K5/151
摘要： A signal transmitting circuit is provided for cutting off or outputting at least one driving signal for driving a designated light source. The signal transmitting circuit includes an input differential signaling driver, an output differential amplifier, and a fixed-voltage-level-difference supply device. The input differential signaling driver is for receiving a display signal, and outputting an inverting signal and a non-inverting signal according to the display signal. The output differential amplifier is for receiving the inverting signal and non-inverting signal and outputting or cutting off the driving signal according to the voltage-level difference between the inverting signal and the non-inverting signal. The fixed-voltage-level-difference supply device is for supplying a fixed-voltage-level difference to replace the inverting signal and the non-inverting signal received by the output differential amplifier; therefore the output of the output differential amplifier remains low voltage-level to cut off the output of light with a designated color.
摘要翻译：提供信号发送电路，用于切断或输出用于驱动指定光源的至少一个驱动信号。信号发送电路包括输入差分信号驱动器，输出差分放大器和固定电压电平差供给装置。输入差分信号驱动器用于接收显示信号，并根据显示信号输出反相信号和非反相信号。输出差分放大器用于接收反相信号和非反相信号，并根据反相信号和非反相信号之间的电压电平差输出或切断驱动信号。固定电压电平差供给装置用于提供固定电压电平差，以代替由输出差分放大器接收的反相信号和非反相信号; 因此输出差分放大器的输出保持低电压电平，以切断指定颜色的光输出。

7. 发明授权

US08111088B2 Level shifter with balanced duty cycle 有权
标题翻译：电平移位器具有平衡占空比
公开(公告)号：US08111088B2
公开(公告)日：2012-02-07
申请号：US12767370
申请日：2010-04-26
申请人： Ankit Srivastava , Xiaohong Quan
发明人： Ankit Srivastava , Xiaohong Quan
IPC分类号： H03K19/0175 , H03K19/094
CPC分类号： H03K3/356113 , H03K5/151 , H03K19/00323 , H03K2005/00136
摘要： A level shifter and method are provided for balancing a duty cycle of a signal. An input circuit receives a differential logic signal with two complimentary logic levels. A level transition balancing circuit balances the rise and fall times of a level shifted version of each complimentary logic level during a transition from a first to a second of the logic levels and a level shift. A logic element stores and provides outputs of the level shifted versions of the logic levels. The level transition balancing circuit can include a capacitor in parallel with a transfer element for each input. The capacitor destabilizes inputs to the logic element and balances the transition using a capacitance and a level previously stored in the logic element.
摘要翻译：提供电平移位器和方法来平衡信号的占空比。输入电路接收具有两个互补逻辑电平的差分逻辑信号。电平转换平衡电路在逻辑电平的第一到第二过渡期间平衡每个互补逻辑电平的电平转换版本的上升和下降时间以及电平偏移。逻辑元件存储和提供逻辑电平的电平转换版本的输出。电平转换平衡电路可以包括与用于每个输入的转移元件并联的电容器。电容使输入逻辑元件失稳，并使用电容和先前存储在逻辑元件中的电平平衡转换。

8. 发明申请

US20100327921A1 CIRCUIT ARCHITECTURE FOR EFFECTIVE COMPENSATING THE TIME SKEW OF CIRCUIT 有权
标题翻译：电路架构有效地补偿了电路的时间轴
公开(公告)号：US20100327921A1
公开(公告)日：2010-12-30
申请号：US12757505
申请日：2010-04-09
申请人： Jeng-Tzong SHIH
发明人： Jeng-Tzong SHIH
IPC分类号： H03L7/00
CPC分类号： H03K5/151 , H03K5/1565
摘要： A circuit architecture for effective compensating the time skew of circuit is disclosed. The circuit architecture comprises a required compensation circuit, two duplicated circuits, and a time skew detection and compensation circuit, wherein these duplicated circuits are the duplicates of the required compensation circuit. A differential of logic 0 and logic 1 signals are simultaneously inputted into two duplicated circuits to output a first detection signal and a second detection signal, then the time skew detection and compensation circuit detects the time skew between a first detection signal and a second detection signal so as to generate a compensation signal to the required compensation circuit. Accordingly, the time skew existed in the required compensation circuit can be reduced or eliminated.
摘要翻译：公开了一种用于有效补偿电路的时间偏差的电路架构。电路架构包括所需的补偿电路，两个复制电路和时间偏移检测和补偿电路，其中这些复制电路是所需补偿电路的重复。逻辑0和逻辑1信号的差分同时输入到两个复制电路中以输出第一检测信号和第二检测信号，然后时间偏移检测和补偿电路检测第一检测信号和第二检测信号之间的时间偏差以便产生到所需补偿电路的补偿信号。因此，可以减少或消除所需补偿电路中存在的时间偏移。

9. 发明授权

US07741875B2 Low amplitude differential output circuit and serial transmission interface using the same 有权
标题翻译：低幅差分输出电路和串行传输接口使用相同
公开(公告)号：US07741875B2
公开(公告)日：2010-06-22
申请号：US11362862
申请日：2006-02-28
申请人： Seiichi Watarai
发明人： Seiichi Watarai
IPC分类号： H03K19/094 , H03K19/0175
CPC分类号： H03K19/00323 , H03K5/003 , H03K5/151 , H04L25/0274 , H04L25/028
摘要： A low amplitude differential output circuit includes a pre-buffer circuit configured to output a main buffer drive signal of a-first drive signal and a second drive signal which are complimentary signals, as a differential signal; and a main buffer circuit connected with the pre-buffer circuit to output a differential output signal in response to the main buffer drive signal. Each of the first drive signal and the second drive signal has an amplitude between a first voltage and a second voltage, and the first drive signal and the second drive signal take a same voltage between the first voltage and a middle voltage between the first voltage and the second voltage.
摘要翻译：低振幅差分输出电路包括预缓冲器电路，其被配置为输出作为补偿信号的第一驱动信号的主缓冲器驱动信号和第二驱动信号作为差分信号; 以及与预缓冲电路连接的主缓冲电路，以响应于主缓冲驱动信号输出差分输出信号。第一驱动信号和第二驱动信号中的每一个具有第一电压和第二电压之间的幅度，并且第一驱动信号和第二驱动信号在第一电压和第一电压和第一电压之间的中间电压之间取相同的电压第二电压。

10. 发明授权

US07642839B2 Current consumption prevention apparatus of a high voltage generator 失效
标题翻译：高压发生器电流消耗预防装置
公开(公告)号：US07642839B2
公开(公告)日：2010-01-05
申请号：US12119399
申请日：2008-05-12
申请人： Je Il Ryu
发明人： Je Il Ryu
IPC分类号： G05F1/10
CPC分类号： H03K5/151 , G11C5/145 , H03K19/0019
摘要： A current consumption prevention apparatus includes a first current supply unit for transferring charges from a capacitor connected to a first inverter group to a capacitor connected to a second inverter group, and a second current supply unit for transferring charges of the capacitor connected to the second inverter group to the capacitor connected to the first inverter group. The current supply units are operated complementarily.
摘要翻译：电流消耗防止装置包括：第一电流供应单元，用于将连接到第一反相器组的电容器的电荷转移到连接到第二反相器组的电容器;以及第二电流供应单元，用于传送连接到第二反相器组的电容器的电荷组合到连接到第一个逆变器组的电容。当前的供应单元互补操作。

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