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1. 发明授权

US09985653B2 Methods and systems for soft-decision decoding 有权
公开(公告)号：US09985653B2
公开(公告)日：2018-05-29
申请号：US14683656
申请日：2015-04-10
申请人： Samsung Electronics Co., Ltd.
发明人： Yaron Shany , Jun Jin Kong
IPC分类号： H03M13/15 , G06F11/10 , H03M13/37 , H03M13/45
CPC分类号： H03M13/152 , H03M13/1515 , H03M13/1525 , H03M13/153 , H03M13/3707 , H03M13/451
摘要： At least one example embodiment discloses a method of soft-decision Wu decoding a code. The code is one of a generalized Reed-Solomon type and an alternant type. The method includes obtaining a module of the code. The module is a sub-module of at least a first extension module and a second extension module. The first extension module is defined by a set of first type constraints and the second extension module is defined by a set of second type constraints. The first type constraints are applicable to a first interpolation algorithm and a second interpolation algorithm and the second type constraints are applicable to the first interpolation algorithm. The method further includes determining a basis for the first extension module and converting the basis for the first extension module to a basis for the module.

2. 发明申请

US20180131391A1 EFFICIENT LIST DECODING OF LDPC CODES 审中-公开
公开(公告)号：US20180131391A1
公开(公告)日：2018-05-10
申请号：US15802163
申请日：2017-11-02
申请人： QUALCOMM Incorporated
发明人： Shrinivas KUDEKAR , Thomas Joseph RICHARDSON , Gabi SARKIS , Vincent LONCKE
IPC分类号： H03M13/11 , H04L1/00
CPC分类号： H03M13/1125 , H03M13/09 , H03M13/1111 , H03M13/1128 , H03M13/116 , H03M13/1185 , H03M13/2906 , H03M13/3707 , H03M13/3723 , H03M13/451 , H03M13/6306 , H03M13/6393 , H03M13/6561 , H04L1/0009 , H04L1/0045
摘要： Certain aspects of the present disclosure generally relate to methods and apparatus for decoding low density parity check (LDPC) codes, and more particularly to an efficient list decoder for list decoding low density parity check (LDPC) codes.

3. 发明授权

US09954556B2 Scheme to avoid miscorrection for turbo product codes 有权
公开(公告)号：US09954556B2
公开(公告)日：2018-04-24
申请号：US15049955
申请日：2016-02-22
申请人： SK hynix Inc.
发明人： Naveen Kumar , Aman Bhatia , Lingqi Zeng
IPC分类号： H03M13/00 , H03M13/29 , H03M13/37 , H03M13/45 , H03M13/15
CPC分类号： H03M13/2963 , H03M13/152 , H03M13/3707 , H03M13/3746 , H03M13/451 , H03M13/458
摘要： The present invention discloses a memory system and operating method thereof. The major features of the memory system and the method of operating thereof are identifying a stuck error pattern including failing constituent codes and decoding the stuck error pattern. The decoding the stuck error pattern is achieved by following steps: step 1 of using possible flipping patterns for decoding the failing constituent codes, and the number of the possible flipping patterns is 2 or more in accordance with at least the number of error bits, step 2 of obtaining a number of successfully decoded codewords after using the possible flipping patterns, and step 3 of selecting the most probable codeword from the number of successfully decoded codewords.

4. 发明申请

US20180074892A1 RECOVERY OF DATA READ FROM MEMORY WITH UNKNOWN POLARITY 审中-公开
公开(公告)号：US20180074892A1
公开(公告)日：2018-03-15
申请号：US15265869
申请日：2016-09-15
申请人： Apple Inc.
发明人： Assaf Shappir , Eyal Gurgi
IPC分类号： G06F11/10 , G11C11/22 , G11C29/52 , H03M13/29
CPC分类号： G11C29/52 , G06F11/1048 , G11C11/22 , G11C2029/0411 , H03M13/1102 , H03M13/1515 , H03M13/152 , H03M13/451
摘要： A memory controller includes an interface and circuitry. The interface is configured to communicate with a memory device, which includes multiple memory cells, and which applies refreshing to the memory cells by repeatedly inverting data stored in the memory cells. The circuitry is configured to store input data in a group of the memory cells, to read the stored input data from the group of the memory cells to produce read data, the read data has an actual polarity that is either un-inverted or inverted due to the refreshing of the memory cells in the group, to analyze the read data for identifying the actual polarity of the read data, and to recover the input data from the read data based on the identified actual polarity.

5. 发明申请

US20170338837A1 USE OF ERROR CORRECTING CODE TO CARRY ADDITIONAL DATA BITS 审中-公开
公开(公告)号：US20170338837A1
公开(公告)日：2017-11-23
申请号：US15412763
申请日：2017-01-23
申请人： INTEL CORPORATION
发明人： Daniel Greenspan , Asaf Rubinstein , Julius Yuli Mandelblat
IPC分类号： H03M13/29 , H03M13/05 , H03M13/45 , G06F11/10 , H03M13/19
CPC分类号： H03M13/2942 , G06F11/1076 , H03M13/05 , H03M13/19 , H03M13/451
摘要： Integrated circuits, systems and methods are disclosed in which data bits protected by error correction code (ECC) detection and correction may be increased such that a combination of primary and additional bits may also be ECC protected using existing ECC allocation, without affecting ECC capabilities. For example, the additional bits may be encoded into phantom bits that are in turn used in combination with the primary bits, to generate an ECC. This ECC may then be combined with the primary bits to form a code word. The code word may be transmitted (or stored) so that when the data bits are received (or retrieved), assumed values of the phantom bits may be decoded, using the ECC, back into the additional bits without the phantom bits or the additional bits ever having transmitted (or stored).

6. 发明申请

US20170220414A1 Multi-Dimensional Parity Checker (MDPC) Systems And Related Methods For External Memories 审中-公开
公开(公告)号：US20170220414A1
公开(公告)日：2017-08-03
申请号：US15008973
申请日：2016-01-28
申请人： Freescale Semiconductor, Inc.
发明人： Joseph C. Circello , David J. Schimke
IPC分类号： G06F11/10 , H03M13/15 , G11C29/52
CPC分类号： G06F11/1068 , G06F11/1048 , G11C29/52 , H03M13/1575 , H03M13/2909 , H03M13/2927 , H03M13/451 , H03M13/458
摘要： Multi-dimensional parity checker (MDPC) systems and related methods are disclosed to check parity of data regions within external memories. In one embodiment, the MDPC system includes a control register and a parity checker. The parity checker receives data segments accessed from the data region. The parity checker generates and accumulates multi-dimensional parity bits for the data segments and subsequently compares accumulated bits to expected multi-dimensional parity bits to generate multi-dimensional error syndrome bits representing identified comparison errors. The parity checker also determines a syndrome state based upon the multi-dimensional syndrome bits and stores the syndrome state within the control register. The parity checker operates in different modes based upon different values stored in an operational mode field of the control register. The parity checker can operate in a real-time error correction mode to correct errors within the data region from subsequent random accesses by components within the integrated circuit.

7. 发明授权

US09698941B2 Systems and methods for advanced iterative decoding and channel estimation of concatenated coding systems 有权
公开(公告)号：US09698941B2
公开(公告)日：2017-07-04
申请号：US14942570
申请日：2015-11-16
申请人： LN2 DB, LLC
发明人： Branimir R Vojcic , Farnaz Shayegh , Hakan Dogan , Wookwon Lee
IPC分类号： H04L27/28 , H04L1/00 , G06F11/16 , H04L25/02 , H03M13/11 , H03M13/15 , H03M13/25 , H03M13/27 , H03M13/29 , H03M13/37 , H03M13/00 , H04L27/26 , H04B17/309 , H03M13/23 , H03M13/45 , H03M13/09 , H03M13/39
CPC分类号： H04L1/0045 , G06F11/1625 , H03M13/09 , H03M13/1108 , H03M13/1111 , H03M13/112 , H03M13/1131 , H03M13/1154 , H03M13/1191 , H03M13/1515 , H03M13/23 , H03M13/255 , H03M13/27 , H03M13/2792 , H03M13/2906 , H03M13/2933 , H03M13/2948 , H03M13/3707 , H03M13/373 , H03M13/3746 , H03M13/3784 , H03M13/3938 , H03M13/45 , H03M13/451 , H03M13/453 , H03M13/612 , H03M13/616 , H03M13/6325 , H03M13/6337 , H03M13/6362 , H03M13/6541 , H03M13/6552 , H03M13/658 , H04B17/309 , H04L1/004 , H04L1/005 , H04L1/0057 , H04L1/0059 , H04L1/0065 , H04L1/0071 , H04L25/022 , H04L25/0222 , H04L25/0224 , H04L25/0236 , H04L27/261 , H04L27/2649
摘要： Systems and methods for decoding block and concatenated codes are provided. These include advanced iterative decoding techniques based on belief propagation algorithms, with particular advantages when applied to codes having higher density parity check matrices such as iterative soft-input soft-output and list decoding of convolutional codes, Reed-Solomon codes and BCH codes. Improvements are also provided for performing channel state information estimation including the use of optimum filter lengths based on channel selectivity and adaptive decision-directed channel estimation. These improvements enhance the performance of various communication systems and consumer electronics. Particular improvements are also provided for decoding HD radio signals, satellite radio signals, digital audio broadcasting (DAB) signals, digital audio broadcasting plus (DAB+) signals, digital video broadcasting-handheld (DVB-H) signals, digital video broadcasting-terrestrial (DVB-T) signals, world space system signals, terrestrial-digital multimedia broadcasting (T-DMB) signals, and China mobile multimedia broadcasting (CMMB) signals. These and other improvements enhance the decoding of different digital signals.

8. 发明申请

US20160365876A1 USE OF ERROR CORRECTING CODE TO CARRY ADDITIONAL DATA BITS 有权
标题翻译：使用错误修正代码来执行附加数据位
公开(公告)号：US20160365876A1
公开(公告)日：2016-12-15
申请号：US14740100
申请日：2015-06-15
申请人： Intel Corporation
发明人： Daniel Greenspan , Asaf Rubinstein , Julius Yuli Mandelblat
IPC分类号： H03M13/29 , G06F11/10
CPC分类号： H03M13/2942 , G06F11/1076 , H03M13/05 , H03M13/19 , H03M13/451
摘要： Integrated circuits, systems and methods are disclosed in which data bits protected by error correction code (ECC) detection and correction may be increased such that a combination of primary and additional bits may also be ECC protected using existing ECC allocation, without affecting ECC capabilities. For example, the additional bits may be encoded into phantom bits that are in turn used in combination with the primary bits, to generate an ECC. This ECC may then be combined with the primary bits to form a code word. The code word may be transmitted (or stored) so that when the data bits are received (or retrieved), assumed values of the phantom bits may be decoded, using the ECC, back into the additional bits without the phantom bits or the additional bits ever having transmitted (or stored).
摘要翻译：公开了集成电路，系统和方法，其中可以增加由纠错码（ECC）检测和校正保护的数据位，使得使用现有ECC分配也可以对主位和附加位的组合进行ECC保护，而不影响ECC能力。例如，附加比特可以被编码成虚拟比特，其依次与主比特结合使用，以生成ECC。然后可以将该ECC与主要位组合以形成代码字。代码字可以被发送（或存储），使得当数据位被接收（或检索）时，可以使用ECC将假想的虚拟位值解码为没有幻像位或附加位的附加位曾经传播（或存储）。

9. 发明授权

US09455861B2 Systems and methods for advanced iterative decoding and channel estimation of concatenated coding systems 有权
公开(公告)号：US09455861B2
公开(公告)日：2016-09-27
申请号：US14825504
申请日：2015-08-13
申请人： Digital PowerRadio, LLC
发明人： Branimir R Vojcic , Farnaz Shayegh
IPC分类号： H04L27/06 , H04L27/26 , G06F11/16 , H04L1/00 , H04L25/02 , H03M13/11 , H03M13/15 , H03M13/25 , H03M13/27 , H03M13/29 , H03M13/37 , H03M13/00 , H04B17/309 , H03M13/23 , H03M13/09
CPC分类号： H04L1/0045 , G06F11/1625 , H03M13/09 , H03M13/1108 , H03M13/1111 , H03M13/112 , H03M13/1131 , H03M13/1154 , H03M13/1191 , H03M13/1515 , H03M13/23 , H03M13/255 , H03M13/27 , H03M13/2792 , H03M13/2906 , H03M13/2933 , H03M13/2948 , H03M13/3707 , H03M13/373 , H03M13/3746 , H03M13/3784 , H03M13/3938 , H03M13/45 , H03M13/451 , H03M13/453 , H03M13/612 , H03M13/616 , H03M13/6325 , H03M13/6337 , H03M13/6362 , H03M13/6541 , H03M13/6552 , H03M13/658 , H04B17/309 , H04L1/004 , H04L1/005 , H04L1/0057 , H04L1/0059 , H04L1/0065 , H04L1/0071 , H04L25/022 , H04L25/0222 , H04L25/0224 , H04L25/0236 , H04L27/261 , H04L27/2649
摘要： Systems and methods for decoding block and concatenated codes are provided. These include advanced iterative decoding techniques based on belief propagation algorithms, with particular advantages when applied to codes having higher density parity check matrices. Improvements are also provided for performing channel state information estimation including the use of optimum filter lengths based on channel selectivity and adaptive decision-directed channel estimation. These improvements enhance the performance of various communication systems and consumer electronics. Particular improvements are also provided for decoding HD Radio signals, including enhanced decoding of reference subcarriers based on soft-diversity combining, joint enhanced channel state information estimation, as well as iterative soft-input soft-output and list decoding of convolutional codes and Reed-Solomon codes. These and other improvements enhance the decoding of different logical channels in HD Radio systems.

10. 发明申请

US20160072657A1 SYSTEMS AND METHODS FOR ADVANCED ITERATIVE DECODING AND CHANNEL ESTIMATION OF CONCATENATED CODING SYSTEMS 审中-公开
标题翻译：用于高级迭代解码和信道编码系统的信道估计的系统和方法
公开(公告)号：US20160072657A1
公开(公告)日：2016-03-10
申请号：US14942570
申请日：2015-11-16
申请人： Digital PowerRadio, LLC
发明人： Branimir R. Vojcic , Farnaz Shayegh , Hakan Dogan , Wookwon Lee
IPC分类号： H04L27/26 , H03M13/00 , H03M13/23 , H04B17/309 , H04L1/00
CPC分类号： H04L1/0045 , G06F11/1625 , H03M13/09 , H03M13/1108 , H03M13/1111 , H03M13/112 , H03M13/1131 , H03M13/1154 , H03M13/1191 , H03M13/1515 , H03M13/23 , H03M13/255 , H03M13/27 , H03M13/2792 , H03M13/2906 , H03M13/2933 , H03M13/2948 , H03M13/3707 , H03M13/373 , H03M13/3746 , H03M13/3784 , H03M13/3938 , H03M13/45 , H03M13/451 , H03M13/453 , H03M13/612 , H03M13/616 , H03M13/6325 , H03M13/6337 , H03M13/6362 , H03M13/6541 , H03M13/6552 , H03M13/658 , H04B17/309 , H04L1/004 , H04L1/005 , H04L1/0057 , H04L1/0059 , H04L1/0065 , H04L1/0071 , H04L25/022 , H04L25/0222 , H04L25/0224 , H04L25/0236 , H04L27/261 , H04L27/2649
摘要： Systems and methods for decoding block and concatenated codes are provided. These include advanced iterative decoding techniques based on belief propagation algorithms, with particular advantages when applied to codes having higher density parity check matrices such as iterative soft-input soft-output and list decoding of convolutional codes, Reed-Solomon codes and BCH codes. Improvements are also provided for performing channel state information estimation including the use of optimum filter lengths based on channel selectivity and adaptive decision-directed channel estimation. These improvements enhance the performance of various communication systems and consumer electronics. Particular improvements are also provided for decoding HD radio signals, satellite radio signals, digital audio broadcasting (DAB) signals, digital audio broadcasting plus (DAB+) signals, digital video broadcasting-handheld (DVB-H) signals, digital video broadcasting-terrestrial (DVB-T) signals, world space system signals, terrestrial-digital multimedia broadcasting (T-DMB) signals, and China mobile multimedia broadcasting (CMMB) signals. These and other improvements enhance the decoding of different digital signals.
摘要翻译：提供了用于解码块和级联代码的系统和方法。这些包括基于置信传播算法的高级迭代解码技术，当应用于具有较高密度奇偶校验矩阵的代码时，具有特别的优点，例如迭代软输入软输出和卷积码列表解码，里德 - 所罗门码和BCH码。还提供了用于执行信道状态信息估计的改进，包括基于信道选择性和自适应决策信道估计的最佳滤波器长度的使用。这些改进提高了各种通信系统和消费电子产品的性能。还提供了特别的改进，用于解码高清无线电信号，卫星无线电信号，数字音频广播（DAB）信号，数字音频广播加（DAB +）信号，数字视频广播手持（DVB-H）信号，地面数字视频广播 DVB-T）信号，世界空间系统信号，地面数字多媒体广播（T-DMB）信号和中国移动多媒体广播（CMMB）信号。这些等改进增强了不同数字信号的解码。

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