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1. 发明授权

US08102291B2 Sigma delta modulator and quantizer and quantization method thereof 有权
标题翻译： Sigma delta调制器及其量化器及其量化方法
公开(公告)号：US08102291B2
公开(公告)日：2012-01-24
申请号：US12717369
申请日：2010-03-04
申请人： Chien Hua Cheng , Tim Kuei Shia , Jia Chun Huang
发明人： Chien Hua Cheng , Tim Kuei Shia , Jia Chun Huang
IPC分类号： H03M3/00
CPC分类号： H03M3/354 , H03M3/432
摘要： A quantizer of a sigma-delta modulator includes a pulse width modulator (PWM), a converter and a voltage level tracing device. The PWM receives an input signal, and generates a PWM signal according to one or more sawtooth waves and one or more reference voltages. The converter is connected to the output of the PWM and digitizes the PWM signal to generate an output digital value. The voltage level tracing device is connected to the output of the converter, and receives the output digital value to generate a reference voltage adjustment value. The reference voltage adjustment value is transmitted to the PWM for adjusting the reference voltage, so as to change the next corresponding voltage level of the sawtooth wave to track the input signal.
摘要翻译： Σ-Δ调制器的量化器包括脉宽调制器（PWM），转换器和电压电平跟踪装置。 PWM接收输入信号，并根据一个或多个锯齿波和一个或多个参考电压产生PWM信号。转换器连接到PWM的输出端，数字化PWM信号以产生输出数字值。电压跟踪装置连接到转换器的输出，并接收输出数字值以产生参考电压调整值。参考电压调整值被传送到PWM以调整参考电压，以便改变锯齿波的下一个对应的电压电平以跟踪输入信号。

2. 发明授权

US07659842B2 Quantization error reduction in PWM full-MASH converters 有权
标题翻译： PWM全MASH转换器的量化误差减少
公开(公告)号：US07659842B2
公开(公告)日：2010-02-09
申请号：US11923550
申请日：2007-10-24
申请人： Dietmar Straussnigg , Andreas Wiesbauer , Luis Hernandez
发明人： Dietmar Straussnigg , Andreas Wiesbauer , Luis Hernandez
IPC分类号： H03M3/00
CPC分类号： H03M3/46 , H03M3/432
摘要： Techniques for reducing quantization error in electronic components are described herein.
摘要翻译：本文描述了用于减少电子部件中的量化误差的技术。

3. 发明申请

US20070109165A1 DIGITAL SATURATION HANDLING IN INTEGRAL NOISE SHAPING OF PULSE WIDTH MODULATION 有权
标题翻译：脉冲宽度调制的整体噪声形状数字饱和处理
公开(公告)号：US20070109165A1
公开(公告)日：2007-05-17
申请号：US11273286
申请日：2005-11-14
申请人： Pallab Midya , William Roeckner , John Grosspietsch , Anthony Schooler
发明人： Pallab Midya , William Roeckner , John Grosspietsch , Anthony Schooler
IPC分类号： H03M1/66
CPC分类号： H03M3/366 , H03M3/432 , H03M3/452
摘要： An audio amplifier includes a digital signal processor (DSP) that contains a noise shaping quantizer having an integrating error amplifier. The integrating error amplifier contains integrators connected in a feedback loop, a summer supplied with an output of each of the integrators, and a saturation function module producing a saturation function. A multiplier is disposed between each pair of adjacent integrators. The multiplier receives a signal from one of the adjacent integrators and the saturation function and supplies a signal to the other of the adjacent integrators. The saturation function decreases the effect of all of the integrators except an integrator to which an input signal to the integrating amplifier is supplied using an input signal to and/or an output signal from the noise shaping quantizer. This permits the duty ratio of the output signal from the noise shaping quantizer to extend from 0% to 100%.
摘要翻译：音频放大器包括包含具有积分误差放大器的噪声整形量化器的数字信号处理器（DSP）。积分误差放大器包含连接在反馈回路中的积分器，与每个积分器的输出相加的夏季以及产生饱和功能的饱和功能模块。在每对相邻的积分器之间设置乘法器。乘法器接收来自相邻积分器之一的信号和饱和度函数，并向相邻的积分器中的另一个提供信号。饱和功能降低了除了积分器之外的所有积分器的影响，使用来自噪声整形量化器的输入信号和/或来自噪声整形量化器的输出信号向积分放大器提供输入信号。这允许来自噪声整形量化器的输出信号的占空比从0％延伸到100％。

4. 发明申请

US20070085717A1 A/d-converter 有权
标题翻译： A / D转换器
公开(公告)号：US20070085717A1
公开(公告)日：2007-04-19
申请号：US10573053
申请日：2004-09-22
申请人： Kim Pedersen , Lars Arkanaes-Pedersen
发明人： Kim Pedersen , Lars Arkanaes-Pedersen
IPC分类号： H03M3/00
CPC分类号： H03M1/508 , H03M3/432 , H03M3/444
摘要： The invention relates to at least one self-oscillating loop (SOL) comprising at least one forward path (FP), at least one feedback path (FBP) wherein said at least one forward path (FP) comprises amplitude quantizing means (AQM) combined with time quantizing means (TQM) and outputting at least one time and amplitude quantized signal (OS). According to the invention, a high-speed high-resolution A/D converter may be obtained.
摘要翻译：本发明涉及包括至少一个正向路径（FP），至少一个反馈路径（FBP）的至少一个自振荡回路（SOL），其中所述至少一个前向路径（FP）包括组合的幅度量化装置（AQM）具有时间量化装置（TQM）并且输出至少一个时间和幅度量化信号（OS）。根据本发明，可以获得高速高分辨率A / D转换器。

5. 发明申请

US20030058146A1 Synchronized pulse width modulator 失效
公开(公告)号：US20030058146A1
公开(公告)日：2003-03-27
申请号：US10230646
申请日：2002-08-29
申请人： Honeywell International, Inc.
发明人： Robert S. Sundquist , John Belka
IPC分类号： H03M003/02
CPC分类号： H03M3/432 , H03M3/456
摘要： A delta-sigma modulator for an analog-to-digital converter device and method for reducing a quantization error resulting from differences between the periods of the delta-sigma quantizer clock and the counter clock by using a pulse-width modulator in which the timing of the rising edge of each pulse is controlled by a relatively low-frequency clock signal, and the trailing edge of each pulse is controlled by the input analog signal level. Accordingly, the device and method are particularly effective for measuring the duty cycle of a pulse train from a delta-sigma analog-to-digital converter device when it is undesirable to run the high-frequency clock signal between the pulse-width modulator and the counter, for example when significant physical separation between the delta-sigma modulator and the counter.

6. 发明授权

US6087968A Analog to digital converter comprising an asynchronous sigma delta modulator and decimating digital filter 失效
标题翻译：模数转换器包括异步Σ-Δ调制器和抽取数字滤波器
公开(公告)号：US6087968A
公开(公告)日：2000-07-11
申请号：US60086
申请日：1998-04-14
申请人： Engel Roza
发明人： Engel Roza
IPC分类号： H03M3/02 , H03M3/00
CPC分类号： H03M3/432
摘要： An analog to digital converter comprises an asynchronous sigma-delta modulator generating an asynchronous duty cycle modulated square wave, sampling means to synchronously sample the asynchronous square wave and a decimating digital filter to convert the samples from the sampling means into a desired PCM-format.
摘要翻译：模数转换器包括产生异步占空比调制方波的异步Σ-Δ调制器，用于同步采样异步方波的采样装置和抽取数字滤波器，以将来自采样装置的采样转换成期望的PCM格式。

7. 发明授权

US09742381B2 Pulse width modulator and non-transitory computer readable medium for storing program for pulse width modulator 有权
公开(公告)号：US09742381B2
公开(公告)日：2017-08-22
申请号：US15342419
申请日：2016-11-03
申请人： Onkyo Corporation
发明人： Nobuya Tachimori
IPC分类号： H03M3/00 , H03K3/017
CPC分类号： H03K3/017 , H03K7/08 , H03M3/366 , H03M3/424 , H03M3/432 , H03M3/452 , H03M3/458
摘要： The pulse width modulator includes a subtraction unit configured to perform subtraction between an m value digital signal and a pulse width modulation signal; a feedforward filter unit configured such that a ΔΣ modulator to which an output signal of the subtraction unit is input and which includes integrators of a second order or higher is in cascade connection, and configured to operate with a sampling frequency FS; a product-sum computing unit configured to operate with a sampling frequency (FS/n) (n: an integer of two or more) to perform product-sum computing of an output signal of each integrator of the feedforward filter unit; and a pulse width modulation unit configured to operate with the sampling frequency (FS/n) to perform pulse width modulation of an output signal of the product-sum computing unit to output a pulse width modulation signal.

8. 发明授权

US09014216B2 Real-time time encoding and decoding machines 有权
标题翻译：实时编码和解码机
公开(公告)号：US09014216B2
公开(公告)日：2015-04-21
申请号：US12628067
申请日：2009-11-30
申请人： Aurel A. Lazar , Erno K. Simonyi , Ádám Tóth , László Tiborné Tóth
发明人： Aurel A. Lazar , Erno K. Simonyi , Laszlo T. Toth
IPC分类号： H04J3/00 , A61B5/00 , H03M1/12 , H03M1/82 , H03M3/00 , A61B5/04 , H03M1/50
CPC分类号： A61B5/0002 , A61B5/04012 , H03M1/125 , H03M1/50 , H03M1/82 , H03M3/432 , H03M3/502
摘要： Methods for decoding a signal encoded by a Time Encoding Machine (TEM) include defining a plurality of time-windows, each time-window corresponding to a portion of a TEM-encoded signal and made up of a plurality of trigger values, at least two of the time-windows overlapping, decoding each of the time-windows using a Time Decoding Machine (TDM) to generate a decoded time-window, and stitching the decoded time-windows together to generate a TEM-decoded signal.
摘要翻译：用于解码由时间编码机（TEM）编码的信号的方法包括定义多个时间窗口，每个时间窗口对应于TEM编码信号的一部分并由多个触发值组成，每个时间窗口至少两个的时间窗重叠，使用时间解码机（TDM）解码每个时间窗口以产生解码的时间窗口，并将解码的时间窗口拼接在一起以产生TEM解码的信号。

9. 发明申请

US20090109078A1 Quantization Error Reduction in PWM Full-MASH Converters 有权
标题翻译： PWM全MASH转换器的量化误差减少
公开(公告)号：US20090109078A1
公开(公告)日：2009-04-30
申请号：US11923550
申请日：2007-10-24
申请人： Dietmar Straussnigg , Andreas Wiesbauer , Luis Hernandez
发明人： Dietmar Straussnigg , Andreas Wiesbauer , Luis Hernandez
IPC分类号： H03M1/12
CPC分类号： H03M3/46 , H03M3/432
摘要： Techniques for reducing quantization error in electronic components are described herein.
摘要翻译：本文描述了用于减少电子部件中的量化误差的技术。

10. 发明授权

US07379001B2 Self-oscillating A/D-converter 有权
标题翻译：自振A / D转换器
公开(公告)号：US07379001B2
公开(公告)日：2008-05-27
申请号：US10573059
申请日：2003-09-22
申请人： Kim Rishøj Pedersen , Lars Arknæs-Pedersen
发明人： Kim Rishøj Pedersen , Lars Arknæs-Pedersen
IPC分类号： H03M3/00
CPC分类号： H03M1/508 , H03M3/432 , H03M3/444
摘要： The invention relates to at least one self-oscillating loop (SOL) comprising at least one forward path (FP), at least one feedback path (FBP) wherein said at least one forward path (FP) comprises amplitude quantizing means (AQM) combined with time quantizing means (TQM) and outputting at least one time and amplitude quantized signal (OS). According to the invention, a high-speed high-resolution A/D converter may be obtained.
摘要翻译：本发明涉及包括至少一个正向路径（FP），至少一个反馈路径（FBP）的至少一个自振荡回路（SOL），其中所述至少一个前向路径（FP）包括组合的幅度量化装置（AQM）具有时间量化装置（TQM）并且输出至少一个时间和幅度量化信号（OS）。根据本发明，可以获得高速高分辨率A / D转换器。

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