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    • 4. 发明申请
    • APPARATUS AND METHOD OF PERFORMING A DECIMATION ON A SIGNAL FOR PATTERN DETECTION
    • 在模式检测信号中执行减法的装置和方法
    • US20160373222A1
    • 2016-12-22
    • US14830100
    • 2015-08-19
    • FREESCALE SEMICONDUCTOR, INC.
    • RADU D. PRALEA
    • H04L5/00H04W72/04H04W74/08
    • H04J11/00H04B1/0021H04B1/707H04L27/2613H04L27/2636H04L27/2663H04L27/2672
    • The present application relates to a receiver for performing a decimation on a signal for pattern detection and a method of operating thereof. A frequency-domain decimator component and a pattern detector component arranged at the receiver are provided. The frequency-domain decimator component is coupled to at least one antenna to receive an input sequence of samples of the signal received at the at least one antenna. The frequency-domain decimator component is further configured to apply an anti-aliasing filter and to decimate the input sequence. The frequency-domain decimator component is further arranged to output the input sequence filtered and decimated as output sequence. The pattern detector component is coupled to the frequency-domain decimator component to receive the output sequence. The pattern detection component is further configured to perform a pattern detection based on cross-correlation values in frequency domain between the output sequence and predefined patterns.
    • 本申请涉及一种用于对模式检测信号进行抽取的接收机及其操作方法。 提供了一种布置在接收器处的频域抽取器组件和模式检测器组件。 频域抽取器组件耦合到至少一个天线以接收在至少一个天线处接收的信号的输入采样序列。 频域抽取器组件还被配置为应用抗混叠滤波器并抽取输入序列。 频域抽取器组件还被布置为输出被过滤和抽取的输入序列作为输出序列。 模式检测器组件耦合到频域抽取器组件以接收输出序列。 图案检测部件还被配置为基于输出序列和预定义图案之间的频域中的互相关值来执行图案检测。
    • 5. 发明申请
    • MULTI-CARRIER BASE STATION RECEIVER
    • 多载体基站接收器
    • US20150049666A1
    • 2015-02-19
    • US13967159
    • 2013-08-14
    • Analog Devices, Inc.
    • Antonio MONTALVOKevin G. GARD
    • H04W88/10
    • H04W88/10H04B1/0021
    • Embodiments of the present invention may provide a receiver. The receiver may include an RF section and a quadrature mixture, coupled to the RF section, to downconvert a first group of wireless signals directly to baseband frequency quadrature signals and to downconvert a second group of wireless signals to intermediate frequency quadrature signals. The receiver may also include a pair of analog-to-digital converters (ADCs) to convert the downconverted quadrature signals to corresponding digital quadrature signals. Further, the receiver may include a digital section having two paths to perform signal processing on the digital baseband frequency quadrature signals and to downconvert the digital intermediate frequency signals to baseband cancelling a third order harmonic distortion therein. The receiver may be provided on a monolithically integrated circuit.
    • 本发明的实施例可以提供一种接收机。 接收机可以包括耦合到RF部分的RF部分和正交混合,以将第一组无线信号直接下变频到基带频率正交信号,并将第二组无线信号下变频到中频正交信号。 接收机还可以包括一对模数转换器(ADC),以将下变频的正交信号转换成相应的数字正交信号。 此外,接收机可以包括具有两个路径的数字部分,以对数字基带频率正交信号执行信号处理,并且将数字中频信号下变频到基带以消除其中的三阶谐波失真。 接收机可以设置在单片集成电路上。
    • 6. 发明申请
    • WIDEBAND SOFTWARE-DEFINED RF RECEIVER
    • 宽带软件定义RF接收器
    • US20140119482A1
    • 2014-05-01
    • US14049390
    • 2013-10-09
    • NXP B.V.
    • Andreas Hans Walter WICHERN
    • H04B1/00H04B1/10
    • H04B1/0021H04B1/001H04B1/10
    • An RF receiver is disclosed. The RF receiver includes an analog-to-digital converter for converting an analog intermediate frequency band signal to a digital intermediate frequency band signal. A plurality of decimation units coupled in cascade for generating a decimated signal based on the digital intermediate frequency band signal are also included. The RF receiver further includes a signal processing unit for processing the decimated signal and a bypass path for feeding a bypass signal to the signal processing unit. The bypass signal is either the digital intermediate frequency band signal or an output signal from one of the decimation units which is not the last one of the cascade coupled decimation units. The signal processing unit is adapted to detect critical reception conditions based on the bypass signal and to adapt the processing of the decimated signal in accordance with detected critical reception conditions.
    • 公开了RF接收机。 RF接收机包括用于将模拟中频带信号转换为数字中频带信号的模数转换器。 还包括多个级联耦合的抽取单元,用于基于数字中频带信号产生抽取信号。 RF接收机还包括用于处理抽取信号的信号处理单元和用于将旁路信号馈送到信号处理单元的旁路路径。 旁路信号是数字中频带信号或来自不是级联耦合抽取单元中的最后一个的抽取单元之一的输出信号。 信号处理单元适于基于旁路信号检测关键接收条件,并根据检测到的关键接收条件来适应抽取信号的处理。
    • 9. 发明授权
    • Receiver, receiving method, filter circuit, and control method
    • 接收机,接收方式,滤波电路及控制方法
    • US07974363B2
    • 2011-07-05
    • US11869965
    • 2007-10-10
    • Hideki YokoshimaMasayoshi AbeYuya KondoYukitoshi Sanada
    • Hideki YokoshimaMasayoshi AbeYuya KondoYukitoshi Sanada
    • H03K9/00H04L27/00H03M1/12H03M3/00H03M1/66
    • H04B1/0021H04B1/28
    • A receiver supporting a plurality of radio communication systems having different specifications includes a setting unit, a clock generation circuit, a voltage-current conversion amplifier, a switch, integrators, an AD conversion circuit, and a feedback circuit. The setting unit sets a value suitable for a carrier frequency used in one selected radio communication system. The clock generation circuit generates a first clock having a first frequency and a second clock having a second frequency. The conversion amplifier converts an input voltage signal into a current signal. The switch switches between connection and disconnection modes in accordance with the first clock to output the current signal. Each integrator operates in accordance with the second clock and includes two or more switched capacitor circuits and an operational amplifier. The AD conversion circuit converts a signal supplied from the preceding integrator into digital form. The feedback circuit operates in accordance with the second clock.
    • 支持具有不同规格的多个无线电通信系统的接收机包括设置单元,时钟发生电路,电压 - 电流转换放大器,开关,积分器,AD转换电路和反馈电路。 设置单元设置适合于一个所选无线电通信系统中使用的载波频率的值。 时钟产生电路产生具有第一频率的第一时钟和具有第二频率的第二时钟。 转换放大器将输入电压信号转换为电流信号。 该开关根据第一个时钟在连接和断开模式之间切换以输出当前信号。 每个积分器根据第二时钟进行操作,并且包括两个或更多个开关电容器电路和运算放大器。 AD转换电路将从前一积分器提供的信号转换为数字形式。 反馈电路根据第二时钟进行工作。