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1. 发明申请

US20190028307A1 MULTILEVEL DRIVER FOR HIGH SPEED CHIP-TO-CHIP COMMUNICATIONS 审中-公开
公开(公告)号：US20190028307A1
公开(公告)日：2019-01-24
申请号：US16143225
申请日：2018-09-26
申请人： Kandou Labs, S.A.
发明人： Roger Ulrich
IPC分类号： H04L25/03 , H04L25/49 , H03K19/00 , H04B3/04 , H03K19/0185
CPC分类号： H04L25/03878 , H03K19/0013 , H03K19/0185 , H04B3/04 , H04L25/03133 , H04L25/03343 , H04L25/4917
摘要： A plurality of driver slice circuits arranged in parallel having a plurality of driver slice outputs, each driver slice circuit having a digital driver input and a driver slice output, each driver slice circuit configured to generate a signal level determined by the digital driver input, and a common output node connected to the plurality of driver slice outputs and a wire of a multi-wire bus, the multi-wire bus having a characteristic transmission impedance matched to an output impedance of the plurality of driver slice circuits arranged in parallel, each driver slice circuit of the plurality of driver slice circuits having an individual output impedance that is greater than the characteristic transmission impedance of the wire of the multi-wire bus.

2. 发明申请

US20190007095A1 TRANSMISSION DEVICE, TRANSMISSION METHOD, AND COMMUNICATION SYSTEM 审中-公开
公开(公告)号：US20190007095A1
公开(公告)日：2019-01-03
申请号：US16064823
申请日：2017-01-12
申请人： Sony Corporation
发明人： Hiroaki Hayashi
IPC分类号： H04B3/06 , H04L25/02
CPC分类号： H04B3/06 , H04B3/04 , H04L25/02 , H04L25/026 , H04L25/028 , H04L25/0292 , H04L25/03 , H04L25/49
摘要： A transmission device of the present disclosure includes: a driver unit that transmits a data signal with use of a first voltage state, a second voltage state, and a third voltage state interposed between the first voltage state and the second voltage state, and is configured to make a voltage in the third voltage state changeable; and a controller that changes the voltage in the third voltage state to cause the driver unit to perform emphasis.

3. 发明授权

US09985684B2 Passive equalizer capable of use in high-speed data communication 有权
公开(公告)号：US09985684B2
公开(公告)日：2018-05-29
申请号：US15053036
申请日：2016-02-25
申请人： FREESCALE SEMICONDUCTOR, INC.
发明人： Kevin Yi Cheng Chang
IPC分类号： H04B3/14 , H04B3/04
CPC分类号： H04B3/14 , H04B3/04 , H04B3/145
摘要： A passive equalizer is provided. The passive equalizer includes a first resistive element, a first inductive element, a second resistive element, and a first variable capacitor. The first resistive element is coupled between an input node and an output node. The first inductive element and the second resistive element are coupled in series between the output node and a first voltage supply node. The first variable capacitor is coupled between the input node and a first node located between the first inductive element and the second resistive element.

4. 发明申请

US20180091189A1 SYSTEM AND METHOD FOR PAM-4 TRANSMITTER BIT EQUALIZATION FOR IMPROVED CHANNEL PERFORMANCE 有权
公开(公告)号：US20180091189A1
公开(公告)日：2018-03-29
申请号：US15274579
申请日：2016-09-23
申请人： DELL PRODUCTS, LP
发明人： Arun R. Chada , Bhyrav M. Mutnury , Jiayi He
IPC分类号： H04B3/04 , H04L25/03
CPC分类号： H04B3/04 , H04L25/03343 , H04L25/03878 , H04L25/4917
摘要： A method includes receiving a serial data stream at a transmitter of a serial channel, encoding the serial data stream using a quaternary pulse amplitude modulation (PAM-4) scheme into a stream of 2-bit symbols, wherein a particular symbol is represented as a signal at one of four signal levels provided for a unit interval of time, determining that a first symbol of the encoded serial data stream is represented as a highest state of the PAM-4 scheme, and, in response, providing a first output signal on an output of the transmitter, wherein the first output signal includes a first portion at a first voltage level associated with the highest state for a first half of a first unit interval of time associated with the first symbol, followed by a second portion at a second voltage level associated with a de-emphasized highest state of the PAM-4 scheme for a second half of the first unit interval of time.

5. 发明授权

US09917711B2 Multilevel driver for high speed chip-to-chip communications 有权
公开(公告)号：US09917711B2
公开(公告)日：2018-03-13
申请号：US15402148
申请日：2017-01-09
申请人： KANDOU LABS, S.A.
发明人： Roger Ulrich
IPC分类号： H04L25/03 , H04B3/04 , H04L25/49
CPC分类号： H04L25/03878 , H03K19/0013 , H03K19/0185 , H04B3/04 , H04L25/03133 , H04L25/03343 , H04L25/4917
摘要： Transmission line driver systems are described which are comprised of multiple paralleled driver elements. The paralleled structure allows efficient generation of multiple output signal levels with adjustable output amplitude, optionally including Finite Impulse Response signal shaping and skew pre-compensation.

6. 发明授权

US09813111B2 Phantom mode datastream transmission 有权
公开(公告)号：US09813111B2
公开(公告)日：2017-11-07
申请号：US15018511
申请日：2016-02-08
申请人： AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
发明人： German Stefan Otto Feyh , Kishore Kota
IPC分类号： H04B3/04 , H04L25/03
CPC分类号： H04B3/04 , H04L25/03
摘要： A system may concurrently transport datastreams over the common, differential and phantom modes of pair conductor media. The system may implement the phantom mode transport using the differential of multiple common modes. In multiple conductor pair implementations, multiple phantom modes may share a single return signal route. In some implementations, usage of common modes and phantom modes may be paired with schemes to increase signal robustness.

7. 发明申请

US20170155425A1 Signal Processing Method and Related Device and Apparatus 审中-公开
公开(公告)号：US20170155425A1
公开(公告)日：2017-06-01
申请号：US15430620
申请日：2017-02-13
申请人： Huawei Technologies Co., Ltd.
发明人： Xingguo Gao
IPC分类号： H04B3/04 , H04L12/28
CPC分类号： H04B3/04 , H04L12/2801 , H04L12/40104 , H04N7/104
摘要： A signal processing method, a related device, and an apparatus for intelligently changing a signal frequency band according to a requirement during downlink or uplink signal transmission. The disclosure includes splitting a downlink signal into a first downlink signal and a second downlink signal, where the second downlink signal is a signal defined by a preset standard, and the downlink signal is an analog signal; performing an analog-to-digital conversion on the second downlink signal to obtain a third downlink signal; filtering the third downlink signal to obtain a fourth downlink signal; performing a digital-to-analog conversion on the fourth downlink signal to obtain a fifth downlink signal; and combining the first downlink signal and the fifth downlink signal to obtain a downlink output signal.

8. 发明授权

US09647857B2 Digital transmitter 有权
公开(公告)号：US09647857B2
公开(公告)日：2017-05-09
申请号：US15210422
申请日：2016-07-14
申请人： Massachusetts Institute of Technology
发明人： William J. Dally
IPC分类号： H03K5/159 , H04L25/49 , H04L25/03 , H04B1/16 , H04B1/04 , H04B3/04
CPC分类号： H04L25/03019 , H04B1/0483 , H04B1/1081 , H04B1/16 , H04B3/04 , H04L1/0042 , H04L25/0272 , H04L25/0282 , H04L25/03025 , H04L25/03343 , H04L25/03878 , H04L25/03885 , H04L27/01
摘要： An equalizer provided in a digital transmitter compensates for attenuation in a signal channel to a digital receiver. The equalizer generates signal levels as a logical function of bit history to emphasize transition signal levels relative to repeated signal levels. The preferred equalizer includes an FIR transition filter using a look-up table. Parallel circuits including FIR filters and digital-to-analog converters provide a high speed equalizer with lower speed circuitry. The equalizer is particularly suited to in-cabinet and local area network transmissions where feedback circuitry facilitates adaptive training of the equalizer.

9. 发明申请

US20160356836A1 APPARATUS AND METHOD FOR DATA TRANSMISSION AND TESTING 审中-公开
公开(公告)号：US20160356836A1
公开(公告)日：2016-12-08
申请号：US15170656
申请日：2016-06-01
申请人： John M Horan
发明人： John M Horan
IPC分类号： G01R31/01 , H04N7/10 , H04B3/46 , G01R31/08 , H04B3/04 , H04L27/01
CPC分类号： H04N5/775 , G01R27/32 , G01R31/021 , H04B3/04 , H04B3/46 , H04N7/102
摘要： A signal compensating high-speed data cable connects a first device to a second device. The cable comprises a signal frequency-shaping device configured to provide a signal boost in the cable, wherein an equalizer circuit in the second device receives the boosted signal and the equalizer circuit outputs a desired frequency response to conform to a desired standard. A system and method for testing high-speed data cables is also described.

10. 发明授权

US09491399B2 Video signal attenuation equalization circuit, processing apparatus, and control device and method 有权
标题翻译：视频信号衰减均衡电路，处理装置及控制装置及方法
公开(公告)号：US09491399B2
公开(公告)日：2016-11-08
申请号：US14442101
申请日：2013-05-23
申请人： Zhejiang Dahua Technology Co., Ltd.
发明人： Jun Yin , Zhicheng Ye , Zhuqiang Bao , Yun Xie , Xingming Zhang , Liquan Fu , Jiangming Zhu , Jun Wu , Jian Wu
IPC分类号： H04N5/21 , H04N7/10
CPC分类号： H04N7/104 , H04B3/04 , H04H20/78 , H04L25/03 , H04L25/03878 , H04N7/102
摘要： Disclosed are a video signal attenuation equalization circuit, a video signal processing apparatus, and a control device and method, which are used for solving the problem that the transmission of an analog video signal is distorted after the analog video signal is transmitted by a coaxial cable, so as to guarantee low signal distortion after the video signal is transmitted at a long distance. The video signal attenuation equalization circuit provided in the embodiments of the present invention comprises: a signal driving circuit, an equalization unit and an analog switch unit, wherein the signal driving circuit is connected to the equalization unit and the analog switch unit, and is used for receiving and strengthening an initial video signal, and sending the obtained strengthened initial video signal to the equalization unit and the analog switch unit; the equalization unit is used for performing attenuation equalization on the strengthened initial video signal according to the triggering of a control signal, and after the attenuation equalization sending the video signal to the analog switch unit; and the analog switch unit is used for outputting the strengthened initial video signal or the video signal sent by the equalization unit after the attenuation equalization according to the control of the control signal.
摘要翻译：公开了一种视频信号衰减均衡电路，视频信号处理装置和控制装置及方法，用于解决模拟视频信号在通过同轴电缆传输之后模拟视频信号的传输失真的问题，以便在长距离传输视频信号后保证低信号失真。本发明实施例提供的视频信号衰减均衡电路包括：信号驱动电路，均衡单元和模拟开关单元，其中信号驱动电路连接到均衡单元和模拟开关单元，并被使用用于接收和加强初始视频信号，并将获得的加强的初始视频信号发送到均衡单元和模拟开关单元; 均衡单元用于根据控制信号的触发对强化的初始视频信号执行衰减均衡，并且在将视频信号发送到模拟开关单元之后进行衰减均衡; 并且模拟开关单元用于根据控制信号的控制在衰减均衡之后输出由均衡单元发送的加强的初始视频信号或视频信号。

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