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    • 6. 发明申请
    • DIGITAL FREQUENCY DEMODULATOR WITH LOW POWER CONSUMPTION AND RELATED SYSTEM AND METHOD
    • 具有低功耗的数字频率解调器及相关系统和方法
    • US20140003472A1
    • 2014-01-02
    • US13536835
    • 2012-06-28
    • Darrell Lee Ash
    • Darrell Lee Ash
    • H04L27/06H04B3/36H04B1/38
    • H04L27/1563
    • An apparatus includes a frequency counter configured to receive an input signal containing pulses and to output a count value identifying a number of pulses in the input signal during a specified time period. The specified time period encompasses multiple cycles of the input signal. The apparatus also includes a comparator configured to receive the count value, compare the count value to a second value, and provide an output signal based on the comparison. The apparatus further includes a data latch configured to latch the output signal, where the latched value of the output signal represents a demodulated data value. The comparator could be configured to compare the count value to a fixed value associated with a desired frequency of the input signal. The comparator could also be configured to compare the count value in one specified time period to a stored count value from another specified time period.
    • 一种装置,包括配置成接收包含脉冲的输入信号的频率计数器,并且在指定的时间段期间输出识别输入信号中的脉冲数的计数值。 指定的时间段包含输入信号的多个周期。 该装置还包括比较器,被配置为接收计数值,将计数值与第二值进行比较,并且基于该比较来提供输出信号。 该装置还包括数据锁存器,配置为锁存输出信号,其中输出信号的锁存值表示解调数据值。 比较器可以被配置为将计数值与输入信号的期望频率相关联的固定值进行比较。 比较器也可以被配置为将一个指定时间段中的计数值与另一指定时间段的存储的计数值进行比较。
    • 7. 发明申请
    • DEMODULATOR AND SYSTEM FOR TRANSMITTING MODULATED INFORMATION, IN PARTICULAR FOR RADIOFREQUENCY IDENTIFICATION TAGS
    • 用于发送调制信息的解调器和系统,特别是用于无线电标识标签
    • US20120044017A1
    • 2012-02-23
    • US13266826
    • 2010-05-04
    • David Lachartre
    • David Lachartre
    • H03D3/22
    • H04L27/1563H04L27/2331H04L27/2335
    • A demodulator including a delay line adapted for receiving an input signal at an input frequency, phase or frequency modulated by symbols with a duration equal to a period of the input signal or very close to that period. The delay line has Nd outputs producing Nd signals at the input frequency but with Nd different delays offset by ΔT relative to one another, Nd being an integer number greater than or equal to 1. The demodulator also includes a register of Nd latches each receiving a respective output of the delay line and a clock signal which is the input signal, in order to store the state of the outputs of the delay lines at the end of a period of the clock signal in the register . The content of the register represents a value of an input signal modulation symbol.
    • 一种包括延迟线的解调器,其适于接收输入频率的输入信号,相位或频率由具有等于输入信号的周期或非常接近该周期的周期的符号的符号调制。 延迟线具有在输入频率处产生Nd​​信号的Nd输出,但是Nd不同的延迟偏移&Dgr; T相对于彼此,Nd是大于或等于1的整数。解调器还包括每个Nd锁存器的寄存器 接收延迟线的相应输出和作为输入信号的时钟信号,以便在时钟信号的周期结束时将延迟线的输出的状态存储在寄存器中。 寄存器的内容表示输入信号调制符号的值。
    • 8. 发明授权
    • Detector for detecting a frequency-shift keying signal by digital processing
    • 用于通过数字处理检测频移键控信号的检测器
    • US07804916B2
    • 2010-09-28
    • US11645566
    • 2006-12-27
    • Hiroji Akahori
    • Hiroji Akahori
    • H03C1/52H04L27/00H04L7/00H03K9/00H04B3/20
    • H04L27/1563
    • A frequency-shift keying (FSK) signal detector includes a binarizing circuit for receiving an FSK signal and expressing amplitude of the FSK signal in binary; a correlator for receiving the FSK signal expressed in binary and acquiring a correlation of the FSK signal; and an arithmetic unit for performing an arithmetic operation on the output of the correlator to detect and output the FSK signal. The correlator includes plural stages of shift register for sequentially shifting the FSK signal in response to a clock signal; a correlation filter for obtaining the correlation by a correlation signal sequence and a window function signal sequence which obtain a correlation value at one of two frequency components generated by frequency-shift keying; and another correlation filter for obtaining the correlation by a correlation signal sequence and a window function signal sequence which obtain a correlation value at the other of the two frequency components.
    • 频移键控(FSK)信号检测器包括二进制电路,用于接收FSK信号并以二进制表示FSK信号的幅度; 用于接收以二进制表示的FSK信号并获取FSK信号的相关性的相关器; 以及用于对相关器的输出执行算术运算以检测和输出FSK信号的算术单元。 相关器包括用于响应于时钟信号顺序移位FSK信号的多级移位寄存器; 相关滤波器,用于通过相关信号序列获得相关性,以及窗函数信号序列,其通过频移键控产生的两个频率分量之一获得相关值; 以及用于通过相关信号序列获得相关性的相关滤波器和获得两个频率分量中的另一个的相关值的窗函数信号序列。
    • 9. 发明授权
    • Method and computer program for identifying a transition in a phase-shift keying or frequency-shift keying signal
    • 用于识别相移键控或频移键控信号中的转换的方法和计算机程序
    • US07590209B2
    • 2009-09-15
    • US11323835
    • 2005-12-30
    • Stephen Ha
    • Stephen Ha
    • H04L7/00
    • H04L27/2337H04L27/144H04L27/1563
    • A system for identifying phase transitions in phase-shift keying signals and frequency transitions in frequency-shift keying signals broadly comprises a memory and a computing element capable of: selecting a portion of the signal to analyze, wherein the signal comprises a plurality of data samples; applying a transform to the signal to obtain a frequency spectrum; determining a maximum frequency spectrum corresponding to a carrier frequency; determining a starting approximation value of a slope of the phase transition; calculating a bounded limit of slopes within which to search for the phase transition; selecting a plurality of lines, calculating a sum for the data samples associated with each of the lines; and based on the sum for the data samples, identifying a line that corresponds to a location of the phase transition.
    • 用于识别相移键控信号和频移键控信号中的频率转换的相变的系统广泛地包括存储器和能够:选择要分析的信号的一部分的计算元件,其中所述信号包括多个数据样本 ; 对信号进行变换以获得频谱; 确定对应于载波频率的最大频谱; 确定相变斜率的起始近似值; 计算其中搜索相变的斜率的有界极限; 选择多条线,计算与每条线相关联的数据样本的和; 并且基于数据样本的总和,识别与相变位置相对应的线。