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1. 发明申请

US20180270399A1 LOW LATENCY TEARING WITHOUT USER PERCEPTION 审中-公开
公开(公告)号：US20180270399A1
公开(公告)日：2018-09-20
申请号：US15628292
申请日：2017-06-20
申请人： Microsoft Technology Licensing, LLC
发明人： Bennett SORBO , Steve Pronovost
IPC分类号： H04N5/073 , H04N5/12
CPC分类号： H04N5/0736 , G02B27/0172 , G09G5/395 , G09G5/399 , G09G2320/0247 , H04N5/073 , H04N5/12 , H04N5/268
摘要： Methods and devices for presenting a virtual reality image may include rendering at least one image frame received from an application for a virtual reality image for display on a display device. The methods and devices may include receiving a selection of one of a plurality of tear thresholds that define conditions for tearing in a displayed image. The methods and devices may include determining whether the rendered frame is received prior to the selected one of the plurality of tear thresholds, wherein the selected one of the plurality of tear thresholds occurs after a frame timing event that corresponds to a deadline for initiating display of a new frame. The methods and device may include communicating the rendered image frame to the display device for presentation on the display device when the rendered frame is received prior to the selected one of the plurality of tear thresholds.

2. 发明申请

US20080211963A1 Equipment For Audio-Video Processing System 审中-公开
标题翻译：音视频处理系统设备
公开(公告)号：US20080211963A1
公开(公告)日：2008-09-04
申请号：US11915401
申请日：2006-05-08
申请人： Geert Gerardus Vanderheijden , Romke Kats , Richard Ansfriedus Snijders
发明人： Geert Gerardus Vanderheijden , Romke Kats , Richard Ansfriedus Snijders
IPC分类号： H04N5/067 , H04N5/14 , H04N5/60
CPC分类号： H04N21/44 , H04N5/0736 , H04N5/602 , H04N21/2368 , H04N21/4307 , H04N21/4341 , H04N21/439
摘要： The invention provides a processing system, comprising a video signal processing unit for processing a video signal, the video signal processing entailing a video signal processing delay, and video delay control for controlling said video signal processing unit in dependence on a maximum allowed value for the video signal processing delay. The invention also provides an audio-video signal source, comprising an output for sending a video signal to a video signal processing unit, and an output for communicating to the video signal processing unit a maximum allowed value for a video signal processing delay entailed by video signal processing in the video signal processing unit. The invention further provides an audio signal processing unit, comprising an audio signal processing unit, said audio signal processing entailing an audio signal processing delay not exceeding a maximum audio delay, and an output for communicating to the video signal processing unit a maximum allowed value for a video signal processing delay entailed by video signal processing in the video signal processing unit, the maximum allowed value for the video signal processing delay depending on the maximum audio delay.
摘要翻译：本发明提供了一种处理系统，包括用于处理视频信号的视频信号处理单元，涉及视频信号处理延迟的视频信号处理以及用于根据最大允许值控制所述视频信号处理单元的视频延迟控制视频信号处理延迟。本发明还提供了一种音频 - 视频信号源，包括用于将视频信号发送到视频信号处理单元的输出端和用于与视频信号处理单元通信的输出，用于由视频所产生的视频信号处理延迟的最大允许值视频信号处理单元中的信号处理。本发明还提供了一种音频信号处理单元，包括音频信号处理单元，所述音频信号处理涉及不超过最大音频延迟的音频信号处理延迟，以及用于向视频信号处理单元传送最大允许值在视频信号处理单元中由视频信号处理引起的视频信号处理延迟，视频信号处理延迟的最大允许值取决于最大音频延迟。

3. 发明授权

US06909468B2 Positional difference correcting apparatus between two-route videos 有权
标题翻译：两路视频之间的位置差分校正装置
公开(公告)号：US06909468B2
公开(公告)日：2005-06-21
申请号：US09984585
申请日：2001-10-30
申请人： Ryoichi Kawada , Masahiro Wada , Shuichi Matsumoto
发明人： Ryoichi Kawada , Masahiro Wada , Shuichi Matsumoto
IPC分类号： H04N5/14 , H04N5/073 , H04N17/00 , H04N9/475
CPC分类号： H04N5/0736
摘要： Received videos through A and B routes are inputted in first and second variable devices and then delayed by a first and a second frame memory by one frame to be inputted in a comparator. Alternatively, these signals A and B are further delayed by one frame by third and forth frame memories and also inputted in the comparator. The comparator compares the signals obtained by delaying the signals A, B, AF and BF by one line and one pixel, respectively, between the A and B routes with respect to all combinations so as to detect the difference between them. Then, a signal having the minimum difference is detected and a first and a second memory control signal to make the difference smaller are outputted to the first and second variable delay devices. By repeating the processing, a horizontal difference, a vertical difference and a time axial difference are gradually, and then completely, corrected including when the original amount of the difference is larger than a frame delay.
摘要翻译：通过A和B路由接收的视频被输入到第一和第二可变设备中，然后由第一和第二帧存储器延迟一帧以输入比较器。或者，这些信号A和B进一步被第三和第四帧存储器延迟一帧，并且还输入到比较器中。比较器将通过将信号A，B，AF和BF分别延迟A和B路由之间的信号A，B，AF和BF获得的信号相对于所有组合进行比较，以便检测它们之间的差异。然后，检测出具有最小差异的信号，并且使第一和第二存储器控制信号使差值较小，输出到第一和第二可变延迟装置。通过重复该处理，水平差异，垂直差异和时间轴向差异逐渐地，然后完全校正，包括差异的原始量大于帧延迟的时间。

4. 发明申请

US20050057551A1 APPARATUS AND METHOD FOR IMAGE FRAME SYNCHRONIZATION 有权
标题翻译：图像帧同步的装置和方法
公开(公告)号：US20050057551A1
公开(公告)日：2005-03-17
申请号：US10605016
申请日：2003-09-01
申请人： Jin-Sheng Gong , Issac Chen
发明人： Jin-Sheng Gong , Issac Chen
IPC分类号： G06F3/14 , G09G5/00 , G09G5/18 , H04N5/073
CPC分类号： G09G5/006 , G09G5/18 , G09G2340/0407 , H04N5/0736 , H04N7/01
摘要： A source frame signal received at a first frame rate is converted to a destination frame signal output at a second frame rate. By adjusting the clock frequency of the clock signal in the destination frame signal, the second frame rate is made to be the same as the first frame rate. Adjusting the destination clock frequency prevents overflow and underflow conditions. The destination clock frequency is decreased to prevent underflow or increased to prevent overflow. The destination clock frequency during the last horizontal line is adjusted to comply with some display devices having a maximum time constraint from a last horizontal sync signal to a vertical sync signal in the destination frame signal.
摘要翻译：以第一帧速率接收的源帧信号被转换为以第二帧速率输出的目的地帧信号。通过调整目的地帧信号中的时钟信号的时钟频率，使第二帧速率与第一帧速率相同。调整目标时钟频率可以防止溢出和下溢条件。目的地时钟频率降低以防止下溢或增加以防止溢出。调整最后水平行期间的目的地时钟频率以符合从目标帧信号中的最后水平同步信号到垂直同步信号具有最大时间约束的一些显示设备。

5. 发明申请

US20030007093A1 Apparatus and method for digital processing of analog television signals 失效
标题翻译：模拟电视信号数字处理的装置和方法
公开(公告)号：US20030007093A1
公开(公告)日：2003-01-09
申请号：US10205648
申请日：2002-07-24
申请人： Pixel Instruments Corp.
发明人： J. Carl Cooper , Howard Loveless , David Wallen , Mirko Vojnovic
IPC分类号： H04N005/04
CPC分类号： H04N5/0736 , H04N9/475
摘要： This invention is an apparatus and method for digital processing of television like signals and in particular the use of oversampling and interpolation to achieve improved resolution of the digital version of such signals as compared to a digital version obtained by the use of simple A/D conversion or processing at the desired sample rate. The preferred embodiment utilizes oversampling, interpolation and various filtering in recursive and nonrecursive form to provide output video signals wherein the artifacts and distortion of the video are kept to low levels.
摘要翻译：本发明是一种用于数字处理电视机信号的装置和方法，特别是使用过采样和内插来实现与通过使用简单的A / D转换获得的数字版本相比，这种信号的数字版本的分辨率得到改善或以所需的采样率进行处理。优选实施例利用递归和非递归形式的过采样，内插和各种滤波来提供输出视频信号，其中视频的伪像和失真保持在低电平。

6. 发明授权

US06392707B1 Apparatus and method for maintaining synchronization of multiple delayed signals 失效
标题翻译：用于维持多个延迟信号的同步的装置和方法
公开(公告)号：US06392707B1
公开(公告)日：2002-05-21
申请号：US09627618
申请日：2000-07-28
申请人： J. Carl Cooper , Howard Loveless , David Wallen , Mirko Vojnovic
发明人： J. Carl Cooper , Howard Loveless , David Wallen , Mirko Vojnovic
IPC分类号： H04N9475
CPC分类号： H04N5/0736 , H04N9/475
摘要： This invention is a method and apparatus for delaying video type signals along with one or more secondary signals having a timing relationship to the video type signal. The delay maintains the timing relationship between the video type signal nd secondary signals. Operation to mute or otherwise modify the secondary signals upon the loss or corruption of the video type signal is shown. The selection of one of a plurality of reference signal candidates is shown along with the use of the input signal to provide a fixed delay.
摘要翻译：本发明是用于延迟视频类型信号以及与视频类型信号具有定时关系的一个或多个次要信号的方法和装置。延迟保持视频类型信号和次级信号之间的定时关系。显示视频类型信号丢失或损坏时静音或以其他方式修改辅助信号的操作。示出了多个参考信号候选中的一个的选择以及输入信号的使用以提供固定的延迟。

7. 发明授权

US06380981B1 Frame synchronizer 失效
标题翻译：帧同步器
公开(公告)号：US06380981B1
公开(公告)日：2002-04-30
申请号：US09365713
申请日：1999-08-03
申请人： Tadashi Kasezawa , Kenichi Asano , Masahiro Kazayama
发明人： Tadashi Kasezawa , Kenichi Asano , Masahiro Kazayama
IPC分类号： H04N9475
CPC分类号： H04N5/0736 , H04N5/04 , H04N5/147 , H04N5/4401 , H04N21/4305 , H04N21/4307 , H04N21/4341
摘要： The frame synchronizer outputs, when reading out each of the video signals stored in a plurality of frame memories provided in a frame synchronizing circuit one by one, a read control signal from a video signal read control circuit for controlling the frame synchronizing circuit in such a manner as to read out a video signal of a frame other than that of a target frame which was to be read out otherwise, in case the input/output frame phase difference output from an input/output frame phase difference detecter comes up to an amount of one frame.
摘要翻译：帧同步器在逐帧读取存储在帧同步电路中的多个帧存储器中的每个视频信号时，输出来自用于控制帧同步电路的视频信号读取控制电路的读取控制信号在从输入/输出帧相位差检测器输出的输入/输出帧相位差达到数量的情况下，读出除了要另外读出的目标帧的帧的视频信号的方式一帧。

8. 发明授权

US5953068A Reproducing decompressed audio-video data using an external video signal to produce clock signals 失效
标题翻译：使用外部视频信号再现解压缩的音频 - 视频数据，以产生时钟信号
公开(公告)号：US5953068A
公开(公告)日：1999-09-14
申请号：US491009
申请日：1995-06-15
申请人： Michael Jacobsen
发明人： Michael Jacobsen
IPC分类号： H04N5/92 , G11B20/10 , H04N5/073 , H04N5/93 , H04N7/08 , H04N7/081 , H04N7/26 , H04N5/04
CPC分类号： H04N5/0736
摘要： For an arrangement for reproducing decompressed video and/or audio data at a video and an audio reproduction clock frequency, the arrangement comprises a circuit for generating the video and/or audio reproduction clock, which the circuit derives the reproduction clocks from the externally supplied digital video signal, for the purpose of synchronizing these data and for a possibly joint representation by an external video signal.
摘要翻译：对于用于在视频和音频再现时钟频率处再现解压缩的视频和/或音频数据的装置，该装置包括用于产生视频和/或音频再现时钟的电路，该电路从外部提供的数字视频信号，用于同步这些数据和通过外部视频信号可能的联合表示。

9. 发明授权

US5946049A Apparatus and method for synchronizing multiple asynchronous signals 失效
标题翻译：用于同步多个异步信号的装置和方法
公开(公告)号：US5946049A
公开(公告)日：1999-08-31
申请号：US573468
申请日：1995-12-15
申请人： J. Carl Cooper , Howard Loveless , David Wallen , Mirko Vojnovic
发明人： J. Carl Cooper , Howard Loveless , David Wallen , Mirko Vojnovic
IPC分类号： H04N5/073 , H04N9/475
CPC分类号： H04N5/0736 , H04N9/475
摘要： This invention is a method and apparatus for synchronization high quality video like signals. The preferred embodiment is described to synchronize a plurality of mutually unsynchronized video signals as well as passing one or more associated secondary signal with each video signal with a corresponding delay. The selection of one of a plurality of reference signal candidates is shown along with the use of the input signal to provide a fixed delay.
摘要翻译：本发明是用于同步高质量视频像信号的方法和装置。描述了优选实施例以使多个相互不同步的视频信号同步，以及将一个或多个相关联的辅助信号与每个视频信号相对应地延迟。示出了多个参考信号候选中的一个的选择以及输入信号的使用以提供固定的延迟。

10. 发明授权

US5737027A Pixel interlacing apparatus and method 失效
公开(公告)号：US5737027A
公开(公告)日：1998-04-07
申请号：US365555
申请日：1994-12-27
申请人： Gary Demos
发明人： Gary Demos
IPC分类号： G06F3/14 , H04N5/073 , H04N7/01 , H04N7/12 , H04N7/26 , H04N7/30 , H04N7/08 , H04N7/087
CPC分类号： H04N19/00 , G06F3/1423 , H04N19/527 , H04N19/85 , H04N19/86 , H04N5/0736 , H04N7/01 , H04N7/125 , G06F3/14 , G09G2340/0407 , G09G2360/02 , H04N19/30 , H04N19/39 , Y10S348/91
摘要： An image processing system uses a pseudo-random pixel interlace method and apparatus for capturing groups of pixels as image frames. This pseudo-random method eliminates the artifacts commonly present in standard regular line raster scan imaging systems. Moreover, the pixel interlacing method permits the construction of higher resolution frames from a series of orthogonal lower resolution frames. An enhancement circuit deduces information from previous pixel group frames and contributes additional detail to the pixels of the frame being processed. The format of the pixel interlaced groups permits the present invention to be used in a wide variety of normally incompatible target display rates. The present invention can also be used in a computing system as an auto-synchronizer for processing signals from different sources.

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