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1. 发明申请

US20230122878A1 EXPANSION BASE UNIT, CONTROL DEVICE, CONTROL SYSTEM, AND CONTROL METHOD 有权
公开(公告)号：US20230122878A1
公开(公告)日：2023-04-20
申请号：US17917251
申请日：2020-05-19
申请人： Mitsubishi Electric Corporation
发明人： Koichi SHINKAI
IPC分类号： G06F13/20
摘要： An expansion base unit (10) includes an input connector (101, 102) communicatively connectable with a cable (C11, C12) to a connector in a previous base unit to allow receipt of a signal from the previous base unit, and a plurality of output connectors (111, 112) that each are communicatively connectable with a cable (C21, C22) to a connector of a plurality of connectors in a subsequent expansion base unit to allow transmission of the signal received by the input connector (101, 102) to the subsequent expansion base unit.

2. 发明申请

US20230096631A1 PEER-INFLUENCED ENHANCED USB POWER DELIVERY 有权
公开(公告)号：US20230096631A1
公开(公告)日：2023-03-30
申请号：US17484530
申请日：2021-09-24
申请人： Rajaram Regupathy , Saranya Gopal , Oren Novitzky , Tomer Savariego , Vrukesh V. Panse
发明人： Rajaram Regupathy , Saranya Gopal , Oren Novitzky , Tomer Savariego , Vrukesh V. Panse
IPC分类号： G06F13/38 , G06F1/3215 , G06F13/20
摘要： Universal Serial Bus (USB) Power Delivery is augmented by allowing devices that attach to the USB to include and/or have access to an enhanced device policy manager (eDPM) so that device information such as status, state, or requirements, such as power requirements, may be at least be shared by the eDPMs between, for example, a host device on the bus, a secondary device providing power to devices on the bus, and a new device attaching to the bus. Sharing device information facilitates the host having contextual awareness for the attaching device and assists with determining whether the attaching device may be enumerated on the bus. If not, such as due to insufficient power available from the secondary device, the host and/or secondary device may seek to influence bus devices to change an operating mode to accommodate the attaching device.

3. 发明授权

US11615041B2 Configurable input / output connector in a camera 有权
公开(公告)号：US11615041B2
公开(公告)日：2023-03-28
申请号：US17702179
申请日：2022-03-23
申请人： GoPro, Inc.
发明人： Yu Wang
IPC分类号： G06F13/20 , G06F13/40 , G06F13/42
摘要： A method and system for configuring a USB3 input/output port in a camera are disclosed. The method comprises responsive to an indication that a peripheral device is a non-USB3 device, remapping pins of the USB3 input/output port to a first predefined port configuration associated with an I2C protocol by remapping a RX1− pin to communicate a first I2C signal and remapping a RX1+ pin to communicate a second I2C signal, and responsive to successful authentication between the camera and the peripheral device via the I2C protocol, enabling communication with the peripheral device and remapping the pins of the USB3 input/output port to a second predefined port configuration compatible with operation of the authenticated peripheral device by remapping a TX2+ pin to communicate a first general purpose input/output signal and remapping a TX2− pin to communicate a second general purpose input/output signal.

4. 发明授权

US11615039B2 Data transmission system 有权
公开(公告)号：US11615039B2
公开(公告)日：2023-03-28
申请号：US16945693
申请日：2020-07-31
申请人： Siren Marine, Inc.
发明人： Daniel Harper , Dave Morschhauser , Phillip King Gaynor
IPC分类号： G06F13/20 , B63B79/10 , H04W4/38 , H04W4/44 , H04W4/70 , H04L12/40 , H04W4/40
摘要： A marine-type communication device that reads data from a data bus, dynamically creates new data channels for a plurality of operational systems and performs a volatility assessment to determine when to save the data for transmission to a cloud network and when to transmit the data to the cloud network.

5. 发明授权

US11609872B2 Integrated circuit having lanes interchangeable between clock and data lanes in clock forward interface receiver 有权
公开(公告)号：US11609872B2
公开(公告)日：2023-03-21
申请号：US17343704
申请日：2021-06-09
申请人： M31 TECHNOLOGY CORPORATION
发明人： Yueh-Chuan Lu , Ching-Hsiang Chang
IPC分类号： G06F13/20 , G06F1/10
摘要： An integrated circuit in a transmitter includes a multi-lane interface, N signal generating circuits, a lane selection circuit and a control circuit. The multi-lane interface has N lanes. M of the N signal generating circuits are configured to generate M clock signals respectively. (N-M) of the N signal generating circuits are configured to generate (N-M) data signals respectively. The lane selection circuit is configured to select M of the N lanes as M clock lanes by coupling the M clock signals to the M clock lanes respectively, and couple one of the (N-M) data signals to one of remaining (N-M) lanes, serving as (N-M) data lanes, according to a data select signal. The control circuit is configured to generate a data select signal according to a lane identifier of the one of the (N-M) lanes. The data select signal has a signal value mapping to the lane identifier.

6. 发明申请

US20230063078A1 SYSTEM ON A CHIP WITH SIMULTANEOUS USB COMMUNICATIONS 有权
公开(公告)号：US20230063078A1
公开(公告)日：2023-03-02
申请号：US17409895
申请日：2021-08-24
申请人： Praveen Babu Vadivelu , Jason Heger , Gerald Nilles , Alex Feinman , Dunxu Hu
发明人： Praveen Babu Vadivelu , Jason Heger , Gerald Nilles , Alex Feinman , Dunxu Hu
IPC分类号： G06F13/20 , G06F13/42 , G02C11/00
摘要： Eyewear including a frame having a first side and a second side, a first temple extending from the first side of the frame, a second temple extending from the second side of the frame, electronic components, a first system on a chip (SoC) adjacent the first side of the frame coupled to a first set of the electronic components, and a second system on a chip adjacent the second side, the second SoC coupled to the first SoC and to a second set of the plurality of electronic components. Processing workloads are balanced between the first SoC and the second SoC by performing a first set of operations with the first SoC and performing a second set of operations with the second SoC.

7. 发明授权

US11586568B2 Controller and transceiver 有权
公开(公告)号：US11586568B2
公开(公告)日：2023-02-21
申请号：US17302732
申请日：2021-05-11
申请人： NXP B.V.
发明人： Clemens Gerhardus Johannes de Haas
IPC分类号： G06F13/20 , H04L12/40
摘要： The disclosure relates to a controller and a transceiver and associated software and methods. A controller for communicating with a transceiver in a network node having a first mode of operation and a second mode of operation, the controller comprising: a first-data-terminal for communicating with the transceiver; and a second-data-terminal for communicating with the transceiver, in which the controller is configured to: in the second mode, determine receive-data based on a first-data-signal at the first-data-terminal and a second-data-signal at the second-data-terminal; determine that a change of mode from the second mode to the first mode is required; and in response to determining that a change of mode from the second mode to the first mode is required, provide a controller-mode-signal that instructs the transceiver to operate in the first mode rather than the second mode, wherein the controller-mode-signal is provided by simultaneously driving a first current on the first-data-terminal and a second current on the second-data-terminal.

8. 发明授权

US11580056B2 Control barrier network for reconfigurable data processors 有权
公开(公告)号：US11580056B2
公开(公告)日：2023-02-14
申请号：US17492403
申请日：2021-10-01
申请人： SambaNova Systems, Inc.
发明人： Raghu Prabhakar , Manish K. Shah , Ram Sivaramakrishnan , Pramod Nataraja , David Brian Jackson , Gregory Frederick Grohoski
IPC分类号： G06F15/80 , G06F15/78 , G06F13/20
摘要： A processing system comprises a control bus and a plurality of logic units. The control bus is configurable by configuration data to form signal routes in a control barrier network coupled to processing units in an array of processing units. The plurality of logic units has inputs and outputs connected to the control bus and to the array of processing units. A logic unit in the plurality of logic units is operatively coupled to a processing unit in the array of processing units and is configurable by the configuration data to consume source tokens and a status signal from the processing unit on the inputs and to produce barrier tokens and an enable signal on the outputs based on the source tokens and the status signal on the inputs.

9. 发明授权

US11579944B2 System, apparatus and method for configurable control of asymmetric multi-threading (SMT) on a per core basis 有权
公开(公告)号：US11579944B2
公开(公告)日：2023-02-14
申请号：US16190806
申请日：2018-11-14
申请人： Intel Corporation
发明人： Daniel J. Ragland , Guy M. Therien , Ankush Varma , Eric J. DeHaemer , David T. Mayo , Ariel Gur , Yoav Ben-Raphael , Mark P. Seconi
IPC分类号： G06F9/50 , G06F9/52 , G06F13/20 , G06F1/28 , G06F1/324 , G06F1/3203 , G06F1/3296 , G06F1/3287
摘要： In one embodiment, a processor includes: a plurality of cores each comprising a multi-threaded core to concurrently execute a plurality of threads; and a control circuit to concurrently enable at least one of the plurality of cores to operate in a single-threaded mode and at least one other of the plurality of cores to operate in a multi-threaded mode. Other embodiments are described and claimed.

10. 发明申请

US20230026653A1 TRANSMIT AND RECEIVE CHANNEL SWAP FOR INFORMATION HANDLING SYSTEMS, 有权
公开(公告)号：US20230026653A1
公开(公告)日：2023-01-26
申请号：US17443125
申请日：2021-07-21
申请人： Dell Products L.P.
发明人： Timothy M. Lambert , Bhyrav Murthy Mutnury , Sandor Farkas
IPC分类号： G06F13/20 , G06F13/42 , G06F13/40
摘要： An apparatus includes an interface with a plurality of channels; a multiplexer coupled to the interface and configured to couple transmit circuitry to a first channel mapped as a transmit path in a channel configuration and to couple receive circuitry to a second channel mapped as a receive path in the channel configuration; and a controller coupled to the multiplexer. The controller may be configured to perform the steps including determining a figure of merit of at least one channel of the plurality of channels of the interface; determining the channel configuration mapping transmit and receive paths to the plurality of the channels of the interface; and controlling the multiplexer to couple transmit circuitry to the first channel mapped as a transmit path in the channel configuration and to couple receive circuitry to the second channel mapped as a receive path in the channel configuration for dynamic channel swap(s).

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