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    • 5. 发明申请
    • HARMONIC SUPPRESSION FOR CURRENT-DRIVEN DIRECT CONVERSION RECEIVER
    • WO2023030712A1
    • 2023-03-09
    • PCT/EP2022/066085
    • 2022-06-14
    • PANTHRONICS AG
    • NIEDERWIESER, Lukas
    • H04B1/30H04B5/00H03D7/16
    • A direct conversion receiver (17) that receives a load modulated analog input signal (2) in the HF frequency area and outputs digital data detected in the input signal (2), which receiver comprises: a transmitter to emit a magnetic field with a carrier frequency signal (4); a carrier signal stage to provide the carrier frequency signal which is in frequency and phase synchronized to the carrier frequency signal received in the input signal; an in-phase mixer (3) that mixes the input signal (2) with an in-phase carrier frequency signal (4) and provides an in-phase component (5, 8) of a down-converted input signal in the baseband frequency area with unwanted harmonic multiples; and a quadrature-phase mixer (13) that mixes the input signal (2) with a quadrature-phase carrier frequency signal (14) and provides a quadrature-phase component (15, 16) of a down- converted input signal in the baseband frequency area with unwanted harmonic multiples; an in-phase amplifier (9) to amplify the in-phase component (5, 8) of the down-converted input signal and a quadrature-phase amplifier (17) to amplify the quadrature-phase component (15, 16) of the down-converted input signal; two parallel units (10) connected parallel to each of the amplifiers (9, 17), which parallel units (10) comprise a capacity (11) and a ohmic resistance (12) connected parallel to each other to filter and to transform the in-phase component (5, 8) and the quadrature-phase component (15, 16) from the current domain into the voltage domain, wherein the receiver furthermore comprises: a parallel in-phase mixer unit (20) connected parallel, but inverted to output connections (6, 7) of the in-phase mixer (3) to subtract the unwanted harmonic multiples, which parallel in-phase mixer unit (20) comprises a second in-phase mixer (21) with a serial filter capacity (22) connected at each of its output connections to block the baseband frequency area of the in- phase component of the down-converted input signal; a parallel quadrature-phase mixer unit (23) connected parallel, but inverted to the output connections of the quadrature-phase mixer (13) to subtract the unwanted harmonic multiples, which parallel quadrature-phase mixer unit (23) comprises a second quadrature-phase mixer (24) with a serial filter capacity (22) connected at each of its output connections to block the baseband frequency area of the quadrature-phase component of the down-converted input signal.