Method and apparatus for recording PCM signal

BACKGROUND OF THE INVENTION

The present invention relates to a PCM signal recording technique, and more particularly to method and apparatus for recording a PCM signal suitable for a rotary-head type PCM recorder.

In the PCM recorder, as disclosed in Japanese unexamined patent publication No. 58-173934 laid open on Oct. 12, 1983 (Japanese patent application No. 57-55660 filed on Apr. 3, 1982), a PCM signal (1 word) having a sampling frequency of 48 KHz or 44.1 KHz and the number of quantization bits of 16 is recorded by eight bits. (The eight bits are called one symbol). In the rotary head type PCM recorder for recording the PCM signal on a magnetic tape by the rotary head, the data sequence is recorded so that original PCM signals may be reconstructed in each track as disclosed in Japanese unexamined patent publication No. 58-188314 laid open on Nov. 2, 1983 (Japanese patent application No. 57-69915 filed on Apr. 26, 1982).

On the other hand, long time recording in which a recording time of the PCM signal to the recording medium is approximately two times as long as that of conventional recording may be attained by setting a sampling frequency of the signal to be recorded such as an audio signal to 32 KHz and non-linearly quantizing the signal by 12 bits. However, since one word consists of 12 bits, the conventional method of recording the signal by symbol cannot be used.

A technical trend of rotary-head type digital audio tape recorder (R-DAT) is described in "DAT Meeting Activity" on pages 36-42, particularly pages 40-42 of ELECTRONICS, vol. 24, No. 10, 1984 published by EIAJ (Electronics Industries Association of Japan).

SUMMARY OF THE INVENTION

It is an object of the present invention to provide method and apparatus for converting an input PCM signal having each word thereof comprised of a predetermined number of bits adaptively to a PCM signal recording scheme in which the word signal is recorded by a predetermined number of bits smaller than the number of bits of one word, as units of data processing.

It is another object of the present invention to provide a PCM signal recording method suitable for a rotary-head type PCM recorder, in which the PCM signal having 12-bit words is converted to 8-bit data so that it is applicable to a system in which the signal is processed in units of 8 bits, with the same error concealment capability as that attained when a PCM signal having 16-bit words is recorded.

In accordance with one feature of the present invention, two words of PCM signals are converted to three symbols of data, including symbols each consisting of high order bits of each word, and a symbol consisting of low order bits of the respective words, and adjacent PCM signals are arranged as ODD data and EVEN data distant from each other on different tracks to facilitate processing of signals by 8 bits or by symbol and to compensate for a burst error encountered in reproduction.

In accordance with another feature of the present invention, two channels of sampled PCM signals are converted to 3-symbol data and recorded on a record medium by a plurality of rotary heads. A predetermined number of symbols of data which can be recorded on alternate tracks on the record medium are grouped into two groups corresponding to a first half and a second half of the PCM signals in the time sequence, and even symbol data corresponding to even PCM signals of the first half of the PCM signals and odd symbol data corresponding to odd PCM signals of the second half are recorded on one of the alternate tracks, and odd symbol data for odd PCM signals of the first half and even symbol data for even PCM signals of the second half are recorded on the other track, and the data terminates in units of alternate (pair) tracks. On the other hand, an error detection/correction code terminates in each track. In the first half and the second half of each track, the even symbol data and the odd symbol data of the PCM signals are arranged in this sequence or in the opposite sequence.

In accordance with the present invention, the PCM signal having 12-bit words can be converted to an 8-bit signal by simple processing so that the signal can be applicable to the system in which the signal is processed by 8 bits. If one track of burst error or a burst error on a plurality of tracks up to one half of the track occurs, it does not appear as a burst error in the time sequence in reproduction and the error concealment capability is improved.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows a data format on a first track in one embodiment of the present invention,

FIG. 2 shows a data format on a second track,

FIG. 3 shows a track arrangement on a magnetic tape,

FIG. 4 illustrates a data conversion method,

FIG. 5 shows a configuration of a PCM signal recording apparatus,

FIG. 6 illustrates an operation of a memory,

FIG. 7 shows a data conversion circuit,

FIG. 8 shows a timing chart of the data conversion circuit, and

FIGS. 9A (consisting of FIGS. 9A-1 and 9A-2) and 9B (consisting of FIGS. 9B-1 and 9B-2 show data record formats corresponding to FIGS. 1 and 2, respectively, when words need not be converted.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

One embodiment of the present invention is described with reference to FIGS. 1 and 2.

FIGS. 1 and 2 shows data formats in the present invention. Two channels of PCM signal having 12-bit words are arranged in two tracks. FIG. 1 shows the data format on the first track, and FIG. 2 shows the data format on the second track. Numeral 1 denotes one symbol which consists of 8 bits and numeral 2 denotes one block. Usually, one-word signal comprises two symbols, an upper symbol and a lower symbol. One block comprises 32 symbols and 128 blocks are recorded on one track. Numeral 3 denotes a first error detection and correction code Q and numeral 4 denotes a second error detection and correction code P.

When the sampling frequency is 32 KHz (for 1 word=12 bits) and rotating speed of the rotary head is 1000 rpm, the number of data per revolution is 1920 words/channel. Since two recording heads are mounted on a cylinder, two tracks are recorded in one revolution. Accordingly, 1920 words/channel of data must be arranged on two tracks.

The two channels of the PCM signal are represented for the sake of convenience, by left and right channel signals L and R. The data formats on the first and second tracks, of the two channels of the PCM signal having 16-bit words are shown in FIGS. 9A and 9B. The detail is disclosed in U.S. patent application Ser. No. 712,094 (European patent application No. 85103110.4 filed Mar. 18, 1985) entitled "Rotary Head Type PCM Recording and Reproduction Method and System" by Hiroaki Takahashi, Masaharu Kobayashi, Takaharu Noguchi, Toshifumi Shibuya and Takao Arai on Mar. 15, 985 based on Japanese patent application No. 54-50915 filed on Mar. 19, 1984, and assigned to the present assignee, the disclosure of which is incorporated herein by reference.

In FIG. 1, the L channel of the PCM signal is represented by L₀ -L₁₉₁₉ and the R channel of the PCM signal is represented by R₀ -R₁₉₁₉. Numerals indicate the order on the time sequence. Hatched areas are vacant areas.

In the two L and R channels of the PCM signal having 12-bit words, two words (24 bits) of the L channel data and two words of the R channel data in the same order are converted to 3-symbol data. 8 bits of the 12-bit Li constitute one symbol, 8 bits of 12-bit Ri constitute one symbol, and the remaining 4 bits of the 12-bits Li and the remaining 4 bits of the 12-bit Ri constitute one symbol. Of the three 8-bit data thus converted, the L and R odd data and the L and R even data relative to L and R PCM signals are arranged at spaced locations on different tracks. As shown in FIG. 1, for the 0th-959th 3-symbol data, the even data are arranged in a first half of a first track and the odd data are arranged in a second half of a second track. As shown in FIG. 2, for 960th-1919th data, the even data is arranged in a first half of the second track and the odd data is arranged in a second half of the first track. By this arrangement, even if one track of burst error or a burst error on two tracks up to one half of the track takes place, a burst error does not appear on the time sequence in reproduction.

In each region, that is, the first half or the second half of each track, data is arranged such that two consecutive symbols are arranged at close positions in the same block. For example, in the first half of the first track, the first symbol L₀ and the second symbol L₀ /R₀ are arranged at the first and third positions in the first block, the third symbol R₀ and the fourth symbol L₂ are arranged at the first and third positions in the third block, and so on. Since the data in one word of the L channel and one word of the R channel are included in consecutive symbols, the error concealment capability is not affected even if errors occur in both symbols. The symbols of associated words are arranged at alternate positions in the block so that they may be contained in a second error detection/correction code sequence to be described later.

The data thus arranged has the first error detection/correction code (parity symbol Q) 3 and the second error detection/correction code (parity symbol P) 4 added thereto so that errors can be detected and corrected during the reproduction. To add the error detection/correction codes, the first error detection/correction code 3 is first added, then the second error detection/correction code 4 is added. The first error detection/correction code (Q) 3 is added to the same symbol number of every four blocks (e.g. first symbol of 0th, 4th, 8th--blocks) and it may be a Reed-Solomon code having a code length of 32 symbols and a minimum distance of 7. The second error detection/correction code (P) 4 is added to odd and even symbols of every two blocks and it may be a Reed-Solomon code having a code length of 32 symbols and a minimum distance of 5.

FIG. 3 shows a track arrangement on a magnetic tape. Numeral 5 denotes the magnetic tape and numerals 6 and 7 denote first and second tracks scanned by the pair of rotary heads. The data is scattered in the two adjacent tracks, as shown in FIG. 1.

FIG. 4 shows a method for converting the 12-bit PCM signal to the 8-bit symbols. As described above, the 12-bit data 8 of the L channel and the 12-bit data 9 of the R channel in the same order are converted to 3-symbol (8- bits/symbol) data 10-12. The symbol 10 consists of 8 high order bits of the data 8 of the L channel, the symbol 12 consists of 8 high order bits of the data 9 of the R channel, and the symbol 11 consists of four low order bits of the data 8 of the L channel and four low order bits of the data 9 of the R channel. By this bit conversion format, the conversion is attained with a simple circuit as will be explained later.

FIG. 5 shows a configuration of the PCM signal recording apparatus which records the PCM signal in accordance with the present invention. Numeral 20 denotes an input terminal to which the PCM signal is applied from a PCM signal source or a transmission line, numeral 21 denotes a data bus, numeral 22 denotes a data conversion circuit, numerals 23-26 denote memories, numeral 27 denotes a control circuit for the memories, numeral 28 denotes an error detection/correction code addition circuit, numeral 29 denotes a recording circuit, numeral 30 denotes an amplifier and numeral 31 denotes rotary heads.

The 12-bit PCM signal applied to the input terminal 20 is converted to the 8-bit data by the data conversion circuit 22 and the 8-bit data is stored in the memories 23-25 through the data bus 21. The PCM signals stored in the memories 23-26 are supplied to the error detection/correction code addition circuit 28 where they are interleaved and the first error detection/correction code 3 and the second error detection/correction code 4 are added. The interleaved PCM signal having the parity symbols added thereto is supplied to the recording circuit 29 block by block. In the recording circuit 29, a synchronization signal and sub-codes are added, and the signal is amplified by the amplifier 30 and recorded on the magnetic tape by the rotary heads 31.

The memories 23-26 each has one track of memory capacity. The memories 23 and 25 store the data shown in FIG. 1 and the memories 24 and 26 store the data shown in FIG. 2. Those memories may be one or two memories divided into four memory areas.

FIG. 6 illustrates the operation of the memories. Numeral 32 denotes input of data, numeral 33 denotes addition of error correction/detection code, numeral 34 denotes an output of data, and numeral 35 denotes a record signal to the magnetic tape. Numerals 23-26 inserted in the data/code series indicate the operating memories. The PCM signal outputted from the data conversion circuit 22 is stored in the memories 23 and 24 such that 1920 words of the data in the L channel and the R channel are stored in the memories 23 and 24, respectively, in one revolution (360°) of the rotary head 31. The addresses of the memories are controlled by the control circuit 27 so that the data is arranged as shown in FIGS. 1 and 2. The data stored in the memories 23 and 24 has the error detection/correction codes added thereto during the next revolution and the data is recorded on the magnetic tape 5. The PCM signal supplied while the data stored in the memories 23 and 24 is recorded is stored in the memories 25 and 26, and this data is recorded on the magnetic tape 5 during the next revolution.

FIG. 7 shows the data conversion circuit 22. It converts the 12-bit signal to the 8-bit signal. Numerals 37-39 denote latch circuits and numerals 40 and 41 denote switching circuits. The operation is explained with reference to a timing chart of FIG. 8.

The PCM signal supplied from the signal source and alternately arranged to the L and R channels by a multiplexor is supplied to the input terminal 20. The eight high order bits of the L channel PCM signal applied to the input terminal 20 is latched in the latch circuit 37, and four low order bits are latched in the latch circuit 38 through the switching circuit 40. The eight high order bits of the L channel latched in the latch circuit 37 is supplied to the output terminal 36 as the symbol 10. Then, the eight high order bits of the R channel PCM signal applied to the input terminal 20 is latched in the latch circuit 37, and the four low order bits are latched in the latch circuit 39 through the switching circuit 40. The eight-bit data latched in the latch circuits 38 and 39 is supplied to the output terminal 36 as the symbol 11. Finally, the eight high order bits of the R channel latched in the latch circuit 37 is supplied to the output terminal 36 as the symbol 12.

In accordance with the present embodiment, the 12-bit PCM signal can be converted to the 8-bit data with simple processing and the error concealment capability to the burst error is enhanced.