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    • 21. 发明申请
    • Process for the stereoselective preparation of (-)-halofenate and derivatives thereof
    • ( - ) - 卤代苯甲酸酯及其衍生物的立体选择性制备方法
    • US20070072858A1
    • 2007-03-29
    • US11525200
    • 2006-09-20
    • Yan ZhuPeng ChengXin ChenJingyuan MaZuchun Zhao
    • Yan ZhuPeng ChengXin ChenJingyuan MaZuchun Zhao
    • A61K31/5375A61K31/495A61K31/4025A61K31/401
    • C07D295/185
    • The present invention provides a compounds the formula (IV): and methods for producing an α-(phenoxy)phenylacetic acid compound of the formula: wherein R1 is a member selected from the group consisting of: each R2 is a member independently selected from the group consisting of (C1-C4)alkyl, halo, (C1-C4)haloalkyl, amino, (C1-C4)aminoalkyl, amido, (C1-C4)amidoalkyl, (C1-C4)sulfonylalkyl, (C1-C4)sulfamylalkyl, (C1-C4)alkoxy, (C1-C4)heteroalkyl, carboxy and nitro; the subscript n is 1 when R1 has the formula (a) or (b) and 2 when R1 has the formula (c) or (d); the subscript m is an integer of from 0 to 3; * indicates a carbon which is enriched in one stereoisomeric configuration; and the wavy line indicates the point of attachment of R1; and compounds
    • 本发明提供式(IV)化合物及其制备下式的α-(苯氧基)苯乙酸化合物的方法:其中R 1是选自以下的成员:各 R 2是独立地选自(C 1 -C 4 -C 4)烷基,卤素,(C 1 -C 4)烷基的成员, C 1 -C 4卤代烷基,氨基,(C 1 -C 4)氨基烷基,酰氨基,(C 1 H 4) (C 1 -C 4)磺酰基烷基,(C 1 -C 4)磺酰基烷基,(C 1 -C 4 - C 1 -C 4亚磺酰基烷基,(C 1 -C 4 -C 4)烷氧基,(C 1 -C 3 - 亚磺酰基烷基) > 4个)杂烷基,羧基和硝基; 当R 1具有式(a)或(b)时,下标n为1,当R 1具有式(c)或(d))时,下标n为1。 下标m为0〜3的整数; *表示富含一种立体异构构型的碳; 波浪线表示R 1的连接点; 和化合物
    • 28. 发明授权
    • N-bits successive approximation register analog-to-digital converting circuit
    • N位逐次逼近寄存器模数转换电路
    • US08344931B2
    • 2013-01-01
    • US13150508
    • 2011-06-01
    • Yan ZhuChi-Hang ChanU-Fat ChioSai-Weng SinSeng-Pan URui Paulo Da Silva MartinsFranco Maloberti
    • Yan ZhuChi-Hang ChanU-Fat ChioSai-Weng SinSeng-Pan URui Paulo Da Silva MartinsFranco Maloberti
    • H03M1/12
    • H03M1/002H03M1/466
    • The present invention provides an n-bits successive approximation register (SAR) analog-to-digital converting (ADC) circuit, comprising: an n-bits SAR control logic, a p-type capacitor network including a DACp array and a sampling capacitor CSp, an n-type capacitor network including a DACn array and a sampling capacitor CSn; and a comparator for comparing outputs from the p-type capacitor network and the n-type capacitor network, wherein a power supply and ground are directly connected to the p-type capacitor network and the n-type capacitor network without using reference voltages produced by a reference voltage generator. The n-bits SAR control logic comprises n shift registers, n bit registers, and a switching logic. The comparator comprises a first pre-amplifier, a second pre-amplifier and a dynamic latch. Alternative, the comparator comprises a four-input pre-amplifier and a dynamic latch.
    • 本发明提供一种n位逐次逼近寄存器(SAR)模数转换(ADC)电路,包括:n位SAR控制逻辑,包括DACp阵列和采样电容器CSp的p型电容器网络 包括DACn阵列和采样电容器CSn的n型电容器网络; 以及用于比较来自p型电容器网络和n型电容器网络的输出的比较器,其中电源和接地直接连接到p型电容器网络和n型电容器网络,而不使用由p型电容器网络和n型电容器网络产生的参考电压 参考电压发生器。 n位SAR控制逻辑包括n个移位寄存器,n个位寄存器和一个开关逻辑。 比较器包括第一前置放大器,第二前置放大器和动态锁存器。 替代方案,比较器包括四输入前置放大器和动态锁存器。