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21. 发明授权

US06333536B1 Depletion compensated polysilicon electrodes 失效
公开(公告)号：US06333536B1
公开(公告)日：2001-12-25
申请号：US09702584
申请日：2000-10-31
申请人： Ravi Iyer , Luan Tran , Charles L. Turner
发明人： Ravi Iyer , Luan Tran , Charles L. Turner
IPC分类号： H01L27108
CPC分类号： H01L27/1085 , H01L21/76895 , H01L28/84
摘要： A capacitor in a semiconductor integrated circuit is fabricated having a fixed charge density introduced near an electrode/dielectric interface. The fixed charge density compensates for the effects of a depletion layer, which would otherwise lower the effective capacitance. By shifting the undesirable effect of the depletion capacitance outside of the operating voltage range, the capacitor is effectively converted to an accumulation mode. The fixed charge density is preferably introduced by a plasma nitridation process performed prior to formation of the capacitor dielectric.

22. 发明授权

US6144098A Techniques for improving adhesion of silicon dioxide to titanium 失效
公开(公告)号：US6144098A
公开(公告)日：2000-11-07
申请号：US744298
申请日：1996-11-06
申请人： Ravi Iyer
发明人： Ravi Iyer
IPC分类号： H01L21/316 , H01L29/40
CPC分类号： H01L21/02164 , H01L21/02304 , H01L21/02315 , H01L21/316 , H01L21/31612
摘要： The present invention is described in several embodiments depicting structures and methods to form these structures. A first embodiment is a structure having a silicon dioxide film bonded to a metal film comprising: a metal nitride film bonded to the metal film; and the silicon dioxide film bonded to the metal nitride film. A second embodiment is a structure having a silicon dioxide film bonded to a metal film comprising: a metal oxide film bonded to the metal film; and the silicon dioxide film bonded to the metal oxide film. A third embodiment is a structure having a silicon dioxide film bonded to a metal film comprising: a metal/oxide/nitride film bonded to the metal film; and the silicon dioxide film bonded to the metal/oxide/nitride film.

23. 发明授权

US6087254A Technique for elimination of pitting on silicon substrate during gate stack etch 失效
公开(公告)号：US6087254A
公开(公告)日：2000-07-11
申请号：US682935
申请日：1996-07-16
申请人： Pai-Hung Pan , Louie Liu , Ravi Iyer
发明人： Pai-Hung Pan , Louie Liu , Ravi Iyer
IPC分类号： H01L21/28 , H01L21/3205 , H01L21/44
CPC分类号： H01L21/28052
摘要： A method for forming a gate stack which minimizes or eliminates damage to the gate dielectric layer and/or silicon substrate during the gate stack formation by the reduction of the temperature during formation. The temperature reduction prevents the formation of silicon clusters within the metallic silicide film in the gate stack which has been found to cause damage during the gate etch step. The present invention also includes methods for dispersing silicon clusters prior to the gate etch step.

24. 发明授权

US6033992A Method for etching metals using organohalide compounds 失效
公开(公告)号：US6033992A
公开(公告)日：2000-03-07
申请号：US918593
申请日：1997-08-19
申请人： Ravi Iyer
发明人： Ravi Iyer
IPC分类号： H01L21/00 , H01L21/3213
CPC分类号： H01L21/67069 , H01L21/32136
摘要： A process for plasma etching metal films comprising the steps of forming a noble gas plasma, then transporting the noble gas plasma to a mixing chamber. An organohalide is added to the noble gas plasma in the mixing chamber. The organohalide is selected to have a vapor pressure allowing the formation of activated complexes to etch the metal films and form organometallic compounds as the etch byproducts. The activated complexes thus formed are transported downstream to an etching chamber. In the etching chamber the selected substrate is exposed to the activated complexes, causing the substrate to be etched and organometallic compounds to be formed as byproducts from the reaction of the activated complexes and etching of the substrate. The organometallic byproducts can then be removed from the etch chamber.

25. 发明授权

US5985770A Method of depositing silicon oxides 失效
公开(公告)号：US5985770A
公开(公告)日：1999-11-16
申请号：US915987
申请日：1997-08-21
申请人： Gurtej S. Sandhu , Ravi Iyer
发明人： Gurtej S. Sandhu , Ravi Iyer
IPC分类号： C23C16/30 , H01L21/316 , H01L21/368
CPC分类号： H01L21/02271 , C23C16/30 , H01L21/02126 , H01L21/02129 , H01L21/02131 , H01L21/0214 , H01L21/31612
摘要： The invention comprises methods of depositing silicon oxide material onto a substrate. In but one aspect of the invention, a method of depositing a silicon oxide containing layer on a substrate includes initially forming a layer comprising liquid silicon oxide precursor onto a substrate. After forming the layer, the layer is doped and transformed into a solid doped silicon oxide containing layer on the substrate. In a preferred implementation, the doping is by gas phase doping and the liquid precursor comprises Si(OH).sub.4. In the preferred implementation, the transformation occurs by raising the temperature of the deposited liquid precursor to a first elevated temperature and polymerizing the deposited liquid precursor on the substrate. The temperature is continued to be raised to a second elevated temperature higher than the first elevated temperature and a solid doped silicon oxide containing layer is formed on the substrate.

26. 发明授权

US5963835A Method of forming aluminum film 失效
标题翻译：铝膜成型方法
公开(公告)号：US5963835A
公开(公告)日：1999-10-05
申请号：US977786
申请日：1997-11-25
申请人： Gurtej S. Sandhu , Ravi Iyer
发明人： Gurtej S. Sandhu , Ravi Iyer
IPC分类号： H01L23/485 , H01L23/532 , H01L21/70
CPC分类号： H01L23/53223 , H01L23/485 , H01L2924/0002
摘要： A method for depositing an aluminum film limits the growth of voids and notches in the aluminum film and forms and aluminum film with a reduced amount of voids and notches. The first step of the method is to form an underlying layer upon which is deposited an aluminum film having a first thickness. The surface of the aluminum film is then exposed to a passivation species which coats the aluminum grains and precipitates at the grain boundaries so as to prevent grain movement. The exposure of the aluminum film to the passivation species reduces void formation and coalescence of the voids. An aluminum layer having a second thickness is then deposited over the initially deposited aluminum layer. In a second embodiment of the invention, the passivation species is deposited with MOCVD and to form an electromigration-resistant alloy. A third embodiment involves multiple depositions of aluminum, with exposure to a passivation species conducted after each deposition. Each deposition is also conducted at a successively lower temperature than the prior deposition.
摘要翻译：铝膜的沉积方法限制了铝膜中的空隙和凹口的生长，并形成了具有减少量的空隙和凹口的铝膜。该方法的第一步是形成下层，沉积具有第一厚度的铝膜。然后将铝膜的表面暴露于钝化物质，其涂覆铝颗粒并在晶界处沉淀，以防止颗粒移动。铝膜暴露于钝化物质可以减少空隙的形成和孔隙的聚结。然后在初始沉积的铝层上沉积具有第二厚度的铝层。在本发明的第二个实施方案中，钝化物质用MOCVD沉积并形成耐电迁移合金。第三个实施例涉及铝的多次沉积，暴露于在每次沉积之后进行的钝化物质。每次沉积也在比先前的沉积相继低的温度下进行。

27. 发明授权

US5824365A Method of inhibiting deposition of material on an internal wall of a chemical vapor deposition reactor 失效
标题翻译：抑制材料沉积在化学气相沉积反应器的内壁上的方法
公开(公告)号：US5824365A
公开(公告)日：1998-10-20
申请号：US668855
申请日：1996-06-24
申请人： Gurtej S. Sandhu , Ravi Iyer , Donald L. Westmoreland
发明人： Gurtej S. Sandhu , Ravi Iyer , Donald L. Westmoreland
IPC分类号： C23C16/44 , B05D7/22 , C23C16/00
CPC分类号： C23C16/4404
摘要： A method of inhibiting deposition of material on a wall of a chemical vapor deposition reactor includes providing a chemical vapor deposition reactor having a wall which has an inside facing surface, the inside facing surface at least partially defining a chemical vapor deposition reactor chamber; forming a first material atop the inside facing surface; positioning a substrate in the chemical vapor deposition reactor chamber, the substrate having an outer surface; and chemical vapor depositing a second material layer on the substrate in a manner which is selective to the substrate outer surface, and not the first material, thereby restricting deposition of the second layer on the reactor inside facing surface.
摘要翻译：一种抑制材料沉积在化学气相沉积反应器的壁上的方法包括提供具有壁的化学气相沉积反应器，所述壁具有面向内的表面，所述内表面至少部分地限定化学气相沉积反应室; 在面向内表面的顶部形成第一材料; 将衬底定位在化学气相沉积反应器室中，所述衬底具有外表面; 以及以对衬底外表面有选择性的方式在衬底上沉积第二材料层，而不是第一材料，由此限制第二层在反应器面对表面上的沉积。

28. 发明授权

US08202806B2 Method to avoid threshold voltage shift in thicker dielectric films 失效
标题翻译：避免较厚介质膜中阈值电压漂移的方法
公开(公告)号：US08202806B2
公开(公告)日：2012-06-19
申请号：US11242375
申请日：2005-10-03
申请人： Randhir P.S. Thakur , Ravi Iyer , Howard Rhodes
发明人： Randhir P.S. Thakur , Ravi Iyer , Howard Rhodes
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L23/3171 , H01L21/02129 , H01L21/02271 , H01L21/02304 , H01L21/02315 , H01L21/31612 , H01L21/3162 , H01L21/76828 , H01L21/76829 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要： A method of fabricating an integrated circuit having reduced threshold voltage shift is provided. A nonconducting region is formed on the semiconductor substrate and active regions are formed on the semiconductor substrate. The active regions are separated by the nonconducting region. A barrier layer and a dielectric layer are deposited over the nonconducting region and over the active regions. Heat is applied to the integrated circuit causing the barrier layer to anneal.
摘要翻译：提供了一种制造具有降低的阈值电压偏移的集成电路的方法。在半导体衬底上形成非导电区域，在半导体衬底上形成有源区域。有源区由非导电区分开。势垒层和电介质层沉积在非导电区域上并在有源区上方。对集成电路施加热量，导致阻挡层退火。

29. 发明申请

US20100285238A1 METHODS OF FORMING GLASS ON A SUBSTRATE 失效
标题翻译：在基板上形成玻璃的方法
公开(公告)号：US20100285238A1
公开(公告)日：2010-11-11
申请号：US12843518
申请日：2010-07-26
申请人： Gurtej S. Sandhu , Ravi Iyer
发明人： Gurtej S. Sandhu , Ravi Iyer
IPC分类号： C23C16/48
CPC分类号： C23C16/401
摘要： Disclosed is a deposition process for forming a glass film. An embodiment comprising the steps of disposing a substrate in a chemical vapor deposition chamber and exposing the substrate surface to a SiO2 precursor gas, a carrier gas, and optionally a dopant gas in the presence of ozone and exposing the reaction volume of the gases above the substrate surface to a high intensity light source.
摘要翻译：公开了一种用于形成玻璃膜的沉积工艺。一种实施方案，其包括以下步骤：在化学气相沉积室中设置衬底，并在臭氧存在下将衬底表面暴露于SiO 2前体气体，载体气体和任选的掺杂气体，并将气体的反应体积暴露于高于衬底表面到高强度光源。

30. 发明申请

US20090194818A1 Transistor Gate Forming Methods and Integrated Circuits 有权
标题翻译：晶体管栅极形成方法和集成电路
公开(公告)号：US20090194818A1
公开(公告)日：2009-08-06
申请号：US12424455
申请日：2009-04-15
申请人： D. V. Nirmal Ramaswamy , Ravi Iyer
发明人： D. V. Nirmal Ramaswamy , Ravi Iyer
IPC分类号： H01L27/092
CPC分类号： H01L21/28088 , H01L21/823842 , H01L29/78
摘要： A transistor gate forming method includes forming a first and a second transistor gate. Each of the two gates includes a lower metal layer and an upper metal layer. The lower metal layer of the first gate originates from an as-deposited material exhibiting a work function the same as exhibited in an as-deposited material from which the lower metal layer of the second gate originates. However, the first gate's lower metal layer exhibits a modified work function different from a work function exhibited by the second gate's lower metal layer. The first gate's lower metal layer may contain less oxygen and/or carbon in comparison to the second gate's lower metal layer. The first gate's lower metal layer may contain more nitrogen in comparison to the second gate's lower metal layer. The first gate may be a n-channel gate and the second gate may be a p-channel gate.
摘要翻译：晶体管栅极形成方法包括形成第一和第二晶体管栅极。两个栅极中的每一个包括下金属层和上金属层。第一栅极的下金属层源自表现出与第二栅极的下金属层源自的沉积材料所表现出的功函数相同的功函数的沉积材料。然而，第一栅极的下部金属层表现出与第二栅极的下部金属层所表现的功函数不同的修正功函数。与第二栅极的下金属层相比，第一栅极的下金属层可以含有较少的氧和/或碳。与第二栅极的下金属层相比，第一栅极的下金属层可以含有更多的氮。第一栅极可以是n沟道栅极，第二栅极可以是p沟道栅极。

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