专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

51. 发明授权

US09892703B2 Output circuit, data driver, and display device 有权
公开(公告)号：US09892703B2
公开(公告)日：2018-02-13
申请号：US14664076
申请日：2015-03-20
申请人： Renesas Electronics Corporation
发明人： Hiroshi Tsuchi
IPC分类号： G09G3/36 , H03F1/02 , H03F3/45 , G09G3/3258 , G09G3/3291
CPC分类号： G09G3/3677 , G09G3/3258 , G09G3/3291 , G09G3/3688 , G09G2300/0426 , G09G2310/0289 , G09G2310/0291 , G09G2330/021 , H03F1/0261 , H03F3/45179 , H03F3/4526 , H03F2200/18 , H03F2200/27 , H03F2203/45562 , H03F2203/45614 , H03F2203/45618 , H03F2203/45644 , H03F2203/45674 , H03F2203/45676 , H03F2203/45724 , H03F2203/45728
摘要： A display device includes an output circuit including a differential amplifier circuit, an output amplifier circuit that includes a first transistor of the first conduction type coupled between the first supply terminal and the output terminal, and including a control terminal coupled to the differential amplifier circuit, a first control circuit, an input terminal, an output terminal, and first to third supply terminals to which first to third supply voltages are applied, wherein the third supply voltage is set to a voltage between the first supply voltage and the second supply voltage, or the second supply voltage, and wherein the first control circuit includes a third transistor and a first switch which are coupled in series between the first supply terminal and the control terminal of the first transistor.

52. 发明授权

US09606566B2 Trans-conductance regulation circuit, trans-conductance error amplifier and power converter 有权
公开(公告)号：US09606566B2
公开(公告)日：2017-03-28
申请号：US14788478
申请日：2015-06-30
申请人： Chengdu Monolithic Power Systems Co., Ltd.
发明人： Lei Li
IPC分类号： H02M3/156 , G05F3/26 , H03F1/34 , H03F3/217 , H03F3/45 , H02M3/158 , H02M1/00
CPC分类号： G05F3/267 , H02M3/158 , H02M2001/0003 , H03F1/34 , H03F3/2171 , H03F3/4508 , H03F2200/351 , H03F2200/45 , H03F2203/45112 , H03F2203/45116 , H03F2203/45676
摘要： A trans-conductance regulation circuit, a trans-conductance error amplifier module and a power converter. The trans-conductance regulation circuit provides a bias current at least partially based on an output voltage of the power converter. The bias current is sent to bias a trans-conductance operational amplifier in the trans-conductance error amplifier module so that a trans-conductance of the trans-conductance operational amplifier is direct proportional to the output voltage of the power converter. The power converter regulates the output voltage based on a negative feedback loop comprising the trans-conductance error amplifier module. The trans-conductance error amplifier module may help to maintain a band width of the negative feedback loop substantially stable and immune to variations in the output voltage.

53. 发明申请

US20160164517A1 High Gain Load Circuit for a Differential Pair Using Depletion Mode Transistors 审中-公开
标题翻译：使用耗尽型晶体管的差分对的高增益负载电路
公开(公告)号：US20160164517A1
公开(公告)日：2016-06-09
申请号：US14959567
申请日：2015-12-04
申请人： Analog Devices, Inc.
发明人： Yogesh Jayaraman Sharma , James Fiorenza
IPC分类号： H03K17/687 , H01L27/088 , H01L29/20
CPC分类号： H03K17/6871 , H01L27/088 , H01L29/2003 , H03F3/45188 , H03F3/45385 , H03F2200/303 , H03F2200/75 , H03F2203/45036 , H03F2203/45182 , H03F2203/45184 , H03F2203/45188 , H03F2203/45202 , H03F2203/45208 , H03F2203/45224 , H03F2203/45656 , H03F2203/45674 , H03F2203/45676 , H03F2203/45701 , H03F2203/45702 , H03F2203/45722
摘要： A differential pair gain stage is disclosed. In one embodiment, the gain stage includes a differential pair of depletion-mode transistors, including a first and a second n-type transistor. In certain embodiments of the invention, the depletion mode transistor may be GaN (gallium nitride) field effect transistors. The gain stage includes an active load including one or more depletion mode transistors electrically coupled to at least one of the drains of depletion mode transistors of the differential pair. The active load may include a source follower for maintaining the AC voltages at the drains of the differential pair at a constant value and may further include a casocde stage for setting a fixed drain source voltage across the output transistors to increase the output impedance and gain of the stage.
摘要翻译：公开了差分对增益级。在一个实施例中，增益级包括包括第一和第二n型晶体管的耗尽型晶体管的差分对。在本发明的某些实施例中，耗尽型晶体管可以是GaN（氮化镓）场效应晶体管。增益级包括有源负载，其包括电耦合到差分对的耗尽型晶体管的至少一个漏极的一个或多个耗尽型晶体管。有源负载可以包括源极跟随器，用于将差分对的漏极处的AC电压保持在恒定值，并且还可以包括用于在输出晶体管两端设置固定的漏极源电压的casocde级，以增加输出阻抗和增益舞台。

54. 发明授权

US09231541B2 Analog circuits having improved transistors, and methods therefor 有权
公开(公告)号：US09231541B2
公开(公告)日：2016-01-05
申请号：US14500236
申请日：2014-09-29
申请人： SuVolta, Inc.
发明人： Lawerence T. Clark , Scott E. Thompson
IPC分类号： H03F3/45
CPC分类号： H03F3/45179 , H03F3/45 , H03F3/45071 , H03F3/45183 , H03F3/45273 , H03F2200/375 , H03F2203/45344 , H03F2203/45454 , H03F2203/45506 , H03F2203/45674 , H03F2203/45676
摘要： Circuits are disclosed that may include a plurality of transistors having controllable current paths coupled between at least a first and second node, the transistors configured to generate an analog electrical output signal in response to an analog input value; wherein at least one of the transistors has a deeply depleted channel formed below its gate that includes a substantially undoped channel region formed over a relatively highly doped screen layer formed over a doped body region.

55. 发明申请

US20150263674A1 AMPLIFIER SYSTEM 有权
标题翻译：放大器系统
公开(公告)号：US20150263674A1
公开(公告)日：2015-09-17
申请号：US14642317
申请日：2015-03-09
申请人： TEXAS INSTRUMENTS INCORPORATED
发明人： SRINIVAS K. PULIJALA , Steven G. Brantley
IPC分类号： H03F1/02 , H03F3/45 , H03F3/04
CPC分类号： H03F1/0266 , H03F3/211 , H03F3/4508 , H03F3/72 , H03F2200/261 , H03F2200/27 , H03F2200/411 , H03F2200/432 , H03F2203/45154 , H03F2203/45248 , H03F2203/45674 , H03F2203/45676 , H03F2203/45702
摘要： One example includes an amplifier system. The system includes a precision amplifier portion comprising a first input stage configured to receive an input voltage and a first output stage configured to generate an output voltage at the first output stage based on the input voltage. The system also includes a slew amplifier portion arranged in parallel with the precision amplifier portion and comprising a second input stage that receives the input voltage and a second output stage. The slew amplifier portion can be activated in response to a detected slew condition associated with the input voltage to generate the output voltage based on the input voltage.
摘要翻译：一个例子包括放大器系统。该系统包括精密放大器部分，其包括被配置为接收输入电压的第一输入级和被配置为基于输入电压在第一输出级产生输出电压的第一输出级。该系统还包括与精密放大器部分并联设置并包括接收输入电压的第二输入级和第二输出级的转换放大器部分。可以响应于与输入电压相关联的检测到的转换条件来激活转换放大器部分，以基于输入电压产生输出电压。

56. 发明授权

US09136264B2 MOS transistors having low offset values, electronic devices including the same, and methods of fabricating the same 有权
标题翻译：具有低偏移值的MOS晶体管，包括其的电子器件及其制造方法
公开(公告)号：US09136264B2
公开(公告)日：2015-09-15
申请号：US14253493
申请日：2014-04-15
申请人： SK HYNIX INC.
发明人： Hyun Min Song
IPC分类号： H01L27/088 , H01L29/423 , H01L29/06 , H03F3/45 , H01L21/8234 , H01L29/786 , H01L21/761
CPC分类号： H01L27/088 , H01L21/761 , H01L21/76224 , H01L21/823437 , H01L21/823456 , H01L21/823481 , H01L29/0653 , H01L29/1083 , H01L29/1087 , H01L29/42376 , H01L29/4238 , H01L29/665 , H01L29/7833 , H01L29/78609 , H01L29/78696 , H03F3/45197 , H03F2203/45212 , H03F2203/45344 , H03F2203/45631 , H03F2203/45674 , H03F2203/45676
摘要： A MOS transistor includes a gate electrode disposed over an active region without overlapping with an isolation region, the active region including a channel region, the isolation region defining the active region, a source region and a drain region disposed in first and second portions of the active region, respectively, the first and second portions being disposed at first and second sides of the gate electrode, respectively, the first side opposing the second side, a first blocking region disposed in a third portion of the active region between a third side of the gate electrode and the isolation region and between the source and the drain region, and a second blocking region disposed in a fourth portion of the active region between a fourth side of the gate electrode and the isolation region and between the source and the drain region, the fourth side opposing the third side.
摘要翻译： MOS晶体管包括设置在有源区上而不与隔离区重叠的栅电极，有源区包括沟道区，限定有源区的隔离区，设置在第一和第二部分中的源区和漏区所述第一和第二部分分别设置在所述栅电极的第一和第二侧，所述第一侧与所述第二侧相对，所述第一阻挡区设置在所述有源区的第三部分之间，所述栅电极和所述隔离区以及所述源极和漏极区之间以及设置在所述有源区的第四部分中的所述栅电极和所述隔离区之间以及所述源极和漏极区之间的第二阻挡区，第四面反对第三面。

57. 发明申请

US20150097534A1 Circuits and Method for Controlling Transient Fault Conditions in a Low Dropout Voltage Regulator 有权
标题翻译：控制低压差稳压器瞬态故障条件的电路和方法
公开(公告)号：US20150097534A1
公开(公告)日：2015-04-09
申请号：US14052838
申请日：2013-10-14
申请人： Dialog Semiconductor GmbH
发明人： Ambreesh Bhattad
IPC分类号： G05F1/46
CPC分类号： G05F1/575 , G05F1/462 , G05F1/56 , H02M1/32 , H03F3/45183 , H03F2200/555 , H03F2203/45314 , H03F2203/45636 , H03F2203/45674 , H03F2203/45676
摘要： An overshoot reduction circuit within a low dropout voltage regulator eliminates an overshoot at an output terminal resulting from a transient fault condition occurring at an input or output terminal. The overshoot reduction circuit monitors to sense if there is a transient fault condition occurring at the input or output terminal and provides a Miller capacitance at the output terminal of a differential amplifier of the low dropout voltage regulator to prevent the output of the differential amplifier from being discharged to ground during the transient. A control loop circuit balances current within an active load of the differential amplifier to clamp the output of the differential amplifier to its normal operating point. When the transient fault condition ends, the output voltage of the differential amplifier is set such that a pass transistor of the low dropout regulator responds quickly to resume the regulation to reduce or eliminate the overshoot.
摘要翻译：低压降稳压器内的过冲减少电路消除了由输入或输出端子发生的瞬态故障情况导致的输出端子上的过冲。过冲减少电路监视以检测在输入或输出端子处是否存在瞬态故障状况，并在低压差稳压器的差分放大器的输出端提供米勒电容，以防止差动放大器的输出为在短暂期间放电到地面。控制回路电路平衡差分放大器的有效负载内的电流，将差分放大器的输出钳位到其正常工作点。当瞬态故障状态结束时，差分放大器的输出电压被设置为使得低压差稳压器的通过晶体管快速响应以恢复调节以减少或消除过冲。

58. 发明授权

US08847684B2 Analog circuits having improved transistors, and methods therefor 有权
标题翻译：具有改进的晶体管的模拟电路及其方法
公开(公告)号：US08847684B2
公开(公告)日：2014-09-30
申请号：US13770482
申请日：2013-02-19
申请人： Lawrence T. Clark , Scott E. Thompson
发明人： Lawrence T. Clark , Scott E. Thompson
IPC分类号： H03F3/45
CPC分类号： H03F3/45179 , H03F3/45 , H03F3/45071 , H03F3/45183 , H03F3/45273 , H03F2200/375 , H03F2203/45344 , H03F2203/45454 , H03F2203/45506 , H03F2203/45674 , H03F2203/45676
摘要： Circuits are disclosed that may include a plurality of transistors having controllable current paths coupled between at least a first and second node, the transistors configured to generate an analog electrical output signal in response to an analog input value; wherein at least one of the transistors has a deeply depleted channel formed below its gate that includes a substantially undoped channel region formed over a relatively highly doped screen layer formed over a doped body region.
摘要翻译：公开了可以包括多个具有耦合在至少第一和第二节点之间的可控电流路径的晶体管的晶体管，其被配置为响应于模拟输入值产生模拟电输出信号; 其中所述晶体管中的至少一个具有在其栅极下方形成的深耗尽沟道，其包括在掺杂体区域上形成的相对高掺杂的屏蔽层上形成的基本上未掺杂的沟道区。

59. 发明申请

US20130187620A1 POWER EFFICIENT TRANSCONDUCTANCE AMPLIFIER APPARATUS AND SYSTEMS 有权
标题翻译：功率有效的交叉放大器装置和系统
公开(公告)号：US20130187620A1
公开(公告)日：2013-07-25
申请号：US13357203
申请日：2012-01-24
申请人： Charles Parkhurst
发明人： Charles Parkhurst
IPC分类号： G05F1/46 , H03F1/34 , H03F3/45
CPC分类号： H03F3/45 , H03F1/0266 , H03F1/342 , H03F3/45179 , H03F3/45183 , H03F2203/45362 , H03F2203/45481 , H03F2203/45562 , H03F2203/45674 , H03F2203/45676
摘要： Embodiments and methods herein operate as two-stage voltage controlled current sources (i.e., dynamic current sources) operating in class AB mode. Phase-delayed current injection circuits are associated with first-stage bias, second-stage bias, or both. The current injection circuits operate to quickly re-charge inter-stage parasitic capacitance associated with the active side of the class AB dynamic current source shortly after that side becomes inactive. Doing so quickly dissipates an otherwise slowly-decaying residual drive signal to prevent the output stage from continuing to conduct after the associated side of the current source becomes inactive. Excessive current consumption and possible destructive operation of the output stage are mitigated as a result.
摘要翻译：这里的实施例和方法作为在AB类模式下操作的两级电压控制电流源（即，动态电流源）。相位延迟电流注入电路与第一级偏置，第二级偏置或两者相关联。电流注入电路用于在该侧变为无效之后不久，快速重新充电与AB类动态电流源的有源侧相关的级间寄生电容。这样做很快消散了另外缓慢衰减的残留驱动信号，以防止在电流源的相关侧变为无效之后输出级继续进行。因此，可以减轻输出级的过度消耗电流和可能的破坏性操作。

60. 发明授权

US08319553B1 Apparatus and methods for biasing amplifiers 有权
标题翻译：用于偏置放大器的装置和方法
公开(公告)号：US08319553B1
公开(公告)日：2012-11-27
申请号：US13196523
申请日：2011-08-02
申请人： Evgueni Ivanov
发明人： Evgueni Ivanov
IPC分类号： H03F3/45
CPC分类号： H03F3/45197 , H03F1/223 , H03F3/45183 , H03F3/456 , H03F2200/261 , H03F2200/555 , H03F2203/45322 , H03F2203/45481 , H03F2203/45674 , H03F2203/45676
摘要： Apparatus and methods for biasing amplifiers are provided. In certain implementations, a bias circuit is provided for controlling the drain-source voltage of input transistors electrically connected to the inputs of a transconductance amplification circuit. For example, the bias circuit can maintain a relatively constant drain-source voltage in the input transistors by using a feedback loop that includes a feedback amplifier for adjusting the bias current of the input transistors based upon a difference between the drain and source voltages of the input transistors. In certain implementations, the feedback amplifier has an offset voltage equal to about the desired value of the drain-source voltage, and the feedback amplifier is configured to adjust the bias current until the difference between the inputs of the feedback amplifier is equal to about the offset voltage.
摘要翻译：提供用于偏置放大器的装置和方法。在某些实施方式中，提供偏置电路用于控制电连接到跨导放大电路的输入的输入晶体管的漏 - 源电压。例如，偏置电路可以通过使用反馈环路来保持输入晶体管中的相对恒定的漏极 - 源极电压，该反馈环路包括用于基于漏极和源极电压之间的差异来调节输入晶体管的偏置电流的反馈放大器输入晶体管。在某些实施方案中，反馈放大器具有等于漏源电压的期望值的偏移电压，并且反馈放大器被配置为调整偏置电流，直到反馈放大器的输入之间的差等于约失调电压。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式