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1. 发明申请

US20100174648A1 SECURE REAL-TIME BUSINESS PROCESSING SYSTEMS 审中-公开
标题翻译：安全实时业务处理系统
公开(公告)号：US20100174648A1
公开(公告)日：2010-07-08
申请号：US12254952
申请日：2008-10-21
申请人： Daniel W. Krantz , Shawn Wood , Tim Surface , Gerri Papillon , Brian Roberds
发明人： Daniel W. Krantz , Shawn Wood , Tim Surface , Gerri Papillon , Brian Roberds
IPC分类号： G06N5/02 , G06Q20/00 , G06Q10/00 , G06Q99/00
CPC分类号： G06Q10/06 , G06Q10/103 , G06Q20/40 , G06Q50/265
摘要： The present disclosure provides a dynamic business system comprising a business intelligence processing module; a dynamic rules module coupled to said business intelligence module; a dynamic collaboration engine coupled to said dynamic rules module and said business intelligence processing module; a data mining and expert knowledge module coupled to said interoperable system wherein said expert knowledge module can effect a portion of a data set to undergo real-time modification. The system data output and reporting is provided via a secure online method providing real-time interoperability among disconnected facilities. Additionally, the dynamic business system described provides dynamic and real-time decision making capabilities based on third party's available data set wherein data output and reporting is provided via a secure online method providing real-time interoperability among disconnected facilities.
摘要翻译：本公开提供了一种动态商业系统，其包括商业智能处理模块; 耦合到所述商业智能模块的动态规则模块; 耦合到所述动态规则模块和所述商业智能处理模块的动态协作引擎; 耦合到所述互操作系统的数据挖掘和专家知识模块，其中所述专家知识模块可以影响数据集的一部分以进行实时修改。系统数据输出和报告通过安全的在线方式提供，提供断开连接的设备之间的实时互操作性。此外，所描述的动态业务系统提供基于第三方可用数据集的动态和实时决策能力，其中数据输出和报告通过提供断开连接的设备之间的实时互操作性的安全在线方式来提供。

2. 发明授权

US06952040B2 Transistor structure and method of fabrication 失效
标题翻译：晶体管结构及其制造方法
公开(公告)号：US06952040B2
公开(公告)日：2005-10-04
申请号：US09895697
申请日：2001-06-29
申请人： Robert S. Chau , Jack Kavalieros , Anand Murthy , Brian Roberds , Brian S. Doyle
发明人： Robert S. Chau , Jack Kavalieros , Anand Murthy , Brian Roberds , Brian S. Doyle
IPC分类号： H01L21/3205 , H01L21/336 , H01L29/49 , H01L29/76 , H01L29/786 , H01L29/94 , H01L31/062 , H01L31/113
CPC分类号： H01L29/66772 , H01L29/41783 , H01L29/4908 , H01L29/495 , H01L29/4966 , H01L29/4975 , H01L29/665 , H01L29/66628 , H01L29/78654 , Y10S977/70 , Y10S977/721 , Y10S977/936
摘要： A novel transistor structure and its method of fabrication. According to the present invention, the transistor includes an intrinsic silicon body having a first surface. A gate dielectric is formed on the first surface of the intrinsic silicon body. A gate electrode is formed on the gate dielectric wherein the gate electrode comprises a mid-gap work function film on the gate dielectric. A pair of source/drain regions are formed on opposite sides of the intrinsic silicon body.
摘要翻译：一种新颖的晶体管结构及其制造方法。根据本发明，晶体管包括具有第一表面的本征硅体。在本征硅体的第一表面上形成栅极电介质。栅极电极形成在栅极电介质上，其中栅电极在栅极电介质上包括中间间隙功函数膜。一对源极/漏极区域形成在本征硅体的相对侧上。

3. 发明授权

US06873013B2 Silicon-on-insulator structure and method of reducing backside drain-induced barrier lowering 失效
标题翻译：绝缘体上的结构和减少背面漏极引起的屏障降低的方法
公开(公告)号：US06873013B2
公开(公告)日：2005-03-29
申请号：US10396950
申请日：2003-03-24
申请人： Brian Roberds , Doulgas W. Barlage
发明人： Brian Roberds , Doulgas W. Barlage
IPC分类号： H01L21/336 , H01L29/45 , H01L29/49 , H01L29/786 , H01L27/01
CPC分类号： H01L29/66772 , H01L29/458 , H01L29/4908 , H01L29/78609 , H01L29/78639
摘要： The invention relates to a transistor that includes a semiconductive layer on an insulator layer. Below the insulator layer is a substrate and a contact is disposed in the insulator layer that originates at the substrate and terminates in the insulator layer. The contact is aligned below the transistor junction. The invention also relates to a process flow that is used to fabricate the transistor. The process flow includes forming the contact by either a spacer etch or a directional, angular etch.
摘要翻译：本发明涉及一种在绝缘体层上包括半导体层的晶体管。在绝缘体层的下面是基板，并且在绝缘体层中设置接触件，该绝缘体层起始于基板并终止在绝缘体层中。触点对准在晶体管结下方。本发明还涉及用于制造晶体管的工艺流程。工艺流程包括通过间隔物蚀刻或定向角蚀刻形成接触。

4. 发明授权

US06281532B1 Technique to obtain increased channel mobilities in NMOS transistors by gate electrode engineering 有权
标题翻译：通过栅极电极工程获得NMOS晶体管中增加的沟道迁移率的技术
公开(公告)号：US06281532B1
公开(公告)日：2001-08-28
申请号：US09340954
申请日：1999-06-28
申请人： Brian S. Doyle , Brian Roberds , Jin Lee
发明人： Brian S. Doyle , Brian Roberds , Jin Lee
IPC分类号： H01L2976
CPC分类号： H01L29/7845 , H01L21/26506 , H01L21/28026 , H01L29/0649 , H01L29/0653 , H01L29/7842
摘要： A method of modifying the mobility of a transistor. First, a transistor having a gate is formed. A substance is then implanted in the gate. The transistor is annealed such that the implanted substance forms at least one void in the transistor's gate.
摘要翻译：修改晶体管的迁移率的方法。首先，形成具有栅极的晶体管。然后将物质植入门。晶体管退火，使得注入的物质在晶体管的栅极中形成至少一个空隙。

5. 发明申请

US20060189096A1 Creation of high mobility channels in thin-body SOI devices 失效
公开(公告)号：US20060189096A1
公开(公告)日：2006-08-24
申请号：US11403974
申请日：2006-04-13
申请人： Brian Doyle , Brian Roberds
发明人： Brian Doyle , Brian Roberds
IPC分类号： H01L21/46
CPC分类号： H01L21/76254 , H01L21/02381 , H01L21/0245 , H01L21/0251 , H01L21/02532 , H01L21/02664
摘要： A method for fabricating a strained silicon film to a silicon on insulation (SOI) wafer. A layer of oxide is deposited onto a wafer that has a stack structure of a first base substrate, a layer of relaxed film=and a second layer of strained film. The SOI wafer has a stack structure of a second base substrate and a layer of oxidized film. The SOI wafer is attached to the wafer and is heated at a first temperature. This causes a silicon dioxide (SiO2) dangling bond to form on the second base substrate of the SOI wafer, transferring the strained film from one wafer to the other.

6. 发明授权

US06740913B2 MOS transistor using mechanical stress to control short channel effects 有权
标题翻译： MOS晶体管采用机械应力来控制短沟道效应
公开(公告)号：US06740913B2
公开(公告)日：2004-05-25
申请号：US10045376
申请日：2001-11-09
申请人： Brian S. Doyle , Brian Roberds
发明人： Brian S. Doyle , Brian Roberds
IPC分类号： H01L2976
CPC分类号： H01L29/0649 , H01L21/26506 , H01L21/26533 , H01L29/0653 , H01L29/7842
摘要： A transistor using mechanical stress to alter carrier mobility. Voids are formed in one or more of the source, drain, channel or gate regions to introduce tensile or compressive stress to improve short channel effects.
摘要翻译：使用机械应力来改变载流子迁移率的晶体管。在源极，漏极，沟道或栅极区域中的一个或多个中形成空穴以引入拉伸或压缩应力以改善短沟道效应。

7. 发明授权

US06653700B2 Transistor structure and method of fabrication 有权
标题翻译：晶体管结构及其制造方法
公开(公告)号：US06653700B2
公开(公告)日：2003-11-25
申请号：US10191118
申请日：2002-07-08
申请人： Robert S. Chau , Jack Kavalieros , Anand Murthy , Brian Roberds , Brian S. Doyle
发明人： Robert S. Chau , Jack Kavalieros , Anand Murthy , Brian Roberds , Brian S. Doyle
IPC分类号： H01L2976
CPC分类号： H01L29/66772 , H01L29/41783 , H01L29/4908 , H01L29/495 , H01L29/4966 , H01L29/4975 , H01L29/665 , H01L29/66628 , H01L29/78654 , Y10S977/70 , Y10S977/721 , Y10S977/936
摘要： A novel transistor structure and its method of fabrication. According to the present invention, the transistor includes an intrinsic silicon body having a first surface. A gate dielectric is formed on the first surface of the intrinsic silicon body. A gate electrode is formed on the gate dielectric wherein the gate electrode comprises a mid-gap work function film on the gate dielectric. A pair of source/drain regions are formed on opposite sides of the intrinsic silicon body.
摘要翻译：一种新颖的晶体管结构及其制造方法。根据本发明，晶体管包括具有第一表面的本征硅体。在本征硅体的第一表面上形成栅极电介质。栅极电极形成在栅极电介质上，其中栅电极在栅极电介质上包括中间间隙功函数膜。一对源极/漏极区域形成在本征硅体的相对侧上。

8. 发明授权

US06642133B2 Silicon-on-insulator structure and method of reducing backside drain-induced barrier lowering 有权
公开(公告)号：US06642133B2
公开(公告)日：2003-11-04
申请号：US10027047
申请日：2001-12-20
申请人： Brian Roberds , Doulgas W. Barlage
发明人： Brian Roberds , Doulgas W. Barlage
IPC分类号： H01L213205
CPC分类号： H01L29/66772 , H01L29/458 , H01L29/4908 , H01L29/78609 , H01L29/78639
摘要： The invention relates to a transistor that includes a semiconductive layer on an insulator layer. Below the insulator layer is a substrate and a contact is disposed in the insulator layer that originates at the substrate and terminates in the insulator layer. The contact is aligned below the transistor junction. The invention also relates to a process flow that is used to fabricate the transistor. The process flow includes forming the contact by either a spacer etch or a directional, angular etch.

9. 发明授权

US06620713B2 Interfacial layer for gate electrode and high-k dielectric layer and methods of fabrication 失效
标题翻译：栅电极和高k电介质层的界面层及其制造方法
公开(公告)号：US06620713B2
公开(公告)日：2003-09-16
申请号：US10038410
申请日：2002-01-02
申请人： Reza Arghavani , Robert Chau , Mark Doczy , Brian Roberds
发明人： Reza Arghavani , Robert Chau , Mark Doczy , Brian Roberds
IPC分类号： H01L213205
CPC分类号： H01L21/28176 , H01L21/28035 , H01L21/28185 , H01L21/28194 , H01L21/31683 , H01L29/4925 , H01L29/517
摘要： Method of fabricating a semiconductor device. The semiconductor device comprises a substrate, a high-k gate dielectric layer formed on the substrate, and a hydrogen-free gate electrode deposited on the high-k gate dielectric layer wherein the hydrogen-free gate electrode is conductive. The method comprises depositing the high-k gate dielectric layer on the substrate, sputtering the gate electrode on the gate dielectric layer and treating the gate electrode such that the gate electrode is conductive.
摘要翻译：制造半导体器件的方法半导体器件包括衬底，形成在衬底上的高k栅介质层和沉积在高k栅介质层上的无氢栅电极，其中无氢栅电极是导电的。该方法包括在衬底上沉积高k栅极电介质层，在栅极电介质层上溅射栅电极并处理栅电极使得栅电极是导电的。

10. 发明授权

US06228694B1 Method of increasing the mobility of MOS transistors by use of localized stress regions 有权
标题翻译：通过使用局部应力区域增加MOS晶体管的迁移率的方法
公开(公告)号：US06228694B1
公开(公告)日：2001-05-08
申请号：US09340583
申请日：1999-06-28
申请人： Brian S. Doyle , Brian Roberds , Jin Lee
发明人： Brian S. Doyle , Brian Roberds , Jin Lee
IPC分类号： H01L218238
CPC分类号： H01L21/26506 , H01L21/823412 , H01L21/823418 , H01L29/0649 , H01L29/0653 , H01L29/32 , H01L29/7842
摘要： A method of modifying the mobility of a transistor. First, a substance is implanted into a substrate. The substrate is then annealed such that the implanted substance forms at least one void in the substrate. Then, a transistor is formed on the substrate.
摘要翻译：修改晶体管的迁移率的方法。首先，将物质植入基材中。然后将衬底退火，使得注入的物质在衬底中形成至少一个空隙。然后，在基板上形成晶体管。

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