专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07825477B2 Semiconductor device with localized stressor 有权
标题翻译：具有局部应激源的半导体器件
公开(公告)号：US07825477B2
公开(公告)日：2010-11-02
申请号：US11738968
申请日：2007-04-23
申请人： Ru-Shang Hsiao , Min Cao , Chung-Te Lin , Ta-Ming Kuan , Cheng-Tung Hsu
发明人： Ru-Shang Hsiao , Min Cao , Chung-Te Lin , Ta-Ming Kuan , Cheng-Tung Hsu
IPC分类号： H01L23/62 , H01L29/78 , H01L21/0234
CPC分类号： H01L21/823807 , H01L21/823814 , H01L21/823864 , H01L29/66636 , H01L29/7848 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device, such as a PMOS transistor, having localized stressors is provided. Recesses are formed on opposing sides of gate electrodes such that the recesses are offset from the gate electrode by dummy spacers. The recesses are filled with a stress-inducing layer. The dummy recesses are removed and lightly-doped drains are formed. Thereafter, new spacers are formed and the stress-inducing layer is recessed. One or more additional implants may be performed to complete source/drain regions. In an embodiment, the PMOS transistor may be formed on the same substrate as one or more NMOS transistors. Dual etch stop layers may also be formed over the PMOS and/or the NMOS transistors.
摘要翻译：提供具有局部应力源的诸如PMOS晶体管的半导体器件。凹槽形成在栅电极的相对侧上，使得凹槽通过假间隔件从栅电极偏移。这些凹部填充有应力诱导层。去除虚拟凹槽并形成轻掺杂的排水沟。此后，形成新的间隔物并且应力诱导层凹陷。可以执行一个或多个附加植入物以完成源极/漏极区域。在一个实施例中，PMOS晶体管可以形成在与一个或多个NMOS晶体管相同的衬底上。也可以在PMOS和/或NMOS晶体管上形成双重蚀刻停止层。

2. 发明申请

US20100235163A1 METHOD AND SYSTEM FOR ENCODING CHINESE WORDS 审中-公开
标题翻译：用于编码中文字的方法和系统
公开(公告)号：US20100235163A1
公开(公告)日：2010-09-16
申请号：US12405171
申请日：2009-03-16
申请人： CHENG-TUNG HSU
发明人： CHENG-TUNG HSU
IPC分类号： G06F17/27
CPC分类号： G06F17/2223
摘要： A Chinese character or word encoding system and method for encoding a Unicode Differentiation Index (UDI) into the least significant 3 bits of one of the three component color of the foreground color of the RTF Chinese text. This encoded UDI value allows the correct identification of the encoded Chinese word. It also allows the identification of the traditional Chinese or simplified Chinese counterpart correctly. Further, the encoded UDI allows the identification of the font file differentiator when user is generating a correct Dualese script for a given Chinese word, wherein Dualese refers to a dual-script-in-one type of script.
摘要翻译：用于将Unicode差分索引（UDI）编码为RTF中文文本的前景颜色的三分量颜色之一的最低有效3位的汉字或字编码系统和方法。该编码的UDI值允许正确识别编码的中文字。也可以正确识别中文或简体中文。此外，当用户为给定的中文字生成正确的双人脚本时，编码的UDI允许识别字体文件微分器，其中Dualese是指双脚本一种类型的脚本。

3. 发明申请

US20100125449A1 Integratd phonetic Chinese system and inputting method thereof 审中-公开
标题翻译：集成语音系统及其输入方法
公开(公告)号：US20100125449A1
公开(公告)日：2010-05-20
申请号：US12313198
申请日：2008-11-17
申请人： Cheng-Tung Hsu
发明人： Cheng-Tung Hsu
IPC分类号： G06F17/20
CPC分类号： G06F17/2223 , G06F3/018
摘要： An Integrated Phonetic Chinese System includes a module of Chinese pronunciation keys, a module of Romanized Chinese scripts, a module of input method that allows users to input Chinese characters and pronunciation keys and Romanized scripts and a module of advanced input method utilizing a 24 key position matrix that allows users to input Chinese characters and pronunciation keys and Romanized script with maximum speed and efficiency.
摘要翻译：综合语音中文系统包括中文发音键模块，罗马汉字脚本模块，用户输入汉字，发音键和罗马字脚本的输入法模块，以及使用24键位置的高级输入法模块矩阵，允许用户以最大的速度和效率输入汉字和发音键和罗马字体。

4. 发明申请

US20180260110A1 VIRTUAL KEYBOARD SYSTEM AND METHOD OF OPERATION FOR THE SAME 审中-公开
公开(公告)号：US20180260110A1
公开(公告)日：2018-09-13
申请号：US15453840
申请日：2017-03-08
申请人： CHENG TUNG HSU
发明人： CHENG TUNG HSU
IPC分类号： G06F3/0488 , G06F3/023 , G06F3/041
CPC分类号： G06F3/04886 , G06F3/0238 , G06F3/04883
摘要： The present invention relates to a virtual keyboard system and a method thereof for retrieving stored text blocks, thereby activating a text block storage process.

5. 发明申请

US20100330755A1 Semiconductor Device With Localized Stressor 有权
标题翻译：具有局部应力的半导体器件
公开(公告)号：US20100330755A1
公开(公告)日：2010-12-30
申请号：US12873889
申请日：2010-09-01
申请人： Ru-Shang Hsiao , Min Cao , Chung-Te Lin , Ta-Ming Kuan , Cheng-Tung Hsu
发明人： Ru-Shang Hsiao , Min Cao , Chung-Te Lin , Ta-Ming Kuan , Cheng-Tung Hsu
IPC分类号： H01L21/8238
CPC分类号： H01L21/823807 , H01L21/823814 , H01L21/823864 , H01L29/66636 , H01L29/7848 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device, such as a PMOS transistor, having localized stressors is provided. Recesses are formed on opposing sides of gate electrodes such that the recesses are offset from the gate electrode by dummy spacers. The recesses are filled with a stress-inducing layer. The dummy recesses are removed and lightly-doped drains are formed. Thereafter, new spacers are formed and the stress-inducing layer is recessed. One or more additional implants may be performed to complete source/drain regions. In an embodiment, the PMOS transistor may be formed on the same substrate as one or more NMOS transistors. Dual etch stop layers may also be formed over the PMOS and/or the NMOS transistors.
摘要翻译：提供具有局部应力源的诸如PMOS晶体管的半导体器件。凹槽形成在栅电极的相对侧上，使得凹槽通过假间隔件从栅电极偏移。这些凹部填充有应力诱导层。去除虚拟凹槽并形成轻掺杂的排水沟。此后，形成新的间隔物并且应力诱导层凹陷。可以执行一个或多个附加植入物以完成源极/漏极区域。在一个实施例中，PMOS晶体管可以形成在与一个或多个NMOS晶体管相同的衬底上。也可以在PMOS和/或NMOS晶体管上形成双重蚀刻停止层。

6. 发明申请

US20080258233A1 Semiconductor Device with Localized Stressor 有权
标题翻译：具有局部应力的半导体器件
公开(公告)号：US20080258233A1
公开(公告)日：2008-10-23
申请号：US11738968
申请日：2007-04-23
申请人： Ru-Shang Hsiao , Min Cao , Chung-Te Lin , Ta-Ming Kuan , Cheng-Tung Hsu
发明人： Ru-Shang Hsiao , Min Cao , Chung-Te Lin , Ta-Ming Kuan , Cheng-Tung Hsu
IPC分类号： H01L29/76
CPC分类号： H01L21/823807 , H01L21/823814 , H01L21/823864 , H01L29/66636 , H01L29/7848 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device, such as a PMOS transistor, having localized stressors is provided. Recesses are formed on opposing sides of gate electrodes such that the recesses are offset from the gate electrode by dummy spacers. The recesses are filled with a stress-inducing layer. The dummy recesses are removed and lightly-doped drains are formed. Thereafter, new spacers are formed and the stress-inducing layer is recessed. One or more additional implants may be performed to complete source/drain regions. In an embodiment, the PMOS transistor may be formed on the same substrate as one or more NMOS transistors. Dual etch stop layers may also be formed over the PMOS and/or the NMOS transistors.
摘要翻译：提供具有局部应力源的诸如PMOS晶体管的半导体器件。凹槽形成在栅电极的相对侧上，使得凹槽通过假间隔件从栅电极偏移。这些凹部填充有应力诱导层。去除虚拟凹槽并形成轻掺杂的排水沟。此后，形成新的间隔物并且应力诱导层凹陷。可以执行一个或多个附加植入物以完成源极/漏极区域。在一个实施例中，PMOS晶体管可以形成在与一个或多个NMOS晶体管相同的衬底上。也可以在PMOS和/或NMOS晶体管上形成双重蚀刻停止层。

7. 外观设计

USD952435S1 Hammer 有权
公开(公告)号：USD952435S1
公开(公告)日：2022-05-24
申请号：US29759637
申请日：2020-11-24
申请人： Cheng-Tung Hsu
设计人： Cheng-Tung Hsu

8. 外观设计

USD825308S1 Hammer 有权
公开(公告)号：USD825308S1
公开(公告)日：2018-08-14
申请号：US29590590
申请日：2017-01-11
申请人： Cheng-Tung Hsu
设计人： Cheng-Tung Hsu

9. 发明授权

US08158474B2 Semiconductor device with localized stressor 有权
标题翻译：具有局部应激源的半导体器件
公开(公告)号：US08158474B2
公开(公告)日：2012-04-17
申请号：US12873889
申请日：2010-09-01
申请人： Ru-Shang Hsiao , Min Cao , Chung-Te Lin , Ta-Ming Kuan , Cheng-Tung Hsu
发明人： Ru-Shang Hsiao , Min Cao , Chung-Te Lin , Ta-Ming Kuan , Cheng-Tung Hsu
IPC分类号： H01L21/0243 , H01L23/76
CPC分类号： H01L21/823807 , H01L21/823814 , H01L21/823864 , H01L29/66636 , H01L29/7848 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device, such as a PMOS transistor, having localized stressors is provided. Recesses are formed on opposing sides of gate electrodes such that the recesses are offset from the gate electrode by dummy spacers. The recesses are filled with a stress-inducing layer. The dummy recesses are removed and lightly-doped drains are formed. Thereafter, new spacers are formed and the stress-inducing layer is recessed. One or more additional implants may be performed to complete source/drain regions. In an embodiment, the PMOS transistor may be formed on the same substrate as one or more NMOS transistors. Dual etch stop layers may also be formed over the PMOS and/or the NMOS transistors.
摘要翻译：提供具有局部应力源的诸如PMOS晶体管的半导体器件。凹槽形成在栅电极的相对侧上，使得凹槽通过假间隔件从栅电极偏移。这些凹部填充有应力诱导层。去除虚拟凹槽并形成轻掺杂的排水沟。此后，形成新的间隔物并且应力诱导层凹陷。可以执行一个或多个附加植入物以完成源极/漏极区域。在一个实施例中，PMOS晶体管可以形成在与一个或多个NMOS晶体管相同的衬底上。也可以在PMOS和/或NMOS晶体管上形成双重蚀刻停止层。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式