专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20080106530A1 Video composition optimization by the identification of transparent and opaque regions 有权
标题翻译：通过识别透明和不透明区域的视频构图优化
公开(公告)号：US20080106530A1
公开(公告)日：2008-05-08
申请号：US11584903
申请日：2006-10-23
申请人： Mark J. Buxton
发明人： Mark J. Buxton
IPC分类号： G09G5/00
CPC分类号： G09G5/022 , G09G5/001 , G09G2310/0262 , G09G2330/021 , G09G2340/125
摘要： According to some embodiments a method is provided to scan a first row of a display plane, determine that the first row of the display plane includes a non-transparent pixel, indicate the first row has a non-transparent pixel; and composite the first row of the display plane.
摘要翻译：根据一些实施例，提供了一种扫描显示平面的第一行的方法，确定显示平面的第一行包括非透明像素，指示第一行具有非透明像素; 并组合显示平面的第一行。

2. 发明申请

US20140344553A1 Gathering and Scattering Multiple Data Elements 审中-公开
标题翻译：收集和散布多个数据元素
公开(公告)号：US20140344553A1
公开(公告)日：2014-11-20
申请号：US13898189
申请日：2013-05-20
申请人： Christopher J. Hughes , Yen-Kuang (Y.K.) Chen , Mayank Bomb , Jason W. Brandt , Mark J. Buxton , Mark J. Charney , Srinivas Chennupaty , Jesus Corbal , Martin G. Dixon , Milind B. Girkar , Jonathan C. Hall , Hideki (Saito) Ido , Peter Lachner , Gilbert Neiger , Chris J. Newburn , Rajesh S. Parthasarathy , Bret L. Toll , Robert Valentine , Jeffrey G. Wiedemeier
发明人： Christopher J. Hughes , Yen-Kuang (Y.K.) Chen , Mayank Bomb , Jason W. Brandt , Mark J. Buxton , Mark J. Charney , Srinivas Chennupaty , Jesus Corbal , Martin G. Dixon , Milind B. Girkar , Jonathan C. Hall , Hideki (Saito) Ido , Peter Lachner , Gilbert Neiger , Chris J. Newburn , Rajesh S. Parthasarathy , Bret L. Toll , Robert Valentine , Jeffrey G. Wiedemeier
IPC分类号： G06F9/38 , G06F9/30
CPC分类号： G06F9/3861 , G06F9/30036 , G06F9/30043 , G06F9/30145 , G06F9/345
摘要： According to a first aspect, efficient data transfer operations can be achieved by: decoding by a processor device, a single instruction specifying a transfer operation for a plurality of data elements between a first storage location and a second storage location; issuing the single instruction for execution by an execution unit in the processor; detecting an occurrence of an exception during execution of the single instruction; and in response to the exception, delivering pending traps or interrupts to an exception handler prior to delivering the exception.
摘要翻译：根据第一方面，可以通过以下方式来实现有效的数据传送操作：通过处理器设备解码指定在第一存储位置和第二存储位置之间的多个数据元素的传送操作的单个指令; 发出用于由处理器中的执行单元执行的单个指令; 在单个指令的执行期间检测异常的发生; 并且响应于异常，在传递异常之前将异常陷阱或中断传递给异常处理程序。

3. 发明授权

US08606841B2 Method and apparatus for performing logical compare operation 有权
公开(公告)号：US08606841B2
公开(公告)日：2013-12-10
申请号：US13656634
申请日：2012-10-19
申请人： Rajiv Kapoor , Ronen Zohar , Mark J. Buxton , Zeev Sperber , Koby Gottlieb
发明人： Rajiv Kapoor , Ronen Zohar , Mark J. Buxton , Zeev Sperber , Koby Gottlieb
IPC分类号： G06F7/50
CPC分类号： G06F9/30021 , G06F7/026 , G06F9/3001 , G06F9/30029 , G06F9/30036 , G06F9/30058 , G06F9/30094 , G06F9/30098 , G06F9/30145 , G06F9/30149 , G06F9/3016 , G06F9/3887 , G06F12/0875 , G06F2212/452
摘要： A method and apparatus for including in a processor instructions for performing logical-comparison and branch support operations on packed or unpacked data. In one embodiment, instruction decode logic decodes instructions for an execution unit to operate on packed data elements including logical comparisons. A register file including 128-bit packed data registers stores packed single-precision floating point (SPFP) and packed integer data elements. The logical comparisons may include comparison of SPFP data elements and comparison of integer data elements and setting at least one bit to indicate the results. Based on these comparisons, branch support actions are taken. Such branch support actions may include setting the at least one bit, which in turn may be utilized by a branching unit in response to a branch instruction. Alternatively, the branch support actions may include branching to an indicated target code location.

4. 发明授权

US07340495B2 Superior misaligned memory load and copy using merge hardware 失效
标题翻译：使用合并硬件优化不对齐内存加载和复制
公开(公告)号：US07340495B2
公开(公告)日：2008-03-04
申请号：US10611379
申请日：2003-06-30
申请人： Mark J. Buxton , Patrick J. Fay , William W. Macey, Jr. , Eric L. Debes
发明人： Mark J. Buxton , Patrick J. Fay , William W. Macey, Jr. , Eric L. Debes
IPC分类号： G06F5/01
CPC分类号： G06F9/3885 , G06F9/3001 , G06F9/30014 , G06F9/30018 , G06F9/30025 , G06F9/30032 , G06F9/30036 , G06F9/30109 , G06F9/30112 , G06F9/3013 , G06F9/3816 , G06F17/147 , G06F17/15
摘要： Method, apparatus, and program means for performing misaligned memory load and copy using aligned memory operations together with a SIMD merge instruction. The method of one embodiment comprises determining whether a memory operation involves a misaligned memory address. The memory operation is performed with aligned memory accesses if the memory operation is determined as not involving a misaligned memory address. The memory operation is performed with an algorithm including a merge operation and aligned memory accesses if the memory operation is determined as involving a misaligned memory address.
摘要翻译：用于使用对准的存储器操作与SIMD合并指令一起执行不对准的存储器加载和复制的方法，装置和程序装置。一个实施例的方法包括确定存储器操作是否涉及未对准的存储器地址。如果将存储器操作确定为不涉及未对齐的存储器地址，则对齐存储器访问执行存储器操作。如果存储器操作被确定为涉及未对准的存储器地址，则使用包括合并操作和对准存储器访问的算法执行存储器操作。

5. 发明授权

US08447962B2 Gathering and scattering multiple data elements 有权
标题翻译：收集和散布多个数据元素
公开(公告)号：US08447962B2
公开(公告)日：2013-05-21
申请号：US12644440
申请日：2009-12-22
申请人： Christopher J. Hughes , Yen-Kuang (Y. K.) Chen , Mayank Bomb , Jason W. Brandt , Mark J. Buxton , Mark J. Charney , Srinivas Chennupaty , Jesus Corbal , Martin G. Dixon , Milind B. Girkar , Jonathan C. Hall , Hideki (Saito) Ido , Peter Lachner , Gilbert Neiger , Chris J. Newburn , Rajesh S. Parthasarathy , Bret L. Toll , Robert Valentine , Jeffrey G. Wiedemeier
发明人： Christopher J. Hughes , Yen-Kuang (Y. K.) Chen , Mayank Bomb , Jason W. Brandt , Mark J. Buxton , Mark J. Charney , Srinivas Chennupaty , Jesus Corbal , Martin G. Dixon , Milind B. Girkar , Jonathan C. Hall , Hideki (Saito) Ido , Peter Lachner , Gilbert Neiger , Chris J. Newburn , Rajesh S. Parthasarathy , Bret L. Toll , Robert Valentine , Jeffrey G. Wiedemeier
IPC分类号： G06F7/38 , G06F9/00 , G06F9/44 , G06F15/00
CPC分类号： G06F9/30018 , G06F9/30032 , G06F9/30036 , G06F9/30043 , G06F9/30109 , G06F9/3865
摘要： According to a first aspect, efficient data transfer operations can be achieved by: decoding by a processor device, a single instruction specifying a transfer operation for a plurality of data elements between a first storage location and a second storage location; issuing the single instruction for execution by an execution unit in the processor; detecting an occurrence of an exception during execution of the single instruction; and in response to the exception, delivering pending traps or interrupts to an exception handler prior to delivering the exception.
摘要翻译：根据第一方面，可以通过以下方式来实现有效的数据传送操作：通过处理器设备解码指定在第一存储位置和第二存储位置之间的多个数据元素的传送操作的单个指令; 发出用于由处理器中的执行单元执行的单个指令; 在单个指令的执行期间检测异常的发生; 并且响应于异常，在传递异常之前将异常陷阱或中断传递给异常处理程序。

6. 发明授权

US07454123B2 Personal video recorder having reduced overscan coding 有权
标题翻译：具有减少过扫描编码的个人录像机
公开(公告)号：US07454123B2
公开(公告)日：2008-11-18
申请号：US10165524
申请日：2002-06-06
申请人： Mark J. Buxton
发明人： Mark J. Buxton
IPC分类号： H04N7/26
CPC分类号： H04N5/76 , H04N5/781 , H04N9/8042
摘要： A digital recording device for storing video data is disclosed. The digital recorder intelligently records less data than is provided to it by determining which data to record, and which data to eliminate. In some embodiments, the recorder drops or modifies overscan data from a video frame prior to compressing the data, thereby relieving a data encoder from unnecessary data operations, and saving storage space.
摘要翻译：公开了一种用于存储视频数据的数字记录装置。数字记录器通过确定要记录的数据和要消除的数据，智能地记录比提供的数据少的数据。在一些实施例中，在压缩数据之前，记录器从视频帧中丢弃或修改过扫描数据，从而减轻数据编码器免于不必要的数据操作，并节省存储空间。

7. 发明授权

US06937730B1 Method and system for providing content-specific conditional access to digital content 失效
标题翻译：用于向数字内容提供内容特定条件访问的方法和系统
公开(公告)号：US06937730B1
公开(公告)日：2005-08-30
申请号：US09505211
申请日：2000-02-16
申请人： Mark J. Buxton
发明人： Mark J. Buxton
IPC分类号： H04N7/16 , H04N7/173 , H04N7/167
CPC分类号： H04N7/17318 , H04N7/163 , H04N7/165 , H04N21/234345 , H04N21/25808 , H04N21/4318 , H04N21/4396 , H04N21/4627
摘要： Content level filtering or masking of digital content that is broadcast, multicast, or otherwise distributed to receivers in a communications system. Instead of controlling the content only at the location of the broadcaster or at the receiver, the present invention provides the capability to control access to the content, and manipulate the content itself via a masking operation, at any point in the content distribution hierarchy or transmission chain. The present invention provides enhanced customer choice to different versions of the content and content creator control over content deemed to be too objectionable or too sensitive to be transmitted without partial concealment or obfuscation. A mask may be specified to change the content distributed further down the distribution hierarchy. The mask may be a distorted or opaque two dimensional (2D) region (for video content), or a replacement audio segment (for audio content), or a distorted or opaque three dimensional (3D) volume (for 3D content), carried separately from the original content in digital multimedia broadcast, multicast, or point-to-point distribution systems. The present invention also specifies the co-transmission to a receiver of encrypted, masked content, which may be used to “undo” a masking or obfuscation operation previously performed anywhere upstream of the receiver in the distribution channel.
摘要翻译：对通信系统中的广播，多播或以其他方式分发给接收机的数字内容进行内容级别过滤或屏蔽。代替仅在广播者的位置处或在接收机处控制内容，本发明提供了控制对内容的访问的能力，并且在内容分发层级或传输中的任何点处经由屏蔽操作来操纵内容本身链。本发明提供增强的客户对内容和内容创作者控制的内容的不同版本的选择，被认为对于不被部分隐藏或模糊化而被传送的太令人反感或过于敏感。可以指定掩码来改变分布层次结构进一步分布的内容。掩模可以是单独携带的扭曲或不透明的二维（2D）区域（用于视频内容）或替换音频段（用于音频内容）或扭曲或不透明的三维（3D）体积（用于3D内容）从数字多媒体广播，组播或点对点分发系统的原始内容。本发明还规定了向加密的掩蔽内容的接收机的共传输，其可以用于“撤销”在分发信道中接收机的上游任何地方先前执行的掩蔽或混淆操作。

8. 发明申请

US20130227253A1 METHOD AND APPARATUS FOR PERFORMING LOGICAL COMPARE OPERATIONS 审中-公开
公开(公告)号：US20130227253A1
公开(公告)日：2013-08-29
申请号：US13843236
申请日：2013-03-15
申请人： Rajiv Kapoor , Ronen Zohar , Mark J. Buxton , Zeev Sperber , Koby Gottlieb
发明人： Rajiv Kapoor , Ronen Zohar , Mark J. Buxton , Zeev Sperber , Koby Gottlieb
IPC分类号： G06F9/30
CPC分类号： G06F9/30021 , G06F7/026 , G06F9/3001 , G06F9/30029 , G06F9/30036 , G06F9/30058 , G06F9/30094 , G06F9/30098 , G06F9/30145 , G06F9/30149 , G06F9/3016 , G06F9/3887 , G06F12/0875 , G06F2212/452
摘要： A method and apparatus for including in a processor instructions for performing logical-comparison and branch support operations on packed or unpacked data. In one embodiment, instruction decode logic decodes instructions for an execution unit to operate on packed data elements including logical comparisons. A register file including 128-bit packed data registers stores packed single-precision floating point (SPFP) and packed integer data elements. The logical comparisons may include comparison of SPFP data elements and comparison of integer data elements and setting at least one bit to indicate the results. Based on these comparisons, branch support actions are taken. Such branch support actions may include setting the at least one bit, which in turn may be utilized by a branching unit in response to a branch instruction. Alternatively, the branch support actions may include branching to an indicated target code location.

9. 发明授权

US10114651B2 Gathering and scattering multiple data elements 有权
公开(公告)号：US10114651B2
公开(公告)日：2018-10-30
申请号：US15862407
申请日：2018-01-04
申请人： Christopher J. Hughes , Yen-Kuang (Y. K.) Chen , Mayank Bomb , Jason W. Brandt , Mark J. Buxton , Mark J. Charney , Srinivas Chennupaty , Jesus Corbal , Martin G. Dixon , Milind B. Girkar , Jonathan C. Hall , Hideki (Saito) Ido , Peter Lachner , Gilbert Neiger , Chris J. Newburn , Rajesh S. Parthasarathy , Bret L. Toll , Robert Valentine , Jeffrey G. Wiedemeier
发明人： Christopher J. Hughes , Yen-Kuang (Y. K.) Chen , Mayank Bomb , Jason W. Brandt , Mark J. Buxton , Mark J. Charney , Srinivas Chennupaty , Jesus Corbal , Martin G. Dixon , Milind B. Girkar , Jonathan C. Hall , Hideki (Saito) Ido , Peter Lachner , Gilbert Neiger , Chris J. Newburn , Rajesh S. Parthasarathy , Bret L. Toll , Robert Valentine , Jeffrey G. Wiedemeier
IPC分类号： G06F9/00 , G06F12/08 , G06F9/38 , G06F9/30
摘要： According to a first aspect, efficient data transfer operations can be achieved by: decoding by a processor device, a single instruction specifying a transfer operation for a plurality of data elements between a first storage location and a second storage location; issuing the single instruction for execution by an execution unit in the processor; detecting an occurrence of an exception during execution of the single instruction; and in response to the exception, delivering pending traps or interrupts to an exception handler prior to delivering the exception.

10. 发明申请

US20180129506A1 GATHERING AND SCATTERING MULTIPLE DATA ELEMENTS 审中-公开
公开(公告)号：US20180129506A1
公开(公告)日：2018-05-10
申请号：US15862407
申请日：2018-01-04
申请人： Christopher J. Hughes , Yen-Kuang (Y.K.) Chen , Mayank Bomb , Jason W. Brandt , Mark J. Buxton , Mark J. Charney , Srinivas Chennupaty , Jesus Corbal , Martin G. Dixon , Milind B. Girkar , Jonathan C. Hall , Hideki (Saito) Ido , Peter Lachner , Gilbert Neiger , Chris J. Newburn , Rajesh S. Parthasarathy , Bret L. Toll , Robert Valentine , Jeffrey G. Wiedemeier
发明人： Christopher J. Hughes , Yen-Kuang (Y.K.) Chen , Mayank Bomb , Jason W. Brandt , Mark J. Buxton , Mark J. Charney , Srinivas Chennupaty , Jesus Corbal , Martin G. Dixon , Milind B. Girkar , Jonathan C. Hall , Hideki (Saito) Ido , Peter Lachner , Gilbert Neiger , Chris J. Newburn , Rajesh S. Parthasarathy , Bret L. Toll , Robert Valentine , Jeffrey G. Wiedemeier
IPC分类号： G06F9/38 , G06F9/30
CPC分类号： G06F9/3861 , G06F9/30036 , G06F9/30043 , G06F9/30145 , G06F9/345
摘要： According to a first aspect, efficient data transfer operations can be achieved by: decoding by a processor device, a single instruction specifying a transfer operation for a plurality of data elements between a first storage location and a second storage location; issuing the single instruction for execution by an execution unit in the processor; detecting an occurrence of an exception during execution of the single instruction; and in response to the exception, delivering pending traps or interrupts to an exception handler prior to delivering the exception.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式