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1. 发明授权

US07380168B2 System development tool 有权
标题翻译：系统开发工具
公开(公告)号：US07380168B2
公开(公告)日：2008-05-27
申请号：US11171762
申请日：2005-06-30
申请人： Makaram Raghunandan , Rajendra S. Yavatkar , Shou C. Chen , Dave Edwards , Geoffrey R. Gustafson
发明人： Makaram Raghunandan , Rajendra S. Yavatkar , Shou C. Chen , Dave Edwards , Geoffrey R. Gustafson
IPC分类号： G06F11/00
CPC分类号： G06F8/20 , G06F11/3636 , G06F11/3664
摘要： According to some embodiments, execution information is received from a first development tool. Execution information is also received from a second development tool. Based on the first execution information and the second execution information, operation of the first development tool may be controlled. According to some embodiments, the first and second development tools are associated with different processor architectures.
摘要翻译：根据一些实施例，从第一开发工具接收执行信息。还从第二个开发工具收到执行信息。基于第一执行信息和第二执行信息，可以控制第一开发工具的操作。根据一些实施例，第一和第二开发工具与不同的处理器架构相关联。

2. 发明授权

US09390031B2 Page coloring to associate memory pages with programs 有权
标题翻译：页面着色以将内存页与程序相关联
公开(公告)号：US09390031B2
公开(公告)日：2016-07-12
申请号：US11323446
申请日：2005-12-30
申请人： David M. Durham , Ravi L. Sahita , Dylan C. Larson , Rajendra S. Yavatkar
发明人： David M. Durham , Ravi L. Sahita , Dylan C. Larson , Rajendra S. Yavatkar
IPC分类号： G06F12/14 , G06F21/74 , G06F21/79
CPC分类号： G06F12/1475 , G06F12/1491 , G06F21/74 , G06F21/79
摘要： Apparatuses and methods for page coloring to associate memory pages with programs are disclosed. In one embodiment, an apparatus includes a paging unit and an interface to access a memory. The paging unit includes translation logic and comparison logic. The translation logic is to translate a first address to a second address. The first address is to be provided by an instruction stored in a first page in the memory. The translation is based on an entry in a data structure, and the entry is to include a base address of a second page in the memory including the second address. The comparison logic is to compare the color of the first page to the color of the second page. The color of the first page is to indicate association of the first page with a first program including the first instruction. The data structure entry is also to include the color of the second page to indicate association of the second page with the first program or a second program.
摘要翻译：公开了用于将内存页与程序相关联的页着色的装置和方法。在一个实施例中，一种装置包括寻呼单元和用于访问存储器的接口。寻呼单元包括翻译逻辑和比较逻辑。翻译逻辑是将第一个地址转换为第二个地址。第一个地址由存储在第一页的指令提供。翻译是基于数据结构中的条目，并且该条目是在包括第二地址的存储器中包括第二页的基地址。比较逻辑是将第一页的颜色与第二页的颜色进行比较。第一页的颜色是指示第一页与包括第一指令的第一程序的关联。数据结构条目还包括第二页的颜色以指示第二页与第一程序或第二程序的关联。

3. 发明申请

US20140310707A1 CROSS-FUNCTION VIRTUALIZATION OF A TELECOM CORE NETWORK 有权
标题翻译：电信核心网络的跨功能虚拟化
公开(公告)号：US20140310707A1
公开(公告)日：2014-10-16
申请号：US14128010
申请日：2013-10-16
申请人： Ashok Sunder Rajan , Richard A. Uhlig , Rajendra S. Yavatkar , Tsung-Yuan C. Tai , Christian Maciocco , Jeffrey R. Jackson , Daniel J. Dahle
发明人： Ashok Sunder Rajan , Richard A. Uhlig , Rajendra S. Yavatkar , Tsung-Yuan C. Tai , Christian Maciocco , Jeffrey R. Jackson , Daniel J. Dahle
IPC分类号： G06F9/455
CPC分类号： G06F9/45533 , G06F9/445 , G06F9/455 , G06F9/45537 , G06F9/5077 , H04L41/00
摘要： In the present disclosure, functions associated with the central office of an evolved packet core network are co-located onto a computer platform or sub-components through virtualized function instances. This reduces and/or eliminates the physical interfaces between equipment and permits functional operation of the evolved packet core to occur at a network edge.
摘要翻译：在本公开中，与演进的分组核心网络的中心局相关联的功能通过虚拟化功能实例共同位于计算机平台或子组件上。这减少和/或消除了设备之间的物理接口，并允许演进分组核心的功能操作发生在网络边缘。

4. 发明申请

US20130339790A1 APPARATUS, SYSTEM AND METHOD FOR A COMMON UNIFIED DEBUG ARCHITECTURE FOR INTEGRATED CIRCUITS AND SoCs 有权
标题翻译：用于集成电路和SoC的通用统一调试架构的装置，系统和方法
公开(公告)号：US20130339790A1
公开(公告)日：2013-12-19
申请号：US13834134
申请日：2013-03-15
申请人： Sankaran M. Menon , Rajendra S. Yavatkar , Eyal Dolev , Sridhar Valluru , Ramana Rachakonda
发明人： Sankaran M. Menon , Rajendra S. Yavatkar , Eyal Dolev , Sridhar Valluru , Ramana Rachakonda
IPC分类号： G06F11/27
CPC分类号： G06F11/27 , G06F11/2733 , G06F11/36 , G06F11/3656
摘要： A system and method for a common unified debug architecture for integrated circuits and System on Chips (SoCs) are provided. A system consistent with the present disclosure may comprise of an integrated circuit or SoC which includes a display port, plurality of logic blocks, and debug logic. The debug logic may receive debug data from one or more of the plurality of logic blocks in response to the integrated circuit or SoC operating in a debug mode. In addition, control logic coupled to the debug logic. The control logic provides display data to the display port in response to the integrated circuit operating in an operational mode. The control logic further directs high-speed debug data to the display port in response to the integrated circuit or SoC operating in the debug mode. The high-speed debug data is to be based on the debug data.
摘要翻译：提供了一种用于集成电路和片上系统（SoC）的通用统一调试架构的系统和方法。与本公开一致的系统可以包括集成电路或SoC，其包括显示端口，多个逻辑块和调试逻辑。响应于以调试模式操作的集成电路或SoC，调试逻辑可以从多个逻辑块中的一个或多个接收调试数据。另外，控制逻辑耦合到调试逻辑。响应于在操作模式下操作的集成电路，控制逻辑向显示端口提供显示数据。响应于在调试模式下操作的集成电路或SoC，控制逻辑还将高速调试数据引导到显示端口。高速调试数据将基于调试数据。

5. 发明授权

US06247061B1 Method and computer program product for scheduling network communication packets originating from different flows having unique service requirements 失效
标题翻译：用于调度源自具有独特服务要求的不同流的网络通信分组的方法和计算机程序产品
公开(公告)号：US06247061B1
公开(公告)日：2001-06-12
申请号：US09094045
申请日：1998-06-09
申请人： John R. Douceur , Yoram Bernet , Ofer Bar , Carol Ann Bell , Tsung-Yuan Charles Tai , Rajendra S. Yavatkar
发明人： John R. Douceur , Yoram Bernet , Ofer Bar , Carol Ann Bell , Tsung-Yuan Charles Tai , Rajendra S. Yavatkar
IPC分类号： G06F1516
CPC分类号： H04L47/32 , H04L47/10 , H04L47/21 , H04L47/215 , H04L47/22 , H04L47/2433 , H04L47/2441 , H04L47/28 , H04L47/50 , H04L47/564 , H04L47/60 , H04L47/621 , H04L47/627
摘要： A method and computer program product for scheduling network communication packets in a multimedia environment where different packet streams have reservations of network bandwidth to form packet flows. The present invention divides the packet scheduling function into distinct components that may be implemented as separate drivers in a layered driver environment as exists, for example, in the Microsoft Windows NT operating system. One component is called a conformer and will generate and assign to each packet in the packet flow at least one conformance time that signifies the earliest a packet may be sent and still conform to the network resource requirements associated with the flow. Many different conformance algorithms can be supported so that the best algorithm is used for a particular packet flow and the service requirements that it represents. Should it be necessary to actually hold a packet until the conformance time is met, a shaper component is used to delay the packets. Finally, a sequencer component will send packets out as fast as possible over the network interface card. Each flow of packets processed by the sequencer component has at least two priorities, one for when the packets are conforming and one for when the packets are non-conforming. The sequencer component maintains priority lists of packet flow queues and will service the highest priority queue list followed by each successive priority list until no packets remain for transmission or the network interface card is unable to handle more packets. Each priority list will have a queue discipline associated therewith that will determine in what order the packets are taken off of the respective flow queues.
摘要翻译：一种用于在多媒体环境中调度网络通信分组的方法和计算机程序产品，其中不同分组流具有网络带宽的预留以形成分组流。本发明将分组调度功能划分为不同的组件，其可以被实现为分层驱动程序环境中的独立驱动程序，例如在Microsoft Windows NT操作系统中。一个组件被称为构图器，并且将生成并分配给分组流中的每个分组至少一个一致的时间，其表示分组可以被发送的最早的一致性，并且仍然符合与流相关联的网络资源需求。可以支持许多不同的一致性算法，以便将最佳算法用于特定数据包流及其所代表的服务要求。如果需要在一致性时间之前实际保存数据包，则会使用整形器来延迟数据包。最后，定序器组件将通过网络接口卡尽快发送数据包。由定序器组件处理的每个流的流具有至少两个优先级，一个用于当数据包一致时，一个用于当数据包不符合时。定序器组件保持分组流队列的优先级列表，并且将服务于优先级最高的队列列表，随后是每个连续的优先级列表，直到没有分组保留用于传输或网络接口卡不能处理更多分组。每个优先级列表将具有与其相关联的队列规则，其将以什么顺序确定分组从相应的流队列中取走。

6. 发明授权

US09632895B2 Apparatus, system and method for a common unified debug architecture for integrated circuits and SoCs 有权
公开(公告)号：US09632895B2
公开(公告)日：2017-04-25
申请号：US13834134
申请日：2013-03-15
申请人： Sankaran M Menon , Rajendra S Yavatkar , Eyal Dolev , Sridhar Valluru , Ramana Rachakonda
发明人： Sankaran M Menon , Rajendra S Yavatkar , Eyal Dolev , Sridhar Valluru , Ramana Rachakonda
IPC分类号： G06F11/00 , G06F11/27 , G06F11/36 , G06F11/273
CPC分类号： G06F11/27 , G06F11/2733 , G06F11/36 , G06F11/3656
摘要： A system and method for a common unified debug architecture for integrated circuits and System on Chips (SoCs) are provided. A system consistent with the present disclosure may comprise of an integrated circuit or SoC which includes a display port, plurality of logic blocks, and debug logic. The debug logic may receive debug data from one or more of the plurality of logic blocks in response to the integrated circuit or SoC operating in a debug mode. In addition, control logic coupled to the debug logic. The control logic provides display data to the display port in response to the integrated circuit operating in an operational mode. The control logic further directs high-speed debug data to the display port in response to the integrated circuit or SoC operating in the debug mode. The high-speed debug data is to be based on the debug data.

7. 发明授权

US08085765B2 Distributed exterior gateway protocol 有权
标题翻译：分布式外部网关协议
公开(公告)号：US08085765B2
公开(公告)日：2011-12-27
申请号：US10713586
申请日：2003-11-13
申请人： Sanjay Bakshi , Rajendra S. Yavatkar
发明人： Sanjay Bakshi , Rajendra S. Yavatkar
IPC分类号： H04L12/28
CPC分类号： H04L45/60 , H04L45/04
摘要： A border gateway has a control card and at least one line card. The control card has a control processor to execute a control portion of an exterior gateway protocol and a routing table of exterior gateway routes and devices. The line card has a line processor to execute an offload portion of an exterior gateway protocol and a communications port to allow termination of at least one communication link. A backplane allows the control card and the line card to communicate.
摘要翻译：边界网关具有控制卡和至少一个线路卡。控制卡具有控制处理器，用于执行外部网关协议的控制部分和外部网关路由和设备的路由表。线卡具有行处理器以执行外部网关协议的卸载部分和通信端口以允许终止至少一个通信链路。背板允许控制卡和线卡进行通信。

8. 发明授权

US07177323B2 Ensuring quality of service (QOS) for a multi-media calls through call associated individual media stream bandwidth control 失效
标题翻译：通过呼叫关联的单独媒体流带宽控制确保多媒体呼叫的服务质量（QOS）
公开(公告)号：US07177323B2
公开(公告)日：2007-02-13
申请号：US09041979
申请日：1998-03-13
申请人： Rajendra S. Yavatkar , James E. Toga
发明人： Rajendra S. Yavatkar , James E. Toga
IPC分类号： H04L12/16 , H00J3/16
CPC分类号： H04L65/80 , H04L29/06027
摘要： A multi-media call application is disclosed. The application guarantees quality of service (QOS) for a packet based multi-media call (CALL). The guaranty is effectuated through call associated individual media stream bandwidth control.
摘要翻译：公开了一种多媒体呼叫应用。该应用程序保证基于分组的多媒体呼叫（CALL）的服务质量（QOS）。通过呼叫关联的单独媒体流带宽控制实现保证。

9. 发明授权

US06804717B1 Providing quality of service by transmitting XML files indicating requested resources 有权
标题翻译：通过发送指示所请求资源的XML文件来提供服务质量
公开(公告)号：US06804717B1
公开(公告)日：2004-10-12
申请号：US09539232
申请日：2000-03-30
申请人： Sanjay Bakshi , Rajendra S. Yavatkar
发明人： Sanjay Bakshi , Rajendra S. Yavatkar
IPC分类号： G06F1516
CPC分类号： H04L65/80 , H04L29/06 , H04L29/06027 , H04L47/2441 , H04L47/70 , H04L47/724 , H04L47/801 , H04L47/806
摘要： Providing quality of service includes reserving resources to transmit data from a source location to a destination location and transmitting the data from the source location to the destination location using the reserved resources and based on characteristics of the data and of the destination location.
摘要翻译：提供服务质量包括预留资源以将数据从源位置传输到目的地位置，并且使用所保留的资源并且基于数据和目的地位置的特征，将数据从源位置发送到目的地位置。

10. 发明授权

US06973488B1 Providing policy information to a remote device 失效
标题翻译：向远程设备提供策略信息
公开(公告)号：US06973488B1
公开(公告)日：2005-12-06
申请号：US09539916
申请日：2000-03-31
申请人： Rajendra S. Yavatkar , David M. Durham , Russell J. Fenger
发明人： Rajendra S. Yavatkar , David M. Durham , Russell J. Fenger
IPC分类号： G06F15/16 , H04L29/06 , H04L29/08
CPC分类号： H04L67/22 , H04L63/0263 , H04L69/08
摘要： Policy information is distributed to remote network devices by mapping high-level policy information into low-level configuration information and distributing the low-level configuration information to the remote network devices.
摘要翻译：将高级策略信息映射为低级配置信息，并将低级配置信息分发到远程网络设备，将策略信息分配给远程网络设备。

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