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1. 发明授权

US06951765B1 Method and apparatus for introduction of solid precursors and reactants into a supercritical fluid reactor 失效
标题翻译：将固体前体和反应物引入超临界流体反应器的方法和装置
公开(公告)号：US06951765B1
公开(公告)日：2005-10-04
申请号：US10016017
申请日：2001-12-12
申请人： Sanjay Gopinath , Patrick A. Van Cleemput , Michelle Schulberg , Sasangan Ramanathan , Francisco Juarez , Patrick Joyce
发明人： Sanjay Gopinath , Patrick A. Van Cleemput , Michelle Schulberg , Sasangan Ramanathan , Francisco Juarez , Patrick Joyce
IPC分类号： B08B13/00 , C23C18/16 , C25D5/00
CPC分类号： C23C18/1685 , C23C18/1678 , C25D5/003 , C25D17/02 , C25D21/18
摘要： The present invention pertains to apparatus and methods for introduction of solid precursors and reactants into a supercritical fluid reactor. Solids are dissolved in supercritical fluid solvents in generator apparatus separate from the supercritical fluid reactor. Such apparatus preferably generate saturated solutions of solid precursors via recirculation of supercritical fluids through a vessel containing the solid precursors. Supercritical solutions of the solids are introduced into the reactor, which itself is charged with a supercritical fluid. Supercritical conditions are maintained during the delivery of the dissolved precursor to the reactor. Recirculation of supercritical precursor solutions through the reactor may or may not be implemented in methods of the invention. Methods of the invention are particularly well suited for integrated circuit fabrication, where films are deposited on wafers under supercritical conditions.
摘要翻译：本发明涉及将固体前体和反应物引入超临界流体反应器的装置和方法。固体溶解在与超临界流体反应器分离的发生器装置中的超临界流体溶剂中。这种装置优选地通过超临界流体再循环通过含有固体前体的容器来产生固体前体的饱和溶液。将固体的超临界溶液引入反应器，反应器本身装有超临界流体。在将溶解的前体输送到反应器期间，保持超临界条件。通过反应器的超临界前体溶液的再循环可以或可以不在本发明的方法中实施。本发明的方法特别适用于集成电路制造，其中膜在超临界条件下沉积在晶片上。

2. 发明授权

US6015759A Surface modification of semiconductors using electromagnetic radiation 失效
标题翻译：使用电磁辐射对半导体的表面改性
公开(公告)号：US6015759A
公开(公告)日：2000-01-18
申请号：US986916
申请日：1997-12-08
申请人： Ashraf R. Khan , Sasangan Ramanathan , Giovanni Antonio Foggiato
发明人： Ashraf R. Khan , Sasangan Ramanathan , Giovanni Antonio Foggiato
IPC分类号： H01L21/76 , C23C16/02 , H01L21/304 , H01L21/31 , H01L21/316 , H01L21/762 , H01L21/768 , H01L21/00
CPC分类号： H01L21/02164 , C23C16/0236 , H01L21/02271 , H01L21/0231 , H01L21/31612 , H01L21/76232 , H01L21/31625 , H01L21/31662
摘要： Deposition rates of undoped silicate glass dielectric layers on thermal oxide are increased by pre-treating the thermal oxide layer with electromagnetic radiation in the ultraviolet (UV) and/or vacuum ultraviolet (VUV) wavelengths. The surface smoothness of the resulting films are also increased by pre-treating films with UV and/or VUV radiation. Furthermore, the gap filling abilities of the undoped silicate glass films are increased by pre-treating the thermal oxide with UV and/or VUV radiation. New equipment and methods are presented for exposing semiconductor devices to UV and/or VUV radiation, and for enhancing the deposition rates and film quality for semiconductor manufacture. Semiconductor devices incorporating the new methods are also described.
摘要翻译：通过在紫外（UV）和/或真空紫外（VUV）波长中的电磁辐射预处理热氧化物层，增加了热氧化物上未掺杂的硅酸盐玻璃介电层的沉积速率。通过用UV和/或VUV辐射预处理膜，所得膜的表面光滑度也增加。此外，通过用UV和/或VUV辐射预处理热氧化物来增加未掺杂的硅酸盐玻璃膜的间隙填充能力。提出了用于将半导体器件暴露于UV和/或VUV辐射的新设备和方法，并且用于提高用于半导体制造的沉积速率和膜质量。还描述了结合新方法的半导体器件。

3. 发明申请

US20050016956A1 Methods and apparatus for cycle time improvements for atomic layer deposition 审中-公开
标题翻译：用于原子层沉积的循环时间改进的方法和装置
公开(公告)号：US20050016956A1
公开(公告)日：2005-01-27
申请号：US10791030
申请日：2004-03-01
申请人： Xinye Liu , Thomas Seidel , Edward Lee , Ken Doering , Sasangan Ramanathan
发明人： Xinye Liu , Thomas Seidel , Edward Lee , Ken Doering , Sasangan Ramanathan
IPC分类号： C23C16/44 , C23C16/455 , C23F1/00 , C30B25/14
CPC分类号： C30B25/14 , C23C16/4412 , C23C16/45527 , C23C16/45544 , C23C16/45557
摘要： Different periods of an ALD cycle are performed using different purge flows and, in some cases, different pumping capacities, while maintaining the reactor chamber at a nominally constant pressure. The purge flows may, in some cases, utilize different gasses and/or may be provided through different flow paths. These operations provide for ALD cycle time improvements and economical operation with respect to consumables usage. In some embodiments the use of an annular throttle valve provides a means for controlling downstream flow limiting conductances in a gas flow path from the reactor chamber.
摘要翻译：不同的ALD循环周期使用不同的吹扫流程，并且在一些情况下，不同的泵送能力，同时将反应器室保持在标称恒定的压力下进行。在一些情况下，吹扫流可以利用不同的气体和/或可以通过不同的流动路径提供。这些操作提供ALD循环时间改进和耗材使用的经济运行。在一些实施例中，环形节流阀的使用提供了用于控制来自反应器室的气体流动路径中的下游流动限制电导的装置。

4. 发明授权

US07981473B2 Transient enhanced atomic layer deposition 有权
标题翻译：瞬态增强原子层沉积
公开(公告)号：US07981473B2
公开(公告)日：2011-07-19
申请号：US10791334
申请日：2004-03-01
申请人： Gi Youl Kim , Anuranjan Srivastava , Thomas E. Seidel , Ana R. Londergan , Sasangan Ramanathan
发明人： Gi Youl Kim , Anuranjan Srivastava , Thomas E. Seidel , Ana R. Londergan , Sasangan Ramanathan
IPC分类号： C23C16/00
CPC分类号： C23C16/45525 , C23C16/45527
摘要： A process in which a wafer is exposed to a first chemically reactive precursor dose insufficient to result in a maximum saturated ALD deposition rate on the wafer, and then to a second chemically reactive precursor dose, the precursors being distributed in a manner so as to provide substantially uniform film deposition. The second chemically reactive precursor dose may likewise be insufficient to result in a maximum saturated ALD deposition rate on the wafer or, alternatively, sufficient to result in a starved saturating deposition on the wafer. The process may or may not include purges between the precursor exposures, or between one set of exposures and not another.
摘要翻译：其中晶片暴露于第一化学反应性前体剂量的过程不足以导致晶片上的最大饱和ALD沉积速率，然后到达第二化学反应前体剂量，所述前体以如下方式分布：基本均匀的膜沉积。第二化学反应前体剂量同样可能不足以导致晶片上的最大饱和ALD沉积速率，或者替代地，足以导致晶片上的饱和饱和沉积。该过程可以包括或可以不包括在前体曝光之间或在一组曝光之间的清洗，而不是另一组。

5. 发明申请

US20080131601A1 Transient enhanced atomic layer deposition 有权
标题翻译：瞬态增强原子层沉积
公开(公告)号：US20080131601A1
公开(公告)日：2008-06-05
申请号：US10791334
申请日：2004-03-01
申请人： Gi Youl Kim , Anuranjan Srivastava , Thomas E. Seidel , Ana R. Londergan , Sasangan Ramanathan
发明人： Gi Youl Kim , Anuranjan Srivastava , Thomas E. Seidel , Ana R. Londergan , Sasangan Ramanathan
IPC分类号： C23C16/00
CPC分类号： C23C16/45525 , C23C16/45527
摘要： A process in which a wafer is exposed to a first chemically reactive precursor dose insufficient to result in a maximum saturated ALD deposition rate on the wafer, and then to a second chemically reactive precursor dose, the precursors being distributed in a manner so as to provide substantially uniform film deposition. The second chemically reactive precursor dose may likewise be insufficient to result in a maximum saturated ALD deposition rate on the wafer or, alternatively, sufficient to result in a starved saturating deposition on the wafer. The process may or may not include purges between the precursor exposures, or between one set of exposures and not another.
摘要翻译：其中晶片暴露于第一化学反应性前体剂量的过程不足以导致晶片上的最大饱和ALD沉积速率，然后到达第二化学反应前体剂量，所述前体以如下方式分布：基本均匀的膜沉积。第二化学反应前体剂量同样可能不足以导致晶片上的最大饱和ALD沉积速率，或者替代地，足以导致晶片上的饱和饱和沉积。该过程可以包括或可以不包括在前体曝光之间或在一组曝光之间的清洗，而不是另一组。

6. 发明申请

US20060137609A1 Multi-single wafer processing apparatus 审中-公开
标题翻译：多单晶圆处理装置
公开(公告)号：US20060137609A1
公开(公告)日：2006-06-29
申请号：US11224767
申请日：2005-09-12
申请人： Jerzy Puchacz , Sasangan Ramanathan , Manolito Reyes , Thomas Seidel
发明人： Jerzy Puchacz , Sasangan Ramanathan , Manolito Reyes , Thomas Seidel
IPC分类号： C23C16/00
CPC分类号： H01L21/67167 , H01L21/6719
摘要： A wafer processing apparatus includes one or more processing modules, each having multiple, distinct, single-wafer processing reactors configured for semi-independent ALD and/or CVD film deposition therein; a robotic central wafer handler configured to provide wafers to and accept wafers from each of said wafer processing modules; and a single-wafer loading and unloading mechanism that includes a loading and unloading port and a mini-environment coupling the loading and unloading port to the robotic central wafer handler. The wafer processing reactors may be arranged (i) along axes of a Cartesian coordinate system, or (ii) in quadrants defined by said axes, one axis being parallel to a wafer input plane of the at least one of the process modules to which the single-wafer processing reactors belong. Each processing module can include up to four single-wafer processing reactors, each with an independent gas distribution module.
摘要翻译：晶片处理装置包括一个或多个处理模块，每个处理模块具有多个，不同的单晶片处理反应器，其被配置用于半独立的ALD和/或CVD膜沉积; 机器人中央晶片处理器，被配置为向每个所述晶片处理模块提供晶片并接受晶片; 以及单晶片加载和卸载机构，其包括装载和卸载端口以及将加载和卸载端口耦合到机器人中央晶片处理器的小型环境。晶圆处理反应器可以沿着笛卡尔坐标系的轴线布置，或者（ii）在由所述轴限定的象限中，一个轴平行于至少一个工艺模块的晶片输入平面，单晶圆加工反应堆属于每个处理模块可以包括多达四个单晶圆处理反应器，每个具有独立的气体分配模块。

7. 发明授权

US06720259B2 Passivation method for improved uniformity and repeatability for atomic layer deposition and chemical vapor deposition 失效
标题翻译：用于改善原子层沉积和化学气相沉积的均匀性和重复性的钝化方法
公开(公告)号：US06720259B2
公开(公告)日：2004-04-13
申请号：US10262992
申请日：2002-10-02
申请人： Ana R. Londergan , Sasangan Ramanathan , Jereld Winkler , Thomas E. Seidel
发明人： Ana R. Londergan , Sasangan Ramanathan , Jereld Winkler , Thomas E. Seidel
IPC分类号： H01L2131
CPC分类号： H01L21/02189 , C23C16/4404 , H01L21/02175 , H01L21/3141 , H01L21/31641 , H01L21/31645
摘要： A method to deposit a passivating layer of a first material on an interior reactor surface of a cold or warm wall reactor, in which the first material is non-reactive with one or more precursor used to form a second materials. Subsequently when a film layer is deposited on a substrate by subjecting the substrate to the one or more precursors, in which at least one precursor has a low vapor pressure, uniformity and repeatability is improved by the passivation layer.
摘要翻译：一种将第一材料的钝化层沉积在冷或温壁反应器的内部反应器表面上的方法，其中第一材料与用于形成第二材料的一种或多种前体不反应。随后当通过使衬底经受一种或多种前体（其中至少一种前体具有低蒸气压）将膜层沉积在衬底上时，通过钝化层改善了均匀性和重复性。

8. 发明授权

US06887781B2 Method for the formation of diffusion barrier 有权
标题翻译：形成扩散屏障的方法
公开(公告)号：US06887781B2
公开(公告)日：2005-05-03
申请号：US10425306
申请日：2003-04-29
申请人： Sang-Hyeob Lee , Sasangan Ramanathan
发明人： Sang-Hyeob Lee , Sasangan Ramanathan
IPC分类号： H01L21/285 , H01L21/768 , H01L21/44 , H01L21/4763
CPC分类号： H01L21/76846 , H01L21/28562 , H01L21/76856 , H01L21/76889
摘要： Electronic components such as semiconductor wafer VLSI and ULSI integrated circuit devices are provided having a robust barrier layer in the device interconnects. The robust barrier layer provides excellent step coverage, low resistance and enhanced adhesion to CVD copper and the interconnect has a double structure of a layer of a barrier material and a metal layer thereon. The metal layer is preferably tungsten and is formed by replacing silicon or other such atoms on the surface of the barrier layer with tungsten metal. A layer of silicon can be formed on the barrier layer, silicon atoms can be formed on the surface by reacting the barrier layer with a silicon containing reactant or a silicon containing barrier layer can be used.
摘要翻译：提供诸如半导体晶片VLSI和ULSI集成电路器件的电子部件，其在器件互连中具有坚固的阻挡层。坚固的阻挡层提供优异的台阶覆盖率，低电阻和增强对CVD铜的粘附性，并且互连具有阻挡材料层和金属层上的双重结构。金属层优选为钨，并且通过用钨金属替代阻挡层表面上的硅或其它此类原子而形成。可以在阻挡层上形成硅层，通过使阻挡层与含硅反应物反应或可以使用含硅阻挡层，可以在表面上形成硅原子。

9. 发明授权

US06589887B1 Forming metal-derived layers by simultaneous deposition and evaporation of metal 有权
标题翻译：通过金属的同时沉积和蒸发形成金属衍生层
公开(公告)号：US06589887B1
公开(公告)日：2003-07-08
申请号：US09975612
申请日：2001-10-11
申请人： Jeremie Dalton , Ronald A. Powell , Sridhar K. Kailasam , Sasangan Ramanathan
发明人： Jeremie Dalton , Ronald A. Powell , Sridhar K. Kailasam , Sasangan Ramanathan
IPC分类号： H01L214763
CPC分类号： H01L21/76844 , C23C14/04 , C23C14/18 , H01L21/2855 , H01L21/76801 , H01L21/76807 , H01L21/76813 , H01L21/76814 , H01L21/76831 , H01L21/76865 , H01L23/53238 , H01L23/5329 , H01L2924/0002 , H01L2924/00
摘要： The present invention pertains to methods for forming metal-derived layers on substrates. Preferred methods apply to integrated circuit fabrication. In particular, selective methods may be used to form diffusion barriers on partially fabricated integrated circuits. In one preferred method, a wafer is heated and exposed to a metal vapor. Under specific conditions, the metal vapor reacts with dielectric surfaces to form a diffusion barrier, but does not react with metal surfaces. Thus, methods of the invention form diffusion barriers that selectively protect dielectric surfaces but leave metal surfaces free of diffusion barrier.
摘要翻译：本发明涉及在基材上形成金属衍生层的方法。优选的方法适用于集成电路制造。特别地，可以使用选择性方法在部分制造的集成电路上形成扩散阻挡层。在一个优选的方法中，将晶片加热并暴露于金属蒸气。在特定条件下，金属蒸汽与电介质表面反应形成扩散阻挡层，但不与金属表面反应。因此，本发明的方法形成了选择性地保护电介质表面但留下没有扩散阻挡层的金属表面的扩散阻挡层。

10. 发明授权

US6071555A Ferroelectric thin film composites made by metalorganic decomposition 有权
标题翻译：铁电薄膜复合材料由金属有机物分解制成
公开(公告)号：US6071555A
公开(公告)日：2000-06-06
申请号：US192619
申请日：1998-11-05
申请人： Somnath Sengupta , Steven Stowell , Louise Sengupta , Pooran C. Joshi , Sasangan Ramanathan , Seshu B. Desu
发明人： Somnath Sengupta , Steven Stowell , Louise Sengupta , Pooran C. Joshi , Sasangan Ramanathan , Seshu B. Desu
IPC分类号： C04B35/468 , C04B35/47 , C04B35/622 , C04B41/50 , C23C18/12 , H01L21/314 , H01L21/316 , B05D3/02 , B05D3/12
CPC分类号： C23C18/1216 , C04B35/468 , C04B35/47 , C04B35/62222 , C04B41/009 , C04B41/5041 , H01L21/31691
摘要： Thin films of ferroelectric composite material comprising barium strontium titanate (BSTO) combined with magnesium oxide additive are produced by metalorganic decomposition. The barium strontium titanate magnesium oxide ferroelectric composite comprises Ba.sub.1-x Sr.sub.x TiO.sub.3 /MgO, wherein x is greater than 0.0 but less than or equal to 0.75 and preferably is 0.4, and wherein the weight ratio of BSTO to magnesium oxide may range from 99 to 40 weight percent BSTO to 1 to 60 weight percent magnesium oxide. These films have desirable electronic properties and may have application to both active microwave and dynamic random access memory devices, including low dielectric constant, low loss factor, high tunability, and high resistivity. The films produced are uniformly thick and impurity free, with thicknesses of only 0.4 microns.
摘要翻译：通过金属有机物分解制造包含钛酸锶钡（BSTO）与氧化镁添加剂组合的铁电复合材料薄膜。钛酸钡锶氧化镁铁电体复合体包括Ba1-xSrxTiO3 / MgO，其中x大于0.0但小于或等于0.75，优选为0.4，并且其中BSTO与氧化镁的重量比可为99至40重量％百分比BSTO至1至60重量％的氧化镁。这些膜具有期望的电子性质，并且可以应用于有源微波和动态随机存取存储器件，包括低介电常数，低损耗因子，高可调性和高电阻率。所生产的薄膜均匀厚，无杂质，厚度仅为0.4微米。

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