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1. 发明授权

US09809881B2 Method and apparatus for multizone plasma generation 有权
公开(公告)号：US09809881B2
公开(公告)日：2017-11-07
申请号：US13192870
申请日：2011-07-28
申请人： Matthew Scott Rogers , Zhong Qiang Hua , Christopher S. Olsen
发明人： Matthew Scott Rogers , Zhong Qiang Hua , Christopher S. Olsen
IPC分类号： C23C16/455 , C23C16/46 , C23C16/505 , C23C16/513 , C23C16/458 , C23C16/48 , C23C16/517 , H01J37/32
CPC分类号： C23C16/513 , C23C16/45565 , C23C16/4584 , C23C16/481 , C23C16/505 , C23C16/517 , H01J37/321 , H01J37/32357 , H01J37/3244
摘要： Embodiments of the present invention provide a method and apparatus for plasma processing a substrate to form a film on the substrate and devices disposed thereon by controlling the ratio of ions to radicals in the plasma at a given pressure. A given pressure may be maintained to promote ion production using one plasma source, and a second plasma source may be used to provide additional radicals. In one embodiment, a low pressure plasma is generated in a processing region having the substrate positioned therein, and a high pressure plasma is generated in separate region. Radicals from the high pressure plasma are injected into the processing region having the low pressure plasma, thus, altering the natural distribution of radicals to ions at a given operating pressure. The resulting process and apparatus enables tailoring of the ion to radical ratio to allow better control of forming films on high aspect ratio features, and thus improve corner rounding, conformality of sidewall to bottom trench growth, and selective growth.

2. 发明授权

US08404583B2 Conformality of oxide layers along sidewalls of deep vias 有权
标题翻译：深层通孔侧壁氧化层的一致性
公开(公告)号：US08404583B2
公开(公告)日：2013-03-26
申请号：US13035034
申请日：2011-02-25
申请人： Zhong Qiang Hua , Manuel A. Hernandez , Lei Luo , Kedar Sapre
发明人： Zhong Qiang Hua , Manuel A. Hernandez , Lei Luo , Kedar Sapre
IPC分类号： H01L21/44 , H01L21/31 , H01L21/469
CPC分类号： H01L21/76898
摘要： A method for improving conformality of oxide layers along sidewalls of vias in semiconductor substrates includes forming a nitride layer over an upper surface of a semiconductor substrate and forming a via extending through the nitride layer and into the semiconductor substrate. The via may have a depth of at least about 50 μm from a top surface of the nitride layer and an opening of less than about 10 μm at the top surface of the nitride layer. The method also includes forming an oxide layer over the nitride layer and along sidewalls and bottom of the via. The oxide layer may be formed using a thermal chemical vapor deposition (CVD) process at a temperature of less than about 450° C., where a thickness of the oxide layer at the bottom of the via is at least about 50% of a thickness of the oxide layer at the top surface of the nitride layer.
摘要翻译：在半导体衬底中的通孔侧壁改善氧化物层的保形性的方法包括在半导体衬底的上表面上形成氮化物层，并形成延伸穿过氮化物层并进入半导体衬底的通孔。通孔可以具有距离氮化物层的顶表面至少约50μm的深度和在氮化物层的顶表面处的小于约10μm的开口。该方法还包括在氮化物层上并沿着通孔的侧壁和底部形成氧化物层。可以在小于约450℃的温度下使用热化学气相沉积（CVD）工艺形成氧化物层，其中通孔底部的氧化物层的厚度为厚度的至少约50％在氮化物层的顶表面处的氧化物层。

3. 发明申请

US20120015113A1 METHODS FOR FORMING LOW STRESS DIELECTRIC FILMS 审中-公开
标题翻译：形成低应力电介质膜的方法
公开(公告)号：US20120015113A1
公开(公告)日：2012-01-19
申请号：US12835574
申请日：2010-07-13
申请人： Zhong Qiang Hua , Lei Luo , Manuel A. Hernandez , Shankar Venkataraman
发明人： Zhong Qiang Hua , Lei Luo , Manuel A. Hernandez , Shankar Venkataraman
IPC分类号： C23C16/513
CPC分类号： C23C16/513 , C23C16/401 , C23C16/44
摘要： A method for forming a multi-layer silicon oxide film on a substrate includes performing a deposition cycle that comprises depositing a silicon oxide layer using a thermal chemical vapor deposition (CVD) process and depositing a silicon oxide layer using a plasma enhanced chemical vapor deposition (PECVD) process. The deposition cycle is repeated a specified number of times to form the multi-layer silicon oxide film comprising a plurality of silicon oxide layers formed using the thermal CVD process and a plurality of silicon oxide layers formed using the PECVD process. Each silicon oxide layer formed using the thermal CVD process is adjacent to at least one silicon oxide layer formed using the PECVD process.
摘要翻译：在衬底上形成多层氧化硅膜的方法包括执行沉积循环，其包括使用热化学气相沉积（CVD）工艺沉积氧化硅层，并使用等离子体增强化学气相沉积法沉积氧化硅层（ PECVD）过程。沉积循环重复规定次数以形成包含使用热CVD工艺形成的多个氧化硅层和使用PECVD工艺形成的多个氧化硅层的多层氧化硅膜。使用热CVD工艺形成的每个氧化硅层与使用PECVD工艺形成的至少一个氧化硅层相邻。

4. 发明申请

US20110223760A1 CONFORMALITY OF OXIDE LAYERS ALONG SIDEWALLS OF DEEP VIAS 有权
标题翻译：深层六角形氧化层的一致性
公开(公告)号：US20110223760A1
公开(公告)日：2011-09-15
申请号：US13035034
申请日：2011-02-25
申请人： Zhong Qiang Hua , Manuel A. Hernandez , Lei Luo , Kedar Sapre
发明人： Zhong Qiang Hua , Manuel A. Hernandez , Lei Luo , Kedar Sapre
IPC分类号： H01L21/768
CPC分类号： H01L21/76898
摘要： A method for improving conformality of oxide layers along sidewalls of vias in semiconductor substrates includes forming a nitride layer over an upper surface of a semiconductor substrate and forming a via extending through the nitride layer and into the semiconductor substrate. The via may have a depth of at least about 50 μm from a top surface of the nitride layer and an opening of less than about 10 μm at the top surface of the nitride layer. The method also includes forming an oxide layer over the nitride layer and along sidewalls and bottom of the via. The oxide layer may be formed using a thermal chemical vapor deposition (CVD) process at a temperature of less than about 450° C., where a thickness of the oxide layer at the bottom of the via is at least about 50% of a thickness of the oxide layer at the top surface of the nitride layer.
摘要翻译：在半导体衬底中的通孔侧壁改善氧化物层的保形性的方法包括在半导体衬底的上表面上形成氮化物层，并形成延伸穿过氮化物层并进入半导体衬底的通孔。通孔可以具有距离氮化物层的顶表面至少约50μm的深度和在氮化物层的顶表面处的小于约10μm的开口。该方法还包括在氮化物层上并沿着通孔的侧壁和底部形成氧化物层。可以在小于约450℃的温度下使用热化学气相沉积（CVD）工艺形成氧化物层，其中通孔底部的氧化物层的厚度为厚度的至少约50％在氮化物层的顶表面处的氧化物层。

5. 发明授权

US07789993B2 Internal balanced coil for inductively coupled high density plasma processing chamber 有权
标题翻译：用于电感耦合高密度等离子体处理室的内部平衡线圈
公开(公告)号：US07789993B2
公开(公告)日：2010-09-07
申请号：US11670662
申请日：2007-02-02
申请人： Robert Chen , Canfeng Lai , Xinglong Chen , Weiyi Luo , Zhong Qiang Hua , Siqing Lu , Muhammad Rasheed , Qiwei Liang , Dmitry Lubomirsky , Ellie Y. Yieh
发明人： Robert Chen , Canfeng Lai , Xinglong Chen , Weiyi Luo , Zhong Qiang Hua , Siqing Lu , Muhammad Rasheed , Qiwei Liang , Dmitry Lubomirsky , Ellie Y. Yieh
IPC分类号： C23C16/00 , H01L21/306
CPC分类号： H01J37/321
摘要： A coil is provided for use in a semiconductor processing system to generate a plasma with a magnetic field in a chamber. The coil comprises a first coil segment, a second coil segment and an internal balance capacitor. The first coils segment has a first end and a second end. The first end of the coil segment is adapted to connect to a power source. The second coil segment has a first and second end. The second end of the first coil segment is adapted to connect to an external balance capacitor. The internal balance capacitor is connected in series between the second end of the first coil segment and the first end of the second coil segment. The internal balance capacitor and the coil segments are adapted to provide a voltage peak along the first coil segment substantially aligned with a virtual ground along the second coil segment.
摘要翻译：提供一种用于半导体处理系统中的线圈以在腔室中产生具有磁场的等离子体。线圈包括第一线圈段，第二线圈段和内部平衡电容器。第一线圈段具有第一端和第二端。线圈段的第一端适于连接到电源。第二线圈段具有第一和第二端。第一线圈段的第二端适于连接到外部平衡电容器。内部平衡电容器串联连接在第一线圈段的第二端和第二线圈段的第一端之间。内部平衡电容器和线圈段适于沿着第一线圈段提供基本上与第二线圈段的虚拟接地对准的电压峰值。

6. 发明申请

US20080188090A1 INTERNAL BALANCED COIL FOR INDUCTIVELY COUPLED HIGH DENSITY PLASMA PROCESSING CHAMBER 审中-公开
公开(公告)号：US20080188090A1
公开(公告)日：2008-08-07
申请号：US11670701
申请日：2007-02-02
申请人： Robert Chen , Canfeng Lai , Xinglong Chen , Weiyi Luo , Zhong Qiang Hua , Siqing Lu , Muhammad Rasheed , Qiwei Liang , Dmitry Lubomirsky , Ellie Y. Yieh
发明人： Robert Chen , Canfeng Lai , Xinglong Chen , Weiyi Luo , Zhong Qiang Hua , Siqing Lu , Muhammad Rasheed , Qiwei Liang , Dmitry Lubomirsky , Ellie Y. Yieh
IPC分类号： H01L21/31 , C23C16/452
CPC分类号： C23C16/507 , H01J37/321
摘要： A coil is provided for use in a semiconductor processing system to generate a plasma with a magnetic field in a chamber. The coil comprises a first coil segment, a second coil segment and an internal balance capacitor. The first coils segment has a first end and a second end. The first end of the coil segment is adapted to connect to a power source. The second coil segment has a first and second end. The second end of the first coil segment is adapted to connect to an external balance capacitor. The internal balance capacitor is connected in series between the second end of the first coil segment and the first end of the second coil segment. The internal balance capacitor and the coil segments are adapted to provide a voltage peak along the first coil segment substantially aligned with a virtual ground along the second coil segment.

7. 发明授权

US07064077B2 Method for high aspect ratio HDP CVD gapfill 失效
标题翻译：高宽比HDP CVD填隙方法
公开(公告)号：US07064077B2
公开(公告)日：2006-06-20
申请号：US10956469
申请日：2004-10-01
申请人： Zhong Qiang Hua , Dong Qing Li , Zhengquan Tan , Zhuang Li , Michael Chiu Kwan , Bruno Geoffrion , Padmanabhan Krishnaraj
发明人： Zhong Qiang Hua , Dong Qing Li , Zhengquan Tan , Zhuang Li , Michael Chiu Kwan , Bruno Geoffrion , Padmanabhan Krishnaraj
IPC分类号： H01L21/302
CPC分类号： H01L21/02164 , C23C16/045 , C23C16/401 , C23C16/402 , C23C16/507 , H01L21/02211 , H01L21/02274 , H01L21/31612 , H01L21/76229
摘要： A method of depositing a high density plasma silicon oxide layer having improved gapfill capabilities. In one embodiment the method includes flowing a process gas consisting of a silicon-containing source, an oxygen-containing source and helium into a substrate processing chamber and forming a plasma from the process gas. The ratio of the flow rate of the helium with respect to the combined flow rate of the silicon source and oxygen source is between 0.5:1 and 3.0:1 inclusive. In one particular embodiment, the process gas consists of monosilane (SiH4), molecular oxygen (O2) and helium.
摘要翻译：一种沉积具有改进的间隙填充能力的高密度等离子体氧化硅层的方法。在一个实施例中，该方法包括将由含硅源，含氧源和氦组成的工艺气体流入衬底处理室并从工艺气体形成等离子体。氦流量相对于硅源和氧源的组合流量的比率在0.5:1和3.0:1之间。在一个具体实施方案中，工艺气体由单硅烷（SiH 4 S 4），分子氧（O 2 O 2）和氦组成。

8. 发明授权

US07572647B2 Internal balanced coil for inductively coupled high density plasma processing chamber 有权
标题翻译：用于电感耦合高密度等离子体处理室的内部平衡线圈
公开(公告)号：US07572647B2
公开(公告)日：2009-08-11
申请号：US11670728
申请日：2007-02-02
申请人： Robert Chen , Canfeng Lai , Xinglong Chen , Weiyi Luo , Zhong Qiang Hua , Siqing Lu , Muhammad Rasheed , Qiwei Liang , Dmitry Lubomirsky , Ellie Y. Yieh
发明人： Robert Chen , Canfeng Lai , Xinglong Chen , Weiyi Luo , Zhong Qiang Hua , Siqing Lu , Muhammad Rasheed , Qiwei Liang , Dmitry Lubomirsky , Ellie Y. Yieh
IPC分类号： H01L21/00
CPC分类号： C23C16/507 , H01J37/321 , H01J37/32174 , H01L21/02164 , H01L21/02274 , H01L21/31604 , H01L21/31608
摘要： A coil is provided for use in a semiconductor processing system to generate a plasma with a magnetic field in a chamber. The coil comprises a first coil segment, a second coil segment and an internal balance capacitor. The first coils segment has a first end and a second end. The first end of the coil segment is adapted to connect to a power source. The second coil segment has a first and second end. The second end of the first coil segment is adapted to connect to an external balance capacitor. The internal balance capacitor is connected in series between the second end of the first coil segment and the first end of the second coil segment. The internal balance capacitor and the coil segments are adapted to provide a voltage peak along the first coil segment substantially aligned with a virtual ground along the second coil segment.
摘要翻译：提供一种用于半导体处理系统中的线圈以在腔室中产生具有磁场的等离子体。线圈包括第一线圈段，第二线圈段和内部平衡电容器。第一线圈段具有第一端和第二端。线圈段的第一端适于连接到电源。第二线圈段具有第一和第二端。第一线圈段的第二端适于连接到外部平衡电容器。内部平衡电容器串联连接在第一线圈段的第二端和第二线圈段的第一端之间。内部平衡电容器和线圈段适于沿着第一线圈段提供基本上与第二线圈段的虚拟接地对准的电压峰值。

9. 发明申请

US20080142483A1 MULTI-STEP DEP-ETCH-DEP HIGH DENSITY PLASMA CHEMICAL VAPOR DEPOSITION PROCESSES FOR DIELECTRIC GAPFILLS 审中-公开
标题翻译：多级DEP-ETCH-DEP高密度等离子体化学气相沉积工艺用于电介质
公开(公告)号：US20080142483A1
公开(公告)日：2008-06-19
申请号：US11947619
申请日：2007-11-29
申请人： Zhong Qiang Hua , Rionard Purnawan , Jason Thomas Bloking , Anchuan Wang , Young S. Lee , Ellie Y. Yieh
发明人： Zhong Qiang Hua , Rionard Purnawan , Jason Thomas Bloking , Anchuan Wang , Young S. Lee , Ellie Y. Yieh
IPC分类号： B44C1/22
CPC分类号： C23C16/401 , C23C16/045 , H01L21/02164 , H01L21/02274 , H01L21/31111 , H01L21/3145 , H01L21/31612
摘要： A method of forming a dielectric material in a substrate gap using a high-density plasma is described. The method may include depositing a first portion of the dielectric material into the gap with the high-density plasma. The deposition may form a protruding structure that at least partially blocks the deposition of the dielectric material into the gap. The first portion of dielectric material is exposed to an etchant that includes reactive species from a mixture that includes NH3 and NF3. The etchant forms a solid reaction product with the protruding structure, and the solid reaction product may be removed from the substrate. A final portion of the dielectric material may be deposited in the gap with the high-density plasma.
摘要翻译：描述了使用高密度等离子体在衬底间隙中形成电介质材料的方法。该方法可以包括将电介质材料的第一部分沉积到具有高密度等离子体的间隙中。沉积可以形成至少部分地阻挡介电材料沉积到间隙中的突出结构。电介质材料的第一部分暴露于包括来自包括NH 3和N N 3 3的混合物的反应物质的蚀刻剂。蚀刻剂形成具有突出结构的固体反应产物，并且固体反应产物可以从基底上除去。介电材料的最终部分可以与高密度等离子体在间隙中沉积。

10. 发明授权

US07141138B2 Gas delivery system for semiconductor processing 有权
公开(公告)号：US07141138B2
公开(公告)日：2006-11-28
申请号：US10630989
申请日：2003-07-28
申请人： Sudhir Gondhalekar , Padmanabhan Krishnaraj , Tom K. Cho , Muhammad Rasheed , Hemant Mungekar , Thanh N. Pham , Zhong Qiang Hua
发明人： Sudhir Gondhalekar , Padmanabhan Krishnaraj , Tom K. Cho , Muhammad Rasheed , Hemant Mungekar , Thanh N. Pham , Zhong Qiang Hua
IPC分类号： H01L21/306 , C23C16/00 , C23F1/00
CPC分类号： H01L21/67017 , H01L21/67109
摘要： The present invention is directed to improving defect performance in semiconductor processing systems. In specific embodiments, an apparatus for processing semiconductor substrates comprises a chamber defining a processing region therein, and a substrate support disposed in the chamber to support a semiconductor substrate. At least one nozzle extends into the chamber to introduce a process gas into the chamber through a nozzle opening. The apparatus comprises at least one heat shield, each of which is disposed around at least a portion of one of the at least one nozzle. The heat shield has an extension which projects distally of the nozzle opening of the nozzle and which includes a heat shield opening for the process gas to flow therethrough from the nozzle opening. The heat shield decreases the temperature of nozzle in the processing chamber for introducing process gases therein to reduce particles.

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