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    • 3. 发明授权
    • Enhanced fused multiply-add operation
    • 增强融合乘法运算
    • US07499962B2
    • 2009-03-03
    • US11019921
    • 2004-12-21
    • Ping T. TangDavid D. Donofrio
    • Ping T. TangDavid D. Donofrio
    • G06F7/483
    • G06F7/5443G06F7/483
    • An apparatus, method, and system for performing an enhanced fused multiply-add operation is disclosed. In one embodiment, an apparatus includes an exponent unit. The exponent unit includes a first adder to generate S1, where S1 is the sum of an integer k, the exponent of a floating point value A, and the exponent of a floating point value B. The exponent unit also includes a comparator to generate E1, where E1 is the greater of S1 and the exponent of a floating point value C. The apparatus also includes a partial multiplier, a shifter, and a second adder. The partial multiplier generates the partial products of the mantissas of A and B. The shifter aligns the partial products and the mantissa of C, based on E1. The second adder adds the aligned partial products and the mantissa of C. The apparatus is able to generate not only (A*B+C), but is enhanced to also be able to generate (2k*A*B+C) and the closest integer to (2k*A*B) in two's complement or floating point format.
    • 公开了一种用于执行增强的融合乘法运算的装置,方法和系统。 在一个实施例中,装置包括指数单元。 指数单元包括产生S1的第一加法器,其中S1是整数k,浮点值A的指数和浮点值B的指数之和。指数单元还包括产生E1的比较器 其中E1是S1中的较大者和浮点值C的指数。该装置还包括部分乘法器,移位器和第二加法器。 部分乘法器产生A和B的尾数的部分乘积。移位器基于E1对齐部分乘积和C的尾数。 第二个加法器将对齐的部分积和C的尾数相加。该装置能够不仅产生(A * B + C),而且能够增强也能够生成(2k * A * B + C)和 最接近的整数(2k * A * B)为二进制补码或浮点格式。
    • 4. 发明授权
    • Methods and apparatus for performing mathematical operations using scaled integers
    • 使用缩放整数执行数学运算的方法和装置
    • US07290024B2
    • 2007-10-30
    • US10740086
    • 2003-12-18
    • Ping T. TangGopi K. Kolli
    • Ping T. TangGopi K. Kolli
    • G06F7/483
    • G06F7/483G06F7/38
    • Methods, apparatus, and articles of manufacture for performing mathematical operations using scaled integers are disclosed. In particular, an example method identifies a scaled-integer value and determines a multiplier value and a scale value based on the scaled-integer value. The multiplier value is determined by extracting information from a first portion of a bitfield based on the scaled-integer value. The scale value is determined by extracting information from a second portion of the bitfield based on the scaled-integer value. The first and second portions of the bitfield are configurable to include signed integer values. The example method then performs an arithmetic operation based on the multiplier value and the scale value.
    • 公开了使用缩放整数执行数学运算的方法,装置和制品。 特别地,示例性方法识别缩放整数值,并且基于缩放整数值来确定乘数值和比例值。 通过基于缩放整数值从位字段的第一部分提取信息来确定乘数值。 通过基于缩放整数值从位域的第二部分提取信息来确定比例值。 位域的第一和第二部分可配置为包括有符号整数值。 然后,示例方法基于乘数值和比例值执行算术运算。
    • 5. 发明授权
    • Methods and apparatus for extracting integer remainders
    • 用于提取整数余数的方法和装置
    • US07979486B2
    • 2011-07-12
    • US11946593
    • 2007-11-28
    • John R. HarrisonPing T. Tang
    • John R. HarrisonPing T. Tang
    • G06F7/535
    • G06F7/535G06F7/72G06F2207/5356
    • Methods and apparatus to determine a remainder value are disclosed. A disclosed example method involves, during a compilation phase, causing a processor to multiply a dividend value by a first value to generate a second value associated with a product. The first value is associated with a scaled approximate reciprocal of a divisor value, and the scaled approximate reciprocal of the divisor value is determined using a compound exponent value. During a runtime phase, the processor is caused to multiply a third value from the second value. The third value is generated using at least a subset bitfield of the second value. During the runtime phase, the processor is caused to determine a remainder value based on the third value. The processor is caused to store the remainder value in a memory.
    • 公开了确定余数值的方法和装置。 所公开的示例性方法涉及在编译阶段期间使处理器将分红值乘以第一值以生成与产品相关联的第二值。 第一个值与除数值的缩放近似倒数相关联,并且使用复合指数值确定除数值的缩放近似倒数。 在运行阶段期间,使处理器从第二个值乘以第三个值。 使用第二值的至少子集位字段来生成第三值。 在运行阶段期间,使处理器基于第三值来确定余数值。 使处理器将余数值存储在存储器中。
    • 9. 发明授权
    • Methods and apparatus for compiling a transcendental floating-point operation
    • 用于编译超验浮点运算的方法和装置
    • US07080364B2
    • 2006-07-18
    • US10424600
    • 2003-04-28
    • Ping T. TangCristina S. Iordache
    • Ping T. TangCristina S. Iordache
    • G06F9/45
    • G06F7/483G06F7/556
    • Methods and an apparatus for compiling a transcendental floating-point operation are disclosed. The disclosed techniques compile a transcendental floating-point operation by replacing the transcendental floating-point operation with an integer-based routine (e.g., a single routine) hand-coded to perform the transcendental floating-point operation. Each of the instructions in the integer-based routine, including the integer operations, is compiled directly into opcodes without primitive floating-point emulation calls. As a result, function nesting is reduced and more efficient algorithms are used. The disclosed system does not simply emulate basic floating-point operations using integer operations. Instead, portions of the computation are isolated where fixed-point accuracy is sufficient and thus native integer computations can be used. For example, computing (log(1+Z)−Z)/Z instead of computing log(1+Z).
    • 公开了用于编译超验浮点运算的方法和装置。 所公开的技术通过用手工编码的基于整数的例程(例如,单个例程)代替先验浮点运算来编译超验浮点运算,以执行超验浮点运算。 基于整数的例程中的每个指令(包括整数运算)都直接编译成没有原始浮点仿真调用的操作码。 因此,功能嵌套被减少,并且使用更有效的算法。 所公开的系统不仅仅使用整数运算来模拟基本的浮点运算。 相反,计算的一部分被隔离,其中定点精度是足够的,因此可以使用本机整数计算。 例如,计算(log(1 + Z)-Z)/ Z而不是计算log(1 + Z)。