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1. 发明申请

US20100041195A1 METHOD OF MANUFACTURING SILICON CARBIDE SELF-ALIGNED EPITAXIAL MOSFET FOR HIGH POWERED DEVICE APPLICATIONS 有权
标题翻译：用于高功率器件应用的硅碳化物自对准外延MOSFET的制造方法
公开(公告)号：US20100041195A1
公开(公告)日：2010-02-18
申请号：US12603603
申请日：2009-10-22
申请人： Christopher Harris , Kent Bertilsson , Andrei Konstantinov
发明人： Christopher Harris , Kent Bertilsson , Andrei Konstantinov
IPC分类号： H01L21/336
CPC分类号： H01L29/7813 , H01L29/0878 , H01L29/1095 , H01L29/1608 , H01L29/41766 , H01L29/42368 , H01L29/66068 , Y10S438/903 , Y10S438/969
摘要： A self-aligned, silicon carbide power metal oxide semiconductor field effect transistor includes a trench formed in a first layer, with a base region and then a source region epitaxially regrown within the trench. A window is formed through the source region and into the base region within a middle area of the trench. A source contact is formed within the window in contact with a base and source regions. The gate oxide layer is formed on the source and base regions at a peripheral area of the trench and on a surface of the first layer. A gate electrode is formed on the gate oxide layer above the base region at the peripheral area of the trench, and a drain electrode is formed over a second surface of the first layer.
摘要翻译：自对准的碳化硅功率金属氧化物半导体场效应晶体管包括形成在第一层中的沟槽，其具有在沟槽内外延再生长的基极区域和源极区域。通过源区域形成窗口，并且在沟槽的中间区域内形成窗口。源极触点形成在与基极和源极区域接触的窗口内。栅极氧化层形成在沟槽的周边区域和第一层的表面上的源极和基极区域上。在沟槽的周边区域的基极区域上方的栅极氧化层上形成栅电极，在第一层的第二面上形成漏电极。

2. 发明授权

US07994017B2 Method of manufacturing silicon carbide self-aligned epitaxial MOSFET for high powered device applications 有权
标题翻译：制造用于高功率器件应用的碳化硅自对准外延MOSFET的方法
公开(公告)号：US07994017B2
公开(公告)日：2011-08-09
申请号：US12603603
申请日：2009-10-22
申请人： Christopher Harris , Kent Bertilsson , Andrei Konstantinov
发明人： Christopher Harris , Kent Bertilsson , Andrei Konstantinov
IPC分类号： H01L21/336
CPC分类号： H01L29/7813 , H01L29/0878 , H01L29/1095 , H01L29/1608 , H01L29/41766 , H01L29/42368 , H01L29/66068 , Y10S438/903 , Y10S438/969
摘要： A self-aligned, silicon carbide power metal oxide semiconductor field effect transistor includes a trench formed in a first layer, with a base region and then a source region epitaxially regrown within the trench. A window is formed through the source region and into the base region within a middle area of the trench. A source contact is formed within the window in contact with a base and source regions. The gate oxide layer is formed on the source and base regions at a peripheral area of the trench and on a surface of the first layer. A gate electrode is formed on the gate oxide layer above the base region at the peripheral area of the trench, and a drain electrode is formed over a second surface of the first layer.
摘要翻译：自对准的碳化硅功率金属氧化物半导体场效应晶体管包括形成在第一层中的沟槽，其具有在沟槽内外延再生长的基极区域和源极区域。通过源区域形成窗口，并且在沟槽的中间区域内形成窗口。源极触点形成在与基极和源极区域接触的窗口内。栅极氧化层形成在沟槽的周边区域和第一层的表面上的源极和基极区域上。在沟槽的周边区域的基极区域上方的栅极氧化层上形成栅电极，在第一层的第二面上形成漏电极。

3. 发明授权

US07629616B2 Silicon carbide self-aligned epitaxial MOSFET for high powered device applications 有权
标题翻译：用于大功率器件应用的碳化硅自对准外延MOSFET
公开(公告)号：US07629616B2
公开(公告)日：2009-12-08
申请号：US11711703
申请日：2007-02-28
申请人： Christopher Harris , Kent Bertilsson , Andrei Konstantinov
发明人： Christopher Harris , Kent Bertilsson , Andrei Konstantinov
IPC分类号： H01L29/76 , H01L21/336
CPC分类号： H01L29/7813 , H01L29/0878 , H01L29/1095 , H01L29/1608 , H01L29/41766 , H01L29/42368 , H01L29/66068 , Y10S438/903 , Y10S438/969
摘要： A self-aligned, silicon carbide power metal oxide semiconductor field effect transistor includes a trench formed in a first layer, with a base region and then a source region epitaxially regrown within the trench. A window is formed through the source region and into the base region within a middle area of the trench. A source contact is formed within the window in contact with a base and source regions. The gate oxide layer is formed on the source and base regions at a peripheral area of the trench and on a surface of the first layer. A gate electrode is formed on the gate oxide layer above the base region at the peripheral area of the trench, and a drain electrode is formed over a second surface of the first layer.
摘要翻译：自对准的碳化硅功率金属氧化物半导体场效应晶体管包括形成在第一层中的沟槽，其具有在沟槽内外延再生长的基极区域和源极区域。通过源区域形成窗口，并且在沟槽的中间区域内形成窗口。源极触点形成在与基极和源极区域接触的窗口内。栅极氧化层形成在沟槽的周边区域和第一层的表面上的源极和基极区域上。在沟槽的周边区域的基极区域上方的栅极氧化层上形成栅电极，在第一层的第二面上形成漏电极。

4. 发明申请

US20080203398A1 Silicon carbide self-aligned epitaxial MOSFET and method of manufacturing thereof 有权
标题翻译：碳化硅自对准外延MOSFET及其制造方法
公开(公告)号：US20080203398A1
公开(公告)日：2008-08-28
申请号：US11711703
申请日：2007-02-28
申请人： Christopher Harris , Kent Bertilsson , Andrei Konstantinov
发明人： Christopher Harris , Kent Bertilsson , Andrei Konstantinov
IPC分类号： H01L29/76 , H01L21/336
CPC分类号： H01L29/7813 , H01L29/0878 , H01L29/1095 , H01L29/1608 , H01L29/41766 , H01L29/42368 , H01L29/66068 , Y10S438/903 , Y10S438/969
摘要： A self-aligned, silicon carbide power metal oxide semiconductor field effect transistor includes a trench formed in a first layer, with a base region and then a source region epitaxially regrown within the trench. A window is formed through the source region and into the base region within a middle area of the trench. A source contact is formed within the window in contact with a base and source regions. The gate oxide layer is formed on the source and base regions at a peripheral area of the trench and on a surface of the first layer. A gate electrode is formed on the gate oxide layer above the base region at the peripheral area of the trench, and a drain electrode is formed over a second surface of the first layer.
摘要翻译：自对准的碳化硅功率金属氧化物半导体场效应晶体管包括形成在第一层中的沟槽，其具有在沟槽内外延再生长的基极区域和源极区域。通过源区域形成窗口，并且在沟槽的中间区域内形成窗口。源极触点形成在与基极和源极区域接触的窗口内。栅极氧化层形成在沟槽的周边区域和第一层的表面上的源极和基极区域上。在沟槽的周边区域的基极区域上方的栅极氧化层上形成栅电极，在第一层的第二面上形成漏电极。

5. 发明申请

US20070278609A1 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US20070278609A1
公开(公告)日：2007-12-06
申请号：US11444106
申请日：2006-05-31
申请人： Christopher Harris , Cem Basceri , Kent Bertilsson
发明人： Christopher Harris , Cem Basceri , Kent Bertilsson
IPC分类号： H01L29/47 , H01L27/095
CPC分类号： H01L29/872 , H01L21/8213 , H01L27/0255 , H01L27/0814 , H01L29/0619 , H01L29/16 , H01L29/1602 , H01L29/1608 , H01L29/8611
摘要： A semiconductor device of unipolar type has Schottky-contacts (6) laterally separated by regions in the form of additional layers (7, 7″) of semiconductor material on top of a drift layer (3). Said additional layers being doped according to a conductivity type being opposite to the one of the drift layer. At least one (7″) of the additional layers has a substantially larger lateral extension and thereby larger area of the interface to the drift layer than adjacent such layers (7) for facilitating the building-up of a sufficient voltage between that layer and the drift layer for injecting minority charge carriers into the drift layer upon surge for surge protection.
摘要翻译：单极型的半导体器件具有由漂移层（3）顶部上的半导体材料的附加层（7,7“）形式的区域横向分开的肖特基触点（6）。所述附加层根据与漂移层中的一个相反的导电类型被掺杂。附加层的至少一个（7“）具有基本上更大的横向延伸，从而与相邻的这些层（7）相比，漂移层的界面的面积更大，以便于在该层与层之间建立足够的电压用于在浪涌保护的浪涌时将少数电荷载流子注入到漂移层中的漂移层。

6. 发明授权

US07728403B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US07728403B2
公开(公告)日：2010-06-01
申请号：US11444106
申请日：2006-05-31
申请人： Christopher Harris , Cem Basceri , Kent Bertilsson
发明人： Christopher Harris , Cem Basceri , Kent Bertilsson
IPC分类号： H01L29/47
CPC分类号： H01L29/872 , H01L21/8213 , H01L27/0255 , H01L27/0814 , H01L29/0619 , H01L29/16 , H01L29/1602 , H01L29/1608 , H01L29/8611
摘要： A semiconductor device of unipolar type has Schottky-contacts (6) laterally separated by regions in the form of additional layers (7, 7″) of semiconductor material on top of a drift layer (3). Said additional layers being doped according to a conductivity type being opposite to the one of the drift layer. At least one (7″) of the additional layers has a substantially larger lateral extension and thereby larger area of the interface to the drift layer than adjacent such layers (7) for facilitating the building-up of a sufficient voltage between that layer and the drift layer for injecting minority charge carriers into the drift layer upon surge for surge protection.
摘要翻译：单极型半导体器件具有由漂移层（3）顶部上的半导体材料附加层（7,7“）形式的区域横向隔开的肖特基触点（6）。所述附加层根据与漂移层中的一个相反的导电类型被掺杂。至少一个（7“）附加层具有相对较大的侧向延伸，从而与相邻的这些层（7）相比，漂移层的界面的面积更大，以便于在该层和第二层之间建立足够的电压漂移层，用于在电涌保护时将少数电荷载体注入漂移层。

7. 发明授权

US07978041B2 Transformer 有权
标题翻译：变压器
公开(公告)号：US07978041B2
公开(公告)日：2011-07-12
申请号：US12502611
申请日：2009-07-14
申请人： Kent Bertilsson
发明人： Kent Bertilsson
IPC分类号： H01F5/00
CPC分类号： H01F27/2804 , H01F17/0013 , H05K1/165
摘要： A printed circuit board transformer comprises at least one primary winding and one secondary winding, each in the form of at least one layer of turns inside or at the surface of a printed circuit board. The transformer is designed for a step-up/down-operation. Each of the two layers (10, 11) has an elongated winding element (12, 13, 13′) substantially following an elongated winding element of the other layer while being in an overlapping relationship therewith as seen perpendicularly to said printed circuit board over substantially the entire extension of said winding elements. A second (11) of the layers belonging to the secondary winding has a fewer number of turns than the first (10) of said layers belonging to said primary winding.
摘要翻译：印刷电路板变压器包括至少一个初级绕组和一个次级绕组，每个初级绕组和一个次级绕组在印刷电路板的内部或表面处至少一层匝的形式。变压器设计用于升压/降压运行。两个层（10,11）中的每一个具有基本上沿着另一层的细长的绕组元件的细长的绕组元件（12,13,13'），同时与其垂直于所述印刷电路板的重叠关系基本上所述绕组元件的整个延伸部分。属于次级绕组的层的第二（11）具有比属于所述初级绕组的所述层的第一层（10）更少的匝数。

8. 发明申请

US20100265023A1 TRANSFORMER 有权
标题翻译：变压器
公开(公告)号：US20100265023A1
公开(公告)日：2010-10-21
申请号：US12502611
申请日：2009-07-14
申请人： Kent Bertilsson
发明人： Kent Bertilsson
IPC分类号： H01F5/00
CPC分类号： H01F27/2804 , H01F17/0013 , H05K1/165
摘要： A printed circuit board transformer comprises at least one primary winding and one secondary winding, each in the form of at least one layer of turns inside or at the surface of a printed circuit board. The transformer is designed for a step-up/down-operation. Each of the two layers (10, 11) has an elongated winding element (12, 13, 13′) substantially following an elongated winding element of the other layer while being in an overlapping relationship therewith as seen perpendicularly to said printed circuit board over substantially the entire extension of said winding elements. A second (11) of the layers belonging to the secondary winding has a fewer number of turns than the first (10) of said layers belonging to said primary winding.
摘要翻译：印刷电路板变压器包括至少一个初级绕组和一个次级绕组，每个初级绕组和一个次级绕组在印刷电路板的内部或表面处至少一层匝的形式。变压器设计用于升压/降压运行。两个层（10,11）中的每一个具有基本上沿着另一层的细长的绕组元件的细长的绕组元件（12,13,13'），同时与其垂直于所述印刷电路板的重叠关系基本上所述绕组元件的整个延伸部分。属于次级绕组的层的第二（11）具有比属于所述初级绕组的所述层的第一层（10）更少的匝数。

9. 发明申请

US20120099346A1 Converter and an Electronic Equipment Provided with such a Converter 审中-公开
标题翻译：转换器和提供这样的转换器的电子设备
公开(公告)号：US20120099346A1
公开(公告)日：2012-04-26
申请号：US12949166
申请日：2010-11-18
申请人： Kent Bertilsson
发明人： Kent Bertilsson
IPC分类号： H02M3/335
CPC分类号： H01F27/2804 , H02M3/33523
摘要： A converter for converting AC to DC or DC to DC comprises a first transformer (10) having a secondary winding connected to a DC-load side of the converter, semiconductor switches connected to a primary winding of the transformer, a drive circuit configured to control the semiconductor switches to switch so as to deliver a voltage to the primary winding with a frequency exceeding 1 MHz and electronic components. The drive circuit comprises a second transformer (12) for voltage level shifting of said semiconductor switches with respect to a logic drive circuit unit of said drive circuit. The transformers are arranged inside or at the surface of a first printed circuit board (30), and the electronic components of the converter including said semiconductor switches are arranged inside or at the surface of a second printed circuit board (31). The two circuit boards are separated by a shielding ferrite layer (32) sandwiched therebetween.
摘要翻译：用于将AC转换为DC或DC至DC的A转换器包括具有连接到转换器的DC负载侧的次级绕组的第一变压器（10），连接到变压器的初级绕组的半导体开关，被配置为控制半导体开关切换以便以超过1MHz的频率和电子部件向初级绕组传送电压。驱动电路包括用于所述半导体开关相对于所述驱动电路的逻辑驱动电路单元进行电压电平移位的第二变压器（12）。变压器布置在第一印刷电路板（30）的内部或表面，并且包括所述半导体开关的转换器的电子部件布置在第二印刷电路板（31）的内部或表面。两个电路板由夹在其间的屏蔽铁氧体层（32）分开。

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