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1. 发明申请

US20120079232A1 APPARATUS, METHOD, AND SYSTEM FOR IMPLEMENTING MICRO PAGE TABLES 有权
标题翻译：用于实施微型表格的装置，方法和系统
公开(公告)号：US20120079232A1
公开(公告)日：2012-03-29
申请号：US12890585
申请日：2010-09-24
申请人： Glenn Hinton , Madhavan Parthasarathy , Rajesh Parthasarathy , Muthukumar Swaminathan , Raj Ramanujan , David Zimmerman , Larry O. Smith , Adrian C. Moga , Scott J. Cape , Wayne A. Downer , Robert S. Chappell
发明人： Glenn Hinton , Madhavan Parthasarathy , Rajesh Parthasarathy , Muthukumar Swaminathan , Raj Ramanujan , David Zimmerman , Larry O. Smith , Adrian C. Moga , Scott J. Cape , Wayne A. Downer , Robert S. Chappell
IPC分类号： G06F12/10
CPC分类号： G06F12/1027 , G06F12/023 , G06F12/0292 , G06F12/06 , G06F12/1009 , G06F2212/1028 , G06F2212/1041 , G06F2212/151 , G06F2212/205 , G06F2212/651 , Y02D10/13
摘要： An apparatus, method, machine-readable medium, and system are disclosed. In one embodiment the apparatus is a micro-page table engine that includes logic that is capable of receiving a memory page request for a page in global memory address space. The apparatus also includes a translation lookaside buffer (TLB) that is capable of storing one or more memory page address translations. Additionally, the apparatus also has a page miss handler capable of performing a micro physical address lookup in a page miss handler tag table in response to the TLB not storing the memory page address translation for the page of memory referenced by the memory page request. The apparatus also includes memory management logic that is capable of managing the page miss handler tag table entries. The micro-page table engine allows the TLB to be an agent that determines whether data in a two-level memory hierarchy is in a hot region of memory or in a cold region of memory. When data is in the cold region of memory, the micro-page table engine fetches the data to the hot memory and a hot memory block is then pushed out to the cold memory area.
摘要翻译：公开了一种装置，方法，机器可读介质和系统。在一个实施例中，该装置是微页表引擎，其包括能够接收全局存储器地址空间中的页面的存储器页面请求的逻辑。该装置还包括能够存储一个或多个存储器页面地址转换的翻译后备缓冲器（TLB）。此外，该设备还具有能够响应于TLB不存储由存储器寻呼请求引用的存储器页面的存储器页面地址转换而在页面未命中处理器标签表中执行微物理地址查找的页面未命中处理程序。该装置还包括能够管理页面未命中处理程序标签表条目的存储器管理逻辑。微页表引擎允许TLB作为一个代理，确定二级存储器层次结构中的数据是在存储器的热区域还是在存储器的冷区域。当数据处于存储器的冷区域时，微页表引擎将数据读取到热存储器，然后将热存储器块推出到冷存储器区域。

2. 发明授权

US08838935B2 Apparatus, method, and system for implementing micro page tables 有权
标题翻译：用于实现微页表的装置，方法和系统
公开(公告)号：US08838935B2
公开(公告)日：2014-09-16
申请号：US12890585
申请日：2010-09-24
申请人： Glenn Hinton , Madhavan Parthasarathy , Rajesh Parthasarathy , Muthukumar Swaminathan , Raj Ramanujan , David Zimmerman , Larry O. Smith , Adrian C. Moga , Scott J. Cape , Wayne A. Downer , Robert S. Chappell
发明人： Glenn Hinton , Madhavan Parthasarathy , Rajesh Parthasarathy , Muthukumar Swaminathan , Raj Ramanujan , David Zimmerman , Larry O. Smith , Adrian C. Moga , Scott J. Cape , Wayne A. Downer , Robert S. Chappell
IPC分类号： G06F12/00 , G06F12/10 , G06F12/02
CPC分类号： G06F12/1027 , G06F12/023 , G06F12/0292 , G06F12/06 , G06F12/1009 , G06F2212/1028 , G06F2212/1041 , G06F2212/151 , G06F2212/205 , G06F2212/651 , Y02D10/13
摘要： In one embodiment the apparatus is a micro-page table engine that includes logic that is capable of receiving a memory page request for a page in global memory address space. The apparatus also includes a translation lookaside buffer (TLB) that is capable of storing one or more memory page address translations. Additionally, the apparatus also has a page miss handler capable of performing a micro physical address lookup in a page miss handler tag table in response to the TLB not storing the memory page address translation for the page of memory referenced by the memory page request. The apparatus also includes memory management logic that is capable of managing the page miss handler tag table entries.
摘要翻译：在一个实施例中，该装置是微页表引擎，其包括能够接收全局存储器地址空间中的页面的存储器页面请求的逻辑。该装置还包括能够存储一个或多个存储器页面地址转换的翻译后备缓冲器（TLB）。此外，该设备还具有能够响应于TLB不存储由存储器寻呼请求引用的存储器页面的存储器页面地址转换而在页面未命中处理器标签表中执行微物理地址查找的页面未命中处理程序。该装置还包括能够管理页面未命中处理程序标签表条目的存储器管理逻辑。

3. 发明申请

US20130294184A1 SELF-REPAIR LOGIC FOR STACKED MEMORY ARCHITECTURE 有权
标题翻译：用于堆叠存储器架构的自修复逻辑
公开(公告)号：US20130294184A1
公开(公告)日：2013-11-07
申请号：US13976405
申请日：2011-12-23
申请人： Joon-Sung Yang , Darshan Kobla , Liwei Ju , David Zimmerman
发明人： Joon-Sung Yang , Darshan Kobla , Liwei Ju , David Zimmerman
IPC分类号： G11C29/04
CPC分类号： G11C29/70 , G11C29/025 , G11C29/04 , G11C29/4401 , G11C29/702 , G11C29/785 , G11C29/846 , G11C2213/71 , H01L22/22 , H01L23/481 , H01L25/0657 , H01L2225/06544 , H01L2225/06596 , H01L2924/0002 , H01L2924/00
摘要： Self-repair logic for stacked memory architecture. An embodiment of a memory device includes a memory stack having one or more memory die elements, including a first memory die element, and a system element coupled with the memory stack. The first memory die element includes multiple through silicon vias (TSVs), the TSVs including data TSVs and one or more spare TSVs, and self-repair logic to repair operation of a defective TSV of the plurality of data TSVs, the repair of operation of the defective TSV including utilization of the one or more spare TSVs.
摘要翻译：堆叠式内存架构的自修复逻辑。存储器件的实施例包括具有一个或多个存储器管芯元件的存储器堆叠，其包括第一存储器管芯元件以及与存储器堆叠耦合的系统元件。第一存储器芯片元件包括多个硅通孔（TSV），TSV包括数据TSV和一个或多个备用TSV，以及自修复逻辑来修复多个数据TSV的缺陷TSV的操作，修复缺陷TSV包括利用一个或多个备用TSV。

4. 发明申请

US20050223303A1 Memory channel self test 有权
标题翻译：内存通道自检
公开(公告)号：US20050223303A1
公开(公告)日：2005-10-06
申请号：US10815217
申请日：2004-03-30
申请人： David Zimmerman , Edward Weaver , Ramasubramanian Rajamani
发明人： David Zimmerman , Edward Weaver , Ramasubramanian Rajamani
IPC分类号： G11C8/00 , G11C29/00 , G11C29/08 , G11C29/54
CPC分类号： G11C29/54 , G11C5/04 , G11C29/08 , G11C2029/5602
摘要： A buffer logic within a memory module having the capability to carry out a test of another memory module to which it is coupled via a point-to-point bus through autonomously storing and transmitting a test pattern across that point-to-point bus to the other memory module, while further employing another buffer logic that is interposed between the two memory modules to pass on the test pattern, but intercept a signal received from the other memory module during the test and pass on an indication of the receipt of that signal to an analysis device to monitor the test.
摘要翻译：存储器模块内的缓冲器逻辑具有通过点到点总线对其进行耦合的另一个存储器模块的测试的能力，该测试模块通过自主地存储和传输跨越该点对点总线的测试模式到其它存储器模块，同时进一步采用插入在两个存储器模块之间的另一个缓冲器逻辑来传递测试图案，但是在测试期间拦截从另一个存储器模块接收的信号，并将该信号的接收指示传递给用于监测测试的分析设备。

5. 发明申请

US20140237307A1 GENERIC ADDRESS SCRAMBLER FOR MEMORY CIRCUIT TEST ENGINE 有权
标题翻译：用于存储器电路测试引擎的通用地址清除器
公开(公告)号：US20140237307A1
公开(公告)日：2014-08-21
申请号：US13997641
申请日：2011-12-28
申请人： Darshan Kobla , David Zimmerman , Vimal Natarajan
发明人： Darshan Kobla , David Zimmerman , Vimal Natarajan
IPC分类号： G11C29/12
CPC分类号： G11C29/12 , G06F12/1408 , G11C29/18 , G11C2029/1806
摘要： A generic address scrambler for a memory circuit test engine. An embodiment of a memory device includes a memory stack having one or more of coupled memory elements, a built-in self-test circuit including a generic programmable address scrambler for the mapping of logical addresses to physical addresses for the memory elements, and one or more registers to hold pro-gramming values for the generic programmable address scrambler.
摘要翻译：用于存储器电路测试引擎的通用地址扰乱器。存储器件的实施例包括具有一个或多个耦合的存储器元件的存储器堆叠，内置的自测电路，其包括用于将逻辑地址映射到存储器元件的物理地址的通用可编程地址加扰器，以及一个或更多的寄存器用于保存通用可编程地址扰频器的编程值。

6. 发明申请

US20140013169A1 GENERIC ADDRESS SCRAMBLER FOR MEMORY CIRCUIT TEST ENGINE 有权
标题翻译：用于存储器电路测试引擎的通用地址清除器
公开(公告)号：US20140013169A1
公开(公告)日：2014-01-09
申请号：US13997156
申请日：2012-03-30
申请人： Darshan Kobla , David Zimmerman , John C. Johnson , Vimal K. Natarajan
发明人： Darshan Kobla , David Zimmerman , John C. Johnson , Vimal K. Natarajan
IPC分类号： G11C29/18
CPC分类号： G11C29/18 , G11C11/40 , G11C29/36
摘要： A generic data scrambler for a memory circuit test engine. An embodiment of a memory device includes a memory; a memory controller for the memory; a built-in self-test (BIST) circuit for the testing of the memory; and a generic data scrambler for scrambling of data according to a scrambling algorithm for the memory, where each algorithm is based on values of an address for data. The generic data scrambler includes a programmable lookup table to hold values for each possible outcome of the algorithm, the lookup table to generate a set of data factors, and a logic for combining the data with the data factors to generate scrambled data.
摘要翻译：用于存储器电路测试引擎的通用数据扰频器。存储器件的实施例包括存储器; 用于存储器的存储器控制器; 内置自检（BIST）电路，用于测试存储器; 以及根据用于存储器的加扰算法对数据进行加扰的通用数据加扰器，其中每个算法基于用于数据的地址的值。通用数据加扰器包括可编程查找表，用于保存算法的每个可能结果的值，用于生成一组数据因子的查找表，以及用于将数据与数据因子组合以产生加扰数据的逻辑。

7. 发明授权

US08061295B2 Bead applicator 有权
标题翻译：珠涂抹器
公开(公告)号：US08061295B2
公开(公告)日：2011-11-22
申请号：US12259293
申请日：2008-10-27
申请人： David Zimmerman , Russell Francis , Michael Orlando , Ryan Vodicka
发明人： David Zimmerman , Russell Francis , Michael Orlando , Ryan Vodicka
IPC分类号： B05C19/00 , B05B3/00 , B65G53/50
CPC分类号： E01C23/166 , B05B7/1413 , B05B7/1422
摘要： A bead applicator for embedding particulates in wet paint, includes a blower directing air into an attached series of connected pipes; a particulate hopper, and a tubular particulate supply line connecting an outlet opening from the hopper to a venturi inlet opening at a low pressure point of a venturi tube. The series of connected pipes includes, in order, the venturi tube, a rigid tubular wand, and a dispensing nozzle. The wand, an inlet of the nozzle, and an outlet of the nozzle all have approximately the same, or greater, inside cross-sectional area relative to that of an outlet of the venturi tube; and the nozzle fans out to a long and narrow shaped outlet. Preferably a flexible hose is included in the series of connected pipes; the hose having approximately the same, or greater, inside cross-sectional area relative to that of the venturi tube outlet, and the nozzle outlet is bent over.
摘要翻译：用于将微粒包埋在湿涂料中的珠子涂布器包括将空气引导到连接的一系列连接的管道中的鼓风机; 颗粒料斗和管状颗粒供应管线，其将来自料斗的出口开口连接到文丘里管的低压点处的文丘里管入口。所连接的管道系列依次包括文氏管，刚性管状棒和分配喷嘴。喷嘴的入口和喷嘴的出口全部具有与文氏管的出口大致相同或更大的内部横截面积; 并且喷嘴风扇出口到长而窄的形状的出口。优选地，一系列连接的管中包括柔性软管; 软管具有与文丘里管出口大致相同或更大的内部横截面积，并且喷嘴出口弯曲。

8. 发明申请

US20090110813A1 BEAD APPLICATOR 有权
标题翻译：珠子应用
公开(公告)号：US20090110813A1
公开(公告)日：2009-04-30
申请号：US12259293
申请日：2008-10-27
申请人： David Zimmerman , Russell Francis , Michael Orlando , Ryan Vodicka
发明人： David Zimmerman , Russell Francis , Michael Orlando , Ryan Vodicka
IPC分类号： E01C17/00
CPC分类号： E01C23/166 , B05B7/1413 , B05B7/1422
摘要： A bead applicator for embedding particulates in wet paint, includes a blower directing air into an attached series of connected pipes; a particulate hopper, and a tubular particulate supply line connecting an outlet opening from the hopper to a venturi inlet opening at a low pressure point of a venturi tube. The series of connected pipes includes, in order, the venturi tube, a rigid tubular wand, and a dispensing nozzle. The wand, an inlet of the nozzle, and an outlet of the nozzle all have approximately the same, or greater, inside cross-sectional area relative to that of an outlet of the venturi tube; and the nozzle fans out to a long and narrow shaped outlet. Preferably a flexible hose is included in the series of connected pipes; the hose having approximately the same, or greater, inside cross-sectional area relative to that of the venturi tube outlet, and the nozzle outlet is bent over.
摘要翻译：用于将微粒包埋在湿涂料中的珠子涂布器包括将空气引导到连接的一系列连接的管道中的鼓风机; 颗粒料斗和管状颗粒供应管线，其将来自料斗的出口开口连接到文丘里管的低压点处的文丘里管入口。所连接的管道系列依次包括文氏管，刚性管状棒和分配喷嘴。喷嘴的入口和喷嘴的出口全部具有与文氏管的出口大致相同或更大的内部横截面积; 并且喷嘴风扇出口到长而窄的形状的出口。优选地，一系列连接的管中包括柔性软管; 软管具有与文丘里管出口大致相同或更大的内部横截面积，并且喷嘴出口弯曲。

9. 发明申请

US20070064399A1 Flip chip heat sink package and method 有权
公开(公告)号：US20070064399A1
公开(公告)日：2007-03-22
申请号：US11583316
申请日：2006-10-19
申请人： Larry Mandel , Kevin Gertiser , Suresh Chengalva , Dwadasi Sarma , David Zimmerman
发明人： Larry Mandel , Kevin Gertiser , Suresh Chengalva , Dwadasi Sarma , David Zimmerman
IPC分类号： H05K7/20
CPC分类号： H01L23/427 , H01L21/4878 , H01L21/4882 , H01L21/563 , H01L23/3675 , H01L23/3677 , H01L23/42 , H01L2224/16 , H01L2224/73204 , H01L2224/73253 , Y10T29/49144
摘要： An electronic package having enhanced heat dissipation is provided exhibiting dual conductive heat paths in opposing directions. The package includes a substrate having electrical conductors thereon and a flip chip mounted to the substrate. The flip chip has a first surface, solder bumps on the first surface, and a second surface oppositely disposed from the first surface. The flip chip is mounted to the substrate such that the solder bumps are registered with the conductors on the substrate. The package further includes a stamped metal heat sink in heat transfer relationship with the second surface of the flip chip. The heat sink includes a cavity formed adjacent to the flip chip containing a thermally conductive material.

10. 发明申请

US20060133985A1 Process and tubular reactor for recovery of chlorine from iron chlorides 审中-公开
标题翻译：用于从氯化铁回收氯的工艺和管式反应器
公开(公告)号：US20060133985A1
公开(公告)日：2006-06-22
申请号：US10538356
申请日：2003-12-12
申请人： Thomas Buller , Stephen Lyke , Aaron Becker , Stephan De La Veaux , Russell Diemer , James Dunson Jr. , James Tilton , David Zimmerman , Stephen Hallock
发明人： Thomas Buller , Stephen Lyke , Aaron Becker , Stephan De La Veaux , Russell Diemer , James Dunson Jr. , James Tilton , David Zimmerman , Stephen Hallock
IPC分类号： C01B7/00 , B01J8/04
CPC分类号： B01J19/088 , B01J19/02 , B01J19/2405 , B01J19/2415 , B01J19/242 , B01J19/26 , B01J2219/00094 , B01J2219/00135 , B01J2219/00139 , B01J2219/00157 , B01J2219/00159 , B01J2219/00247 , B01J2219/0277 , B01J2219/0883 , B01J2219/1946 , C01B7/03 , C22B1/08 , C22B34/1222 , Y02P10/23
摘要： The present invention relates to a process for recovering chlorine from a feed stream containing metal chlorides using a tubular reactor wherein a hot oxygen containing gas has an initial velocity such that the resulting velocity of the bulk gas formed from mixing the oxygen containing gas with the metal chloride feed stream and a scrubs feed stream is sufficient to remove wall deposits as fast as such deposits are formed.
摘要翻译：本发明涉及使用管式反应器从含有金属氯化物的进料流中回收氯的方法，其中含热氧气体具有初始速度，使得通过将含氧气体与金属混合而形成的主体气体的所得速度氯化物进料流和洗涤进料流足以除去形成这种沉积物的速度快地除去壁沉积物。

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