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    • 8. 发明授权
    • Nonvolatile semiconductor memory device and method of fabricating the same
    • 非易失性半导体存储器件及其制造方法
    • US08017990B2
    • 2011-09-13
    • US12497955
    • 2009-07-06
    • Hajime Nagano
    • Hajime Nagano
    • H01L29/788
    • H01L27/11519H01L27/11521H01L27/11524
    • A nonvolatile semiconductor memory device includes a gate insulating film formed on a semiconductor substrate, a first gate electrode corresponding to a memory cell transistor and a second gate electrode. The first gate electrode includes a floating gate electrode film, a first interelectrode insulating film and a control gate electrode film. The floating gate electrode film has a polycrystalline silicon film and the control gate electrode film having a silicide film. The second gate electrode includes a lower electrode film, a second interelectrode insulating film and an upper electrode film. The second interelectrode insulating film includes an opening. The lower electrode film includes a void below the opening of the second interelectrode insulating film. The upper electrode film includes a silicide film. The lower electrode film includes a polycrystalline silicon film and a silicide film which is located between the opening and the void.
    • 非易失性半导体存储器件包括形成在半导体衬底上的栅绝缘膜,对应于存储单元晶体管的第一栅电极和第二栅电极。 第一栅电极包括浮栅电极膜,第一电极间绝缘膜和控制栅电极膜。 浮栅电极膜具有多晶硅膜,并且控制栅电极膜具有硅化物膜。 第二栅电极包括下电极膜,第二电极间绝缘膜和上电极膜。 第二电极间绝缘膜包括开口。 下电极膜在第二电极间绝缘膜的开口下方具有空隙。 上电极膜包括硅化物膜。 下电极膜包括位于开口和空隙之间的多晶硅膜和硅化物膜。
    • 10. 发明授权
    • Method for manufacturing partial SOI substrates
    • 制造部分SOI衬底的方法
    • US07265017B2
    • 2007-09-04
    • US11168914
    • 2005-06-29
    • Hajime NaganoIchiro Mizushima
    • Hajime NaganoIchiro Mizushima
    • H01L21/331
    • H01L27/1203H01L21/84
    • There is closed a semiconductor device which comprises a semiconductor substrate including an SOI region where a first insulating film is buried, and a non-SOI region, the semiconductor substrate being provided with a boundary region formed between the SOI region and the non-SOI region and having a second insulating film buried therein, the second insulating film being inclined upward from the SOI region side toward the non-SOI region side, the second insulating film having a thickness smaller than the thickness of the first insulating film and being tapered from the SOI region side to the non-SOI region side, a pair of element isolating insulating regions separately formed in the non-SOI region of semiconductor substrate and defining element regions, a pair of impurity diffusion regions formed in the element regions, and a gate electrode formed via a gate insulating film in the element region of the semiconductor substrate.
    • 封闭半导体器件,其包括半导体衬底,该半导体衬底包括掩埋有第一绝缘膜的SOI区域和非SOI区域,该半导体衬底设置有形成在SOI区域与非SOI区域之间的边界区域 并且具有埋置在其中的第二绝缘膜,所述第二绝缘膜从所述SOI区域侧向非SOI区域侧向上倾斜,所述第二绝缘膜的厚度小于所述第一绝缘膜的厚度, SOI区域侧,分离地形成在半导体衬底的非SOI区域中并限定元件区域的一对元件隔离绝缘区域,形成在元件区域中的一对杂质扩散区域以及栅极电极 通过半导体衬底的元件区域中的栅极绝缘膜形成。