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    • 4. 发明申请
    • HIGH-PERFORMANCE ELECTROSTATIC CLAMP COMPRISING A RESISTIVE LAYER, MICRO-GROOVES, AND DIELECTRIC LAYER
    • 包含电阻层,微孔和电介质层的高性能静电夹
    • WO2004095477A3
    • 2005-02-10
    • PCT/US2004012549
    • 2004-04-21
    • AXCELIS TECH INCKELLERMAN PETERBENVENISTE VICTORPHARAND MICHELSTONE DALE
    • KELLERMAN PETERBENVENISTE VICTORPHARAND MICHELSTONE DALE
    • H01L21/683H02N13/00H01L21/67
    • H01L21/6833H02N13/00
    • An electrostatic clamp for securing a semiconductor wafer during processing. The electrostatic clamp comprises a base member, a resistive layer, a dielectric layer including a gas pressure distribution micro-groove network, a gas gap positioned between a backside of a semiconductor wafer and the dielectric layer, and a pair of high voltage electrodes positioned between the resistive layer and the dielectric layer. The electrostatic clamp can further comprise at least one ground electrode positioned between the resistive layer and the dielectric layer that provides shielding for the gas pressure distribution micro-groove network. The electrostatic clamp is characterized by a heat transfer coefficient of greater than or about 200 mW/Kcm , a response time of less than or about 1 second, and gas leakage of less than or about 0.5 sccm. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. .
    • 一种用于在加工过程中固定半导体晶片的静电夹。 静电夹具包括基底构件,电阻层,包括气体压力分布微槽网络的电介质层,位于半导体晶片的背面与电介质层之间的气隙,以及一对位于 电阻层和电介质层。 静电夹具还可以包括位于电阻层和电介质层之间的至少一个接地电极,其为气体压力分布微槽网络提供屏蔽。 静电夹具的特征在于传热系数大于或约200mW / Kcm 2,响应时间小于或约1秒,气体泄漏小于或约0.5sccm。 要强调的是,该摘要被提供以符合要求抽象的规则,允许搜索者或其他读者快速确定技术公开内容的主题。 提交它的理解是,它不会用于解释或限制权利要求的范围或含义。 。