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1. 发明授权

US07322227B2 Tank container with electronic monitoring device 有权
标题翻译：带集装箱的电子监控装置
公开(公告)号：US07322227B2
公开(公告)日：2008-01-29
申请号：US11192261
申请日：2005-07-28
申请人： Shouqin Zhou , Xiaochun Chen , Rong Liu , Wenqing Yuan , Chenguang Zhou , Jianbin Zhu
发明人： Shouqin Zhou , Xiaochun Chen , Rong Liu , Wenqing Yuan , Chenguang Zhou , Jianbin Zhu
IPC分类号： G01M3/04 , B67D1/16
CPC分类号： G01M3/186
摘要： A tank container with electronic monitoring device includes a tank barrel and a container frame supporting the same. The tank barrel includes a valve assembly and a valve assembly protection box. The electronic monitoring device is installed inside the valve assembly protection box, or on a sealing surface of the tank barrel, or in a range of the container frame outside the tank barrel. The electronic monitoring device includes a sensor for detecting a leakage condition of the cargoes contained in the tank container and transmitting an information data related to the leakage condition, and a data processing module connected with the sensor for processing the data. The invention can be used for detecting a sealing condition of a sealing surface and an illegal open of a lid of the valve assembly protection box as well as for realizing a global tracking, whereby ensuring a safe transport for containers.
摘要翻译：具有电子监控装置的储罐容器包括罐筒和支撑该容器的容器框架。罐筒包括阀组件和阀组件保护盒。电子监控装置安装在阀组件保护箱内，或者在罐筒的密封表面上，或者在罐筒外部的容器框架的范围内。该电子监视装置包括：传感器，用于检测容纳在罐箱中的货物的泄漏状况，并发送与泄漏状况相关的信息数据;以及数据处理模块，与传感器连接以处理数据。本发明可用于检测密封面的密封状态和阀组件保护盒的盖子的非法打开以及实现全局跟踪，从而确保容器的安全运输。

2. 发明申请

US20060021423A1 Tank container with electronic monitoring device 有权
标题翻译：带集装箱的电子监控装置
公开(公告)号：US20060021423A1
公开(公告)日：2006-02-02
申请号：US11192261
申请日：2005-07-28
申请人： Shouqin Zhou , Xiaochun Chen , Rong Liu , Wenqing Yuan , Chenguang Zhou , Jianbin Zhu
发明人： Shouqin Zhou , Xiaochun Chen , Rong Liu , Wenqing Yuan , Chenguang Zhou , Jianbin Zhu
IPC分类号： G01M3/04
CPC分类号： G01M3/186
摘要： A tank container with electronic monitoring device includes a tank barrel and a container frame supporting the same. The tank barrel includes a valve assembly and a valve assembly protection box. The electronic monitoring device is installed inside the valve assembly protection box, or on a sealing surface of the tank barrel, or in a range of the container frame outside the tank barrel. The electronic monitoring device includes a sensor for detecting a leakage condition of the cargoes contained in the tank container and transmitting an information data related to the leakage condition, and a data processing module connected with the sensor for processing the data. The invention can be used for detecting a sealing condition of a sealing surface and an illegal open of a lid of the valve assembly protection box as well as for realizing a global tracking, whereby ensuring a safe transport for containers.
摘要翻译：具有电子监控装置的储罐容器包括罐筒和支撑该容器的容器框架。罐筒包括阀组件和阀组件保护盒。电子监控装置安装在阀组件保护箱内，或者在罐筒的密封表面上，或者在罐筒外部的容器框架的范围内。该电子监视装置包括：传感器，用于检测容纳在罐箱中的货物的泄漏状况，并发送与泄漏状况相关的信息数据;以及数据处理模块，与传感器连接以处理数据。本发明可用于检测密封面的密封状态和阀组件保护盒的盖子的非法打开以及实现全局跟踪，从而确保容器的安全运输。

3. 发明授权

US08839081B2 Rate matching and de-rate matching on digital signal processors 有权
标题翻译：数字信号处理器的速率匹配和去速率匹配
公开(公告)号：US08839081B2
公开(公告)日：2014-09-16
申请号：US13609034
申请日：2012-09-10
申请人： Yuan Li , Julien Nicolas , Jianbin Zhu
发明人： Yuan Li , Julien Nicolas , Jianbin Zhu
IPC分类号： H03M13/00 , H04L1/00
CPC分类号： H04L1/0068
摘要： Provided are devices, systems and methods for rate matching and de-rate matching on digital signal processors. In one embodiment, a device for rate matching and de-rate matching, includes an interface for receiving a plurality of blocks of data and digital signal processor configured to pre-compute permutation parameters common to the plurality of blocks, wherein the plurality of blocks are subject to a set of given puncturing parameters and receive a set of pre-computed puncturing thresholds. For one or more blocks in the plurality of blocks, the DSP computes a block signature from the pre-computed puncturing thresholds; matches the block signature to one of a set of pre-computed zone signatures, derives a zone index corresponding to the one pre-computed zone signature, and applies pre-computed permutation and puncturing transformations corresponding to the zone index to the block.
摘要翻译：提供了用于数字信号处理器上的速率匹配和去速率匹配的设备，系统和方法。在一个实施例中，用于速率匹配和去速率匹配的设备包括用于接收多个数据块的接口和被配置为预先计算多个块共同的置换参数的数字信号处理器，其中多个块是受制于一组给定的打孔参数并接收一组预先计算的穿刺阈值。对于多个块中的一个或多个块，DSP从预先计算的穿孔阈值计算块签名; 将块签名与一组预先计算的区域签名中的一个匹配，导出与一个预先计算的区域签名相对应的区域索引，并将对应于区域索引的预先计算的置换和删截变换应用于该块。

4. 发明申请

US20110150146A1 METHODS AND APPARATUS FOR TAIL TERMINATION OF TURBO DECODING 有权
标题翻译： TURBO解码尾端的方法和装置
公开(公告)号：US20110150146A1
公开(公告)日：2011-06-23
申请号：US12975343
申请日：2010-12-21
申请人： Jianbin Zhu
发明人： Jianbin Zhu
IPC分类号： H04L27/06
CPC分类号： H04L1/005 , H04L1/006
摘要： Methods and apparatus for trellis termination of a turbo decoder are disclosed which simplifies the hardware implementation. As a given example, backward state metrics, which is required to be calculated with forward state metric as part of a constitute decoding, are initialized with pre-calculated values based on input bits.
摘要翻译：公开了用于turbo解码器的网格终止的方法和装置，其简化了硬件实现。作为一个给定的例子，用作为构成解码的一部分的以前向状态度量计算的后向状态度量被基于输入比特的预先计算的值初始化。

5. 发明申请

US20180267930A1 Circular Reconfiguration for Reconfigurable Parallel Processor 审中-公开
公开(公告)号：US20180267930A1
公开(公告)日：2018-09-20
申请号：US15919709
申请日：2018-03-13
申请人： Jianbin Zhu , Yuan Li
发明人： Jianbin Zhu , Yuan Li
IPC分类号： G06F15/80 , G06F9/30 , G06F9/38
摘要： Processors, systems and methods are provided for thread level parallel processing. A processor may comprise a plurality of reconfigurable units that may include a plurality of processing elements (PEs) and a plurality of memory ports (MPs) for the plurality of PEs to access a memory unit. Each of the plurality of reconfigurable units may comprise a configuration buffer and a reconfiguration counter. The processor may further comprise a sequencer coupled to the configuration buffer of each of the plurality of reconfigurable units and configured to distribute a plurality of configurations to the plurality of reconfigurable units for the plurality of PEs and the plurality of MPs to execute a sequence of instructions.

6. 发明申请

US20130007555A1 METHODS, SYSTEMS, AND APPARATUS FOR TAIL TERMINATION OF TURBO DECODING 有权
标题翻译：方法，系统和装置TURBO解码的尾部终止
公开(公告)号：US20130007555A1
公开(公告)日：2013-01-03
申请号：US13608905
申请日：2012-09-10
申请人： Jianbin Zhu , Yuan Li , Tao Zhang
发明人： Jianbin Zhu , Yuan Li , Tao Zhang
IPC分类号： H03M13/05 , G06F11/10
CPC分类号： H04L1/005 , H03M13/1515 , H03M13/29 , H03M13/2957 , H04L1/006
摘要： Methods and apparatus for tail termination are provided that include a decoder that includes a processor configured to a forward state metric and a backward state metric wherein each iteration of an initial state of the backward state metric is fetched from a memory and is pre-computed without feedback from a decoding iteration. Each decoding iteration is substantially identical, and the backward state metric that is pre-computed is used for a subsequent iteration. The decoder may include a turbo decoder or a radix-4 decoder.
摘要翻译：提供了用于尾端终止的方法和装置，其包括解码器，该解码器包括被配置为向前状态度量和后向状态量度的处理器，其中，从存储器取出后向状态量度的初始状态的每次迭代，并且在没有来自解码迭代的反馈。每个解码迭代基本相同，并且预先计算的向后状态度量用于后续迭代。解码器可以包括turbo解码器或radix-4解码器。

7. 发明申请

US20130007382A1 RATE MATCHING AND DE-RATE MATCHING ON DIGITAL SIGNAL PROCESSORS 有权
标题翻译：数字信号处理器的速率匹配和速率匹配
公开(公告)号：US20130007382A1
公开(公告)日：2013-01-03
申请号：US13609034
申请日：2012-09-10
申请人： Yuan Li , Julien Nicolas , Jianbin Zhu
发明人： Yuan Li , Julien Nicolas , Jianbin Zhu
IPC分类号： G06F12/00
CPC分类号： H04L1/0068
摘要： Provided are devices, systems and methods for rate matching and de-rate matching on digital signal processors. In one embodiment, a device for rate matching and de-rate matching, includes an interface for receiving a plurality of blocks of data and digital signal processor configured to pre-compute permutation parameters common to the plurality of blocks, wherein the plurality of blocks are subject to a set of given puncturing parameters and receive a set of pre-computed puncturing thresholds. For one or more blocks in the plurality of blocks, the DSP computes a block signature from the pre-computed puncturing thresholds; matches the block signature to one of a set of pre-computed zone signatures, derives a zone index corresponding to the one pre-computed zone signature, and applies pre-computed permutation and puncturing transformations corresponding to the zone index to the block.
摘要翻译：提供了用于数字信号处理器上的速率匹配和去速率匹配的设备，系统和方法。在一个实施例中，用于速率匹配和去速率匹配的设备包括用于接收多个数据块的接口和被配置为预先计算多个块共同的置换参数的数字信号处理器，其中多个块是受制于一组给定的打孔参数并接收一组预先计算的穿刺阈值。对于多个块中的一个或多个块，DSP从预先计算的穿孔阈值计算块签名; 将块签名与一组预先计算的区域签名中的一个匹配，导出与一个预先计算的区域签名相对应的区域索引，并将对应于区域索引的预先计算的置换和删截变换应用于该块。

8. 发明申请

US20180267932A1 Shared Memory Structure for Reconfigurable Parallel Processor 审中-公开
公开(公告)号：US20180267932A1
公开(公告)日：2018-09-20
申请号：US15919752
申请日：2018-03-13
申请人： Jianbin Zhu , Yuan Li
发明人： Jianbin Zhu , Yuan Li
IPC分类号： G06F15/80 , G06F9/30
摘要： Processors, systems and methods are provided for thread level parallel processing. A processor may comprise a plurality of processing elements (PEs) each having a plurality of arithmetic logic units (ALUs) that are configured to execute a same instruction in parallel threads and a plurality of memory ports (MPs) for the plurality of PEs to access a memory unit. Each of the plurality of MPs may comprise an address calculation unit configured to generate respective memory addresses for each thread to access a common area in the memory unit.

9. 发明申请

US20180267931A1 Private Memory Structure for Reconfigurable Parallel Processor 审中-公开
公开(公告)号：US20180267931A1
公开(公告)日：2018-09-20
申请号：US15919727
申请日：2018-03-13
申请人： Yuan Li , Jianbin Zhu
发明人： Yuan Li , Jianbin Zhu
IPC分类号： G06F15/80 , G06F9/30 , G06F12/0815
摘要： Processors, systems and methods are provided for thread level parallel processing. A processor may comprise a plurality of processing elements (PEs) and a plurality of memory ports (MPs) for the plurality of PEs to access a memory unit. Each PE may have a plurality of arithmetic logic units (ALUs) that are configured to execute a same instruction in parallel threads. Each of the plurality of MPs may comprise an address calculation unit configured to generate respective memory addresses for each thread to access a different memory bank in the memory unit.

10. 发明申请

US20180267809A1 Static Shared Memory Access for Reconfigurable Parallel Processor 审中-公开
公开(公告)号：US20180267809A1
公开(公告)日：2018-09-20
申请号：US15919774
申请日：2018-03-13
申请人： Yuan Li , Jianbin Zhu
发明人： Yuan Li , Jianbin Zhu
IPC分类号： G06F9/38 , G06F9/30 , G06F9/34 , G06F13/16
CPC分类号： G06F15/8023 , G06F9/3001 , G06F9/3004 , G06F9/3009 , G06F9/30098 , G06F9/34 , G06F9/3808 , G06F9/3867 , G06F9/3885 , G06F12/0815 , G06F13/1673 , G06F2212/1021 , Y02D10/14
摘要： Processors, systems and methods are provided for thread level parallel processing. A processor may comprise a plurality of processing elements (PEs) that each may comprise an arithmetic logic unit (ALU), a data buffer associated with the ALU, and an indicator associated with the data buffer to indicate whether a piece of data inside the data buffer is to be reused for repeated execution of a same instruction as a pipeline stage.

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