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1. 发明专利

AU2022203072A1 Node grouping method, apparatus and electronic device 未知
公开(公告)号：AU2022203072A1
公开(公告)日：2022-11-24
申请号：AU2022203072
申请日：2022-05-06
申请人： BEIJING BAIDU NETCOM SCIENCE TECHNOLOGY CO LTD
发明人： FANG KUN , DUAN RUNYAO
IPC分类号： G06N10/20 , H04L12/02
摘要： This disclosure provides a node grouping method and apparatus and an electronic device, and relates to the field of evolutionary computing in quantum computing. The method includes: obtaining a graph of nodes to be grouped, wherein the graph of nodes to be grouped includes M first nodes; constructing a QAOA (quantum approximate optimization algorithm) node circuit graph based on the graph of nodes to be grouped, the node circuit graph including K nodes and the K nodes including the M first nodes; generating a quantum entangled state of the node circuit graph, the quantum entangled state including target quantum states of the K nodes in the node circuit graph; performing a group measurement on each of the K nodes sequentially based on the target quantum states of the K nodes in the node circuit graph to obtain a target group measurement result of the M first nodes; determining a grouping output result of the M first nodes based on the target group measurement result of the M first nodes. According to the technology provided in this disclosure, the problem of the relatively poor evolutionary effect of the QAOA for node grouping is solved, and the evolutionary effect of the QAOA is improved, thus the effect of node grouping is improved. [Figure. 1] node grouping apparatus 601 obtaining module construction module generation module group measurement module determination module Fig. 6 701 702 703 computing ROM RAM unit I/O interface 706 707 708 709 input output storage communication unit unit unit unit Fig. 7

2. 发明专利

IL298483A Quantum coupler facilitating suppression of zz interactions between qubits 未知
公开(公告)号：IL298483A
公开(公告)日：2023-01-01
申请号：IL29848322
申请日：2022-11-22
申请人： IBM CORP , AARON FINCK , JOHN BLAIR , APRIL CARNIOL , OLIVER DIAL , MUIR KUMPH
发明人： AARON FINCK , JOHN BLAIR , APRIL CARNIOL , OLIVER DIAL , MUIR KUMPH
IPC分类号： G06N10/00 , G06N10/20 , G06N10/40 , G06N10/70 , H03K19/0175 , H03K19/195
摘要： Devices and/or computer-implemented methods to facilitate ZZ cancellation between qubits are provided. According to an embodiment, a device can comprise a coupler device that operates in a first oscillating mode and a second oscillating mode. The device can further comprise a first superconducting qubit coupled to the coupler device based on a first oscillating mode structure corresponding to the first oscillating mode and based on a second oscillating mode structure corresponding to the second oscillating mode. The device can further comprise a second superconducting qubit coupled to the coupler device based on the first oscillating mode structure and the second oscillating mode structure.

3. 发明专利

CA3075163C QUANTUM ERROR CORRECTION 未知
公开(公告)号：CA3075163C
公开(公告)日：2022-11-01
申请号：CA3075163
申请日：2017-09-13
申请人： GOOGLE LLC
发明人： FOWLER AUSTIN GREIG
IPC分类号： G06F15/16 , G06F12/0802 , G06F13/38 , G06N10/20 , G06N10/70 , H03M13/47 , H04B10/70
摘要： Apparatus for quantum error correction is disclosed. The apparatus includes an array of processing cores, each processing core comprising: a processor on a first chip; and a processor cache on the first chip; and a bus for interconnecting neighbouring processing cores in the array of processing cores; wherein each processing core includes: control code which, when executed by the processor, causes the processor to access a processor cache of at least one neighbouring processing core.

4. 发明专利

CA3011415C DECODING-BASED METHOD FOR QUANTUM CIRCUIT OPTIMIZATION 未知
公开(公告)号：CA3011415C
公开(公告)日：2023-01-03
申请号：CA3011415
申请日：2017-01-25
申请人： MOSCA MICHELE
发明人： MOSCA MICHELE , AMY MATTHEW EDWARD JOSEPH
IPC分类号： G06N10/20 , B82Y10/00 , G06N10/60
摘要： Quantum circuits include quantum gates that require a certain amount of physical resources. It is desirable to reduce the number of certain quantum gates in order to improve the hardware efficiency of a quantum circuit. A system and a method are provided for synthesizing a quantum circuit that includes the operations of determining an ordered set or vector of phase coefficients and specifying a linear permutation. The operations also include determining a sequence of CNOT and Rz gates using the set of phase coefficients and the linear permutation, such that the number of Rz gates is reduced.

5. 发明专利

IL298631A Quantum simulation with trapped ions in a gradient field 未知
公开(公告)号：IL298631A
公开(公告)日：2023-01-01
申请号：IL29863122
申请日：2022-11-28
申请人： YEDA RES AND DEVELOPMENT CO LTD
IPC分类号： B82Y20/00 , G06F30/20 , G06N10/20 , G06N10/40
摘要： Method and apparatus for quantum simulation, based on a linear chain of ions. A gradient field is imposed to break the symmetry of the ion chain, and bichromatic driving fields are applied to bridge the energy gaps induced by the gradient field and thereby establish resonance couplings among the ions according to their relative positions in the gradient field. The combination of the gradient field and the bichromatic driving fields implement excitation hopping to simulate a variety of topologies according to higher¬ dimensional Hamiltonians and boundary conditions, including ring, torus, Mobius strip configurations, as well as topologies with periodic boundary conditions. In particular synthetic gauge fields allow simulation of magnetic flux.

6. 发明专利

AU2022279464A1 Method of processing quantum circuit, electronic device, and storage medium 未知
公开(公告)号：AU2022279464A1
公开(公告)日：2022-12-15
申请号：AU2022279464
申请日：2022-11-30
申请人： BEIJING BAIDU NETCOM SCIENCE TECHNOLOGY CO LTD
发明人： LIU SHUSEN , WU DANXIANG , LV SHENJIN
IPC分类号： G06F30/327 , G06N10/20
摘要： The present application provides a method of processing a quantum circuit, an electronic device, and a storage medium. A specific implementation solution includes: determining a program logic graph of the quantum circuit, wherein the program logic graph indicates a plurality of logic bits and a logic relationship between the plurality of logic bits; mapping at least part of the plurality of logic bits to corresponding physical bits in a plurality of physical bits in the quantum circuit according to measurement fidelities of the plurality of physical bits and the logic relationship, so as to obtain an initial mapping relationship; and obtaining a target mapping relationship from the plurality of logic bits to the plurality of physical bits according to the initial mapping relationship and a chip coupling graph of the quantum circuit.

7. 发明专利

CA3161314A1 FAST QUANTUM CIRCUIT SIMULATIONS WITH PARALLEL TASK-BASED TENSOR NETWORK CONTRACTION 未知
公开(公告)号：CA3161314A1
公开(公告)日：2022-12-02
申请号：CA3161314
申请日：2022-06-01
申请人： XANADU QUANTUM TECH INC
发明人： DHAND ISH , VINCENT TREVOR , QI HAOYU
IPC分类号： G06N10/20
摘要： A method includes receiving a representation of a quantum circuit at a processor and identifying multiple contraction trees based on the representation of the quantum circuit. Each of the contraction trees represents a tensor network from a set of tensor networks. A first subset of multiple tasks, from a set of tasks associated with the plurality of contraction trees, is assigned to a first set of at least one compute device having a first type. A second subset of multiple tasks mutually exclusive of the first subset of multiple tasks is assigned to a second set of at least one compute device having a second type different from the first type. The quantum circuit is simulated by executing the first subset of tasks via the first set of at least one compute device and executing the second subset of tasks via the second set of at least one compute device.

8. 发明专利

IL295674A Pre-screening and tuning heterojunctions for topological quantum computer 未知
公开(公告)号：IL295674A
公开(公告)日：2022-10-01
申请号：IL29567422
申请日：2022-08-16
申请人： MICROSOFT TECHNOLOGY LICENSING LLC
IPC分类号： G06F15/82 , G06N10/00 , G06N10/20 , G06N10/40
摘要： A method to evaluate a semiconductor-superconductor heterojunction for use in a qubit register of a topological quantum computer includes measuring a radio-frequency (RF) junction admittance of the semiconductor-superconductor heterojunction to obtain mapping data; finding by analysis of the mapping data one or more regions of a parameter space consistent with an unbroken topological phase of the semiconductor-superconductor heterojunction; measuring a sub-RF conductance including a non-local conductance of the semiconductor-superconductor heterojunction in each of the one or more regions of the parameter space, to obtain refinement data; and finding by analysis of the refinement data a boundary of the unbroken topological phase in the parameter space and a topological gap of the semiconductor-superconductor heterojunction for at least one of the one or more regions of the parameter space.

9. 发明公开

CN117998973A 制造约瑟夫森结的方法审中-公开
公开(公告)号：CN117998973A
公开(公告)日：2024-05-07
申请号：CN202410057056.4
申请日：2017-09-18
申请人：谷歌有限责任公司
发明人： B·J·伯克特
IPC分类号： H10N60/01 , H01L21/027 , G06N10/20
摘要：一种减少使用两步沉积工艺制造的量子信息处理器件中的结的结电阻变化的方法。在一个方面，一种方法包括：提供电介质基板(208)；在电介质基板上形成第一抗蚀剂层(210)；在第一抗蚀剂层上形成第二抗蚀剂层(212)；以及在第二抗蚀剂层上形成第三抗蚀剂层(214)。第一抗蚀剂层包括延伸穿过第一抗蚀剂层的厚度的第一开口(216)，第二抗蚀剂层包括在第一开口之上对准并延伸穿过第二抗蚀剂层的厚度的第二开口(218)，第三抗蚀剂层包括在第二开口之上对准并延伸穿过第三抗蚀剂层的厚度的第三开口(220)。

10. 发明公开

CN117993920A 风险账户识别方法、装置、设备、存储介质及产品审中-公开
公开(公告)号：CN117993920A
公开(公告)日：2024-05-07
申请号：CN202410218978.9
申请日：2024-02-27
申请人：中国银联股份有限公司
发明人：艾博轩 , 汤韬 , 郑建宾 , 高鹏飞 , 杨燕明
IPC分类号： G06Q20/40 , G06F18/22 , G06N10/20
摘要：本申请公开了一种风险账户识别方法、装置、设备、存储介质及产品。该风险账户识别方法包括获取多个账户之间的转账信息，并根据转账信息构建以账户为节点、账户之间的转账关系为连接边的目标转账网络图，多个账户中包括至少一个已知风险账户；基于目标转账网络图，对目标节点进行量子态制备处理，得到多个第一量子比特，目标节点为目标转账网络图中的任一节点；利用量子神经网络，基于多个第一量子比特对目标节点进行图嵌入处理，得到与目标节点对应的图嵌入特征信息；根据目标转账网络图中多个节点分别对应的图嵌入特征信息，确定目标账户对应的节点与已知风险账户对应的节点之间的相似度，目标账户包括多个账户中除已知风险账户之外的账户；根据相似度从目标账户中识别风险账户。根据本申请实施例，可以充分利用已知风险账户，发挥其应用的价值，有效降低计算复杂度，提高风险账户的识别效率和识别准确率。

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