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91. 发明授权

US07750456B2 Printed circuit board and method of manufacturing semiconductor package using the same 有权
标题翻译：印刷电路板及使用其制造半导体封装的方法
公开(公告)号：US07750456B2
公开(公告)日：2010-07-06
申请号：US11651670
申请日：2007-01-10
申请人： Hyoung-ho Roh
发明人： Hyoung-ho Roh
IPC分类号： H01L23/06
CPC分类号： C23C26/00 , H01L23/13 , H01L23/145 , H01L23/4922 , H01L23/49838 , H01L23/562 , H01L23/585 , H01L24/48 , H01L24/97 , H01L2224/06136 , H01L2224/32225 , H01L2224/48091 , H01L2224/4824 , H01L2224/73215 , H01L2224/8592 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01038 , H01L2924/01082 , H01L2924/01087 , H01L2924/14 , H01L2924/15311 , H01L2924/3011 , H05K1/0271 , H05K3/005 , H05K2201/09781 , H05K2201/09909 , Y10T428/24917 , H01L2224/85 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Provided is a printed circuit board having a structure that can prevent the generation of cracks around a rectangular hole and a method of manufacturing a printed circuit board for a semiconductor package. The printed circuit board includes a base substrate in which at least one window slit is formed, a plurality of circuit patterns formed at least on a side surface of the base substrate, a protective layer formed on the base substrate and the circuit patterns, and a crack preventive layer that is formed along at least a portion of edges of the window slit and is not formed at least on the circuit patterns.
摘要翻译：提供了具有可以防止在矩形孔周围产生裂纹的结构的印刷电路板以及制造用于半导体封装的印刷电路板的方法。印刷电路板包括基底，其中形成至少一个窗口，至少在基底基板的侧表面上形成的多个电路图案，形成在基底基板上的保护层和电路图案，以及防裂层，沿着窗口的至少一部分边缘形成，并且至少不形成在电路图案上。

92. 发明申请

US20100164084A1 SEMICONDUCTOR DEVICE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME 有权
标题翻译：半导体器件和半导体器件包括它们
公开(公告)号：US20100164084A1
公开(公告)日：2010-07-01
申请号：US12347365
申请日：2008-12-31
申请人： Jun-Ho LEE , Hyung-Dong Lee , Hyun-Seok Kim
发明人： Jun-Ho LEE , Hyung-Dong Lee , Hyun-Seok Kim
IPC分类号： H01L23/06 , H01L23/52 , H01G4/228 , H01L25/16
CPC分类号： H01L23/5223 , H01G4/232 , H01G4/30 , H01G4/33 , H01G4/40 , H01L23/3128 , H01L23/481 , H01L23/642 , H01L25/0657 , H01L2224/05001 , H01L2224/05009 , H01L2224/05568 , H01L2224/0557 , H01L2224/056 , H01L2224/16146 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06541 , H01L2924/00014 , H01L2924/15311 , H01L2924/19104 , H01L2224/05099
摘要： Provided is a semiconductor device capable of removing a power ground grid noise using a small area. The semiconductor device includes a first chip including at least one decoupling capacitor; and a second semiconductor chip stacked over the first semiconductor chip, including internal circuits.
摘要翻译：提供能够使用小面积去除电力接地电网噪声的半导体器件。该半导体器件包括：包括至少一个去耦电容器的第一芯片; 以及堆叠在第一半导体芯片上的第二半导体芯片，包括内部电路。

93. 发明申请

US20100155098A1 COMPONENT PACKAGE FOR MAINTAINING SAFE OPERATING TEMPERATURE OF COMPONENTS 有权
标题翻译：用于维护组件的安全操作温度的组件包
公开(公告)号：US20100155098A1
公开(公告)日：2010-06-24
申请号：US12690882
申请日：2010-01-20
申请人： Mei Sun , Pascal Champagne
发明人： Mei Sun , Pascal Champagne
IPC分类号： H05K5/06 , H05K1/16 , H01L23/06
CPC分类号： G01D9/005 , G01D11/24 , H01L21/67253
摘要： A thermally insulated electronic component package and an instrument suitable for process conditions in a high temperature environment are disclosed. The component package includes a thin electronic component, a thermally insulating outer enclosure, and an insert made of a thermally insulating material that is sized and shaped to fit within the outer enclosure. The insert includes an inner cavity sized and shaped to receive the thin electronic component. In the instrument, the outer enclosure can be configured to mount to a substrate.
摘要翻译：公开了一种适用于高温环境中的工艺条件的绝热电子部件封装和仪器。组件封装包括薄电子部件，隔热外壳和由绝热材料制成的插入件，其尺寸和形状适于装配在外壳内。插入件包括尺寸和形状适于接收薄电子部件的内腔。在仪器中，外壳可以配置为安装到基板。

94. 发明授权

US07724523B2 Electric power converter and mounting structure of semiconductor device 有权
公开(公告)号：US07724523B2
公开(公告)日：2010-05-25
申请号：US12073871
申请日：2008-03-11
申请人： Hiroshi Ishiyama
发明人： Hiroshi Ishiyama
IPC分类号： H05K7/20 , H01L23/06
CPC分类号： H02M7/003 , H01L23/4012 , H01L23/473 , H01L25/072 , H01L25/16 , H01L25/18 , H01L2224/32245 , H01L2224/33181 , H01L2924/13055 , H01L2924/00
摘要： An electric power converter has a main circuit section including a semiconductor module and a cooling device; a control circuit substrate section electrically connected to a signal terminal of the semiconductor module, and having a control circuit; and a power wiring section connected to a main electrode terminal of the semiconductor module. The main circuit section is interposed between the control circuit substrate section and the power wiring section.

95. 发明申请

US20100032776A1 DESTRUCTOR INTEGRATED CIRCUIT CHIP, INTERPOSER ELECTRONIC DEVICE AND METHODS 有权
标题翻译：集成电路芯片，插电器电子设备及方法
公开(公告)号：US20100032776A1
公开(公告)日：2010-02-11
申请号：US11043626
申请日：2005-01-25
申请人： Cuong V. Pham , David E. Chubin , Aaron D. Kuan , Colleen L. Khalifa
发明人： Cuong V. Pham , David E. Chubin , Aaron D. Kuan , Colleen L. Khalifa
IPC分类号： H01L23/06
CPC分类号： H01L23/57 , H01L23/3128 , H01L24/16 , H01L24/48 , H01L2224/16225 , H01L2224/16227 , H01L2224/48227 , H01L2224/48465 , H01L2224/73265 , H01L2924/00014 , H01L2924/09701 , H01L2924/14 , H01L2924/15192 , Y10S257/922 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor chip includes a first integrated circuit chip and a depression substrate attached to the integrated circuit chip, wherein the integrated circuit chip and the depression substrate define a cavity therebetween. The semiconductor chip also includes a stress sensitive material located in the cavity and a chemical located in the cavity, wherein detection of tampering causes a reaction by the chemical such that the semiconductor chip is at least partially destroyed.
摘要翻译：半导体芯片包括附接到集成电路芯片的第一集成电路芯片和凹陷基板，其中集成电路芯片和凹陷基板在其间限定空腔。半导体芯片还包括位于空腔中的应力敏感材料和位于空腔中的化学物质，其中篡改的检测导致化学品的反应，使得半导体芯片至少部分地被破坏。

96. 发明授权

US07652385B2 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US07652385B2
公开(公告)日：2010-01-26
申请号：US12180597
申请日：2008-07-28
申请人： Kazunori Kuramoto
发明人： Kazunori Kuramoto
IPC分类号： H01L23/29 , H01L23/12 , H01L23/06 , H01L23/04
CPC分类号： H01L23/3135 , H01L21/56 , H01L23/16 , H01L23/315 , H01L24/48 , H01L2224/48247 , H01L2224/48465 , H01L2924/00014 , H01L2924/14 , H01L2924/16235 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Aiming at providing a semiconductor device advanced in performance of transistors, and improved in reliability, a semiconductor device of the present invention has a semiconductor element, a frame component provided over the semiconductor element, while forming a cavity therein, and a molding resin layer covering around the frame component, wherein the frame component is composed of a plurality of resin films (a first resin film and a second resin film) containing the same resin, and the cavity allows the active region of the semiconductor element to expose therein.
摘要翻译：本发明的半导体器件旨在提供晶体管性能先进的半导体器件，提高可靠性，其中半导体元件，设置在半导体元件上的框架元件，同时在其中形成空腔，并且模制树脂层覆盖围绕框架部件，其中框架部件由包含相同树脂的多个树脂膜（第一树脂膜和第二树脂膜）构成，并且该空腔允许半导体元件的有源区域在其中露出。

97. 发明申请

US20090321925A1 INJECTION MOLDED METAL IC PACKAGE STIFFENER AND PACKAGE-TO-PACKAGE INTERCONNECT FRAME 审中-公开
标题翻译：注射成型金属IC封装强化器和包装到包装互连框架
公开(公告)号：US20090321925A1
公开(公告)日：2009-12-31
申请号：US12165374
申请日：2008-06-30
申请人： Charles A. Gealer , Sabina J. Houle
发明人： Charles A. Gealer , Sabina J. Houle
IPC分类号： H01L23/06
CPC分类号： H01L23/16 , H01L25/0657 , H01L25/18 , H01L2225/06517 , H01L2225/06541 , H01L2225/06582 , H01L2924/0002 , H01L2924/1433 , H01L2924/00
摘要： In some embodiments, an injection molded metal IC package stiffener and package-to-package interconnect frame is presented. In this regard, an apparatus is introduced comprising a microelectronic device package substrate, a microelectronic device coupled with a top surface of the package substrate, and an injection-molded, metal stiffener coupled with the package substrate, wherein the stiffener includes a central opening and at least partially surrounds the microelectronic device, and wherein the stiffener includes a plurality of vias that each couple a contact on a bottom surface of the stiffener with a respective contact on a top surface of the stiffener. Other embodiments are also disclosed and claimed.
摘要翻译：在一些实施例中，提出了注射成型的金属IC封装加强件和封装到封装互连框架。在这方面，引入了包括微电子器件封装衬底，与封装衬底的顶表面耦合的微电子器件以及与封装衬底耦合的注射成型的金属加强件的装置，其中加强件包括中心开口和至少部分地围绕所述微电子器件，并且其中所述加强件包括多个通孔，每个通孔将所述加强件的底表面上的接触件与所述加强件的顶表面上的相应接触件联接。还公开并要求保护其他实施例。

98. 发明授权

US07598604B2 Low profile semiconductor package 失效
标题翻译：薄型半导体封装
公开(公告)号：US07598604B2
公开(公告)日：2009-10-06
申请号：US11551082
申请日：2006-10-19
申请人： Ryoji Matsushima
发明人： Ryoji Matsushima
IPC分类号： H01L23/06 , H01R9/00
CPC分类号： H01L23/49537 , H01L23/3107 , H01L23/49503 , H01L23/49551 , H01L23/49575 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/03 , H01L25/105 , H01L25/18 , H01L2224/05554 , H01L2224/32014 , H01L2224/32145 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/4826 , H01L2224/49175 , H01L2224/73215 , H01L2224/73265 , H01L2225/06562 , H01L2225/1029 , H01L2225/1041 , H01L2225/1058 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/10161 , H01L2924/15311 , H01L2924/181 , H01L2924/18165 , H01L2924/19107 , H01L2924/00 , H01L2924/01026 , H01L2924/01028 , H01L2224/48227 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A first semiconductor element and a second semiconductor element each have an electrode forming surface with an electrode pad thereon. The first semiconductor element and the second semiconductor element are stacked to expose each electrode pad and bonded while facing the electrode forming surfaces each other. The electrode pads of the first and second semiconductor elements are connected to the first and second connection terminals via bonding wires. A metal circuit board including the first and second connection terminals, and the first and second semiconductor elements are sealed by a sealing material such that parts of the respective connection terminals expose.
摘要翻译：第一半导体元件和第二半导体元件各自具有电极形成表面，其上具有电极焊盘。堆叠第一半导体元件和第二半导体元件，以暴露每个电极焊盘并在面对电极形成表面的同时结合。第一和第二半导体元件的电极焊盘通过接合线连接到第一和第二连接端子。包括第一和第二连接端子的金属电路板以及第一和第二半导体元件被密封材料密封，使得各个连接端子的部分露出。

99. 发明申请

US20090166830A1 Metallic cover of miniaturization module 有权
标题翻译：小型化模块金属盖
公开(公告)号：US20090166830A1
公开(公告)日：2009-07-02
申请号：US12003520
申请日：2007-12-28
申请人： Kuan-Hsing Li , Kuo-Hsien Liao
发明人： Kuan-Hsing Li , Kuo-Hsien Liao
IPC分类号： H01L23/06
CPC分类号： H01L23/04 , H01L2224/16225 , H01L2224/32245 , H01L2224/73253 , H01L2924/16151 , H01L2924/19105
摘要： A metallic cover of a miniaturization module includes a substrate, a SMD chip unit and a metallic cover, the metallic cover embracing the SMD chip unit and having at least one sizing hole and a plurality of venting holes, the venting holes being disposed around the sizing hole, and the sizing hole and the venting holes being positioned above the SMD chip unit so that glue portions fill up slits between the metallic cover and the SMD chip unit. The venting holes stop the glue portion from running over the second chip unit. The glue-filled slits between the top lid and the SMD chip unit provides a strong support to prevent any deformation of the metallic cover when the metallic cover is tested and processed.
摘要翻译：小型化模块的金属盖包括基板，SMD芯片单元和金属盖，所述金属盖包围SMD芯片单元并且具有至少一个施胶孔和多个排气孔，所述排气孔围绕所述尺寸孔，并且定径孔和排气孔位于SMD芯片单元上方，使得胶合部分填充金属盖和SMD芯片单元之间的狭缝。排气孔停止胶水部分运行在第二个芯片单元上。在顶盖和SMD芯片单元之间的胶合的狭缝提供了强大的支撑，以防止在金属盖被测试和处理时金属盖的任何变形。

100. 发明授权

US07535089B2 Monolithically integrated light emitting devices 有权
标题翻译：单片集成发光器件
公开(公告)号：US07535089B2
公开(公告)日：2009-05-19
申请号：US11591657
申请日：2006-11-01
申请人： Eugene A. Fitzgerald
发明人： Eugene A. Fitzgerald
IPC分类号： H01L23/06
CPC分类号： H01L27/14601 , H01L21/0245 , H01L21/0251 , H01L21/76254 , H01L21/8258 , H01L27/0605 , H01L27/144 , H01L27/1446 , H01L27/14683 , H01L27/15 , H01L27/156 , H01L31/0328 , H01L31/143 , H01L31/162 , H01L2924/0002 , Y10S438/933 , H01L2924/00
摘要： Methods and structures for monolithically integrating monocrystalline silicon and monocrystalline non-silicon materials and devices are provided. In one structure, a monolithically integrated semiconductor device structure comprises a silicon substrate and a first monocrystalline semiconductor layer disposed over the silicon substrate, wherein the first monocrystalline semiconductor layer has a lattice constant different from a lattice constant of relaxed silicon. The structure further includes an insulating layer disposed over the first monocrystalline semiconductor layer in a first region and a monocrystalline silicon layer disposed over the insulating layer in the first region. The structure includes at least one silicon-based electronic device including an element including at least a portion of the monocrystalline silicon layer. The structure also includes a second monocrystalline semiconductor layer disposed over at least a portion of the first monocrystalline semiconductor layer in a second region and absent from the first region, wherein the second monocrystalline semiconductor layer has a lattice constant different from the lattice constant of relaxed silicon. The structure includes at least one III-V light-emitting device including an active region including at least a portion of the second monocrystalline semiconductor layer.
摘要翻译：提供了单晶硅和单晶非硅材料和器件单片集成的方法和结构。在一种结构中，单片集成半导体器件结构包括硅衬底和设置在硅衬底上的第一单晶半导体层，其中第一单晶半导体层具有与松弛硅的晶格常数不同的晶格常数。该结构还包括设置在第一区域中的第一单晶半导体层上的绝缘层和设置在第一区域中的绝缘层上的单晶硅层。该结构包括至少一个硅基电子器件，其包括至少部分单晶硅层的元件。该结构还包括第二单晶半导体层，其设置在第二区域中的第一单晶半导体层的至少一部分上且不存在于第一区域中，其中第二单晶半导体层具有与松弛硅的晶格常数不同的晶格常数。该结构包括至少一个III-V发光器件，其包括包括第二单晶半导体层的至少一部分的有源区。

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