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    • 15. 发明授权
    • Address translation in I2C data communications system
    • I2C数据通信系统中的地址转换
    • US09448960B2
    • 2016-09-20
    • US13828511
    • 2013-03-14
    • LINEAR TECHNOLOGY CORPORATION
    • Daniel James Eddleman
    • G06F13/42
    • G06F13/4291
    • A novel readdressing circuit is provided for supporting data communications over a data line and a clock line between at least one master device and multiple slave devices. For example, the master device and the multiple slave devices may be configured to communicate over an I2C bus including the data line and the clock line. The readdressing circuit has a data input node for receiving a data signal transferred over the data line and including an address word produced by the master device, and a data output node coupled to the multiple slave devices. The readdressing circuit also includes an address generator and an address transmit detections circuit. The address generator is configured for storing a multi-bit fixed offset value. The address generator is responsive to the address word at the data input node for generating multiple unique addresses for the multiple slave devices. The address transmit detection circuit is configured for enabling the address generator to generate the multiple unique addresses at the data output node when the address word is detected at the data input node, and for preventing an output signal of the address generator from being supplied to the data output node when no address word is detected at the data input node.
    • 提供了一种新颖的再现电路,用于支持数据线上的数据通信和至少一个主设备与多个从设备之间的时钟线。 例如,主设备和多个从设备可以被配置为通过包括数据线和时钟线的I2C总线进行通信。 再现电路具有数据输入节点,用于接收通过数据线传输的数据信号,并包括由主设备产生的地址字,以及耦合到多个从设备的数据输出节点。 再现电路还包括地址发生器和地址发送检测电路。 地址发生器配置为存储多位固定偏移值。 地址发生器响应于数据输入节点处的地址字,用于为多个从设备生成多个唯一地址。 地址发送检测电路被配置为使得地址发生器能够在数据输出节点处检测到地址字时在数据输出节点处产生多个唯一地址,并且防止地址发生器的输出信号被提供给 数据输出节点在数据输入节点没有检测到地址字时。
    • 16. 发明申请
    • CONTROL ARCHITECTURE WITH IMPROVED TRANSIENT RESPONSE
    • 具有改进的瞬态响应的控制结构
    • US20160248327A1
    • 2016-08-25
    • US15048511
    • 2016-02-19
    • LINEAR TECHNOLOGY CORPORATION
    • Jian LI
    • H02M3/158
    • H02M3/158H02M1/08H02M3/1584H02M2001/0009H02M2003/1566
    • A power supply system includes a power source; a load device configured to receive power from the power source; and a power interface device coupled to the power source and the load device and configured to change a first voltage provided by the power source to a second voltage for operating the load device. The power interface device include a main switching converter configured to operate at a first switching frequency and source low frequency current to the load device and an auxiliary switching converter coupled in parallel with the main switching converter and configured to operate at a second and different switching frequency and source fast transient high frequency current to the load device.
    • 电源系统包括电源; 被配置为从所述电源接收电力的负载装置; 以及耦合到所述电源和所述负载装置并且被配置为将由所述电源提供的第一电压改变为用于操作所述负载装置的第二电压的电力接口装置。 电力接口装置包括:主开关转换器,被配置为以负载装置的第一开关频率和源低频电流工作,以及与主开关转换器并联耦合的辅助开关转换器,并且被配置为在第二和不同的开关频率 并向负载设备提供快速瞬态高频电流源。
    • 17. 发明授权
    • Level-shifting amplifier
    • 电平转换放大器
    • US09374050B1
    • 2016-06-21
    • US14610597
    • 2015-01-30
    • LINEAR TECHNOLOGY CORPORATION
    • Joseph AdutJohn Perry Myers
    • H03F3/45
    • H03F3/45502H03F3/45201H03F2203/45081H03F2203/45082
    • A differential amplifier may, when connected to a positive or negative supply voltage and to a ground voltage, provide a differential pair of outputs signals at a differential output that are an amplification of a differential pair of input signals at a differential input. A differential input stage may receive the differential pair of input signals from the differential input and may include a first transistor associated with one of the input signals and a second transistor associated with the other input signal. A differential output stage may generate the differential pair of output signals at the differential output and may include a third transistor associated with one of the output signals and a fourth transistor associated with the other output signal. The first, second, third, and fourth transistors may be all P type or all N type. The differential pair of output signals may have a common mode that is: near the ground voltage when the first, second, third, and fourth transistors are all N type and the supply voltage is positive with respect to the ground voltage; near the supply voltage when the first, second, third, and fourth transistors are all P type and the supply voltage is positive with respect to the ground voltage; near the ground voltage when the first, second, third, and fourth transistors are all P type and the supply voltage is negative with respect to the ground voltage; or near the supply voltage when the first, second, third, and fourth transistors are all N type and the supply voltage is negative with respect to the ground voltage.
    • 当差分放大器连接到正或负电源电压和接地电压时,可以在差分输出端提供差分输出信号差分输出信号,差分输出信号是差分输入端的差分输入信号对的放大。 差分输入级可以接收来自差分输入的差分输入信号对,并且可以包括与输入信号之一相关联的第一晶体管和与另一输入信号相关联的第二晶体管。 差分输出级可以在差分输出处产生差分输出信号对,并且可以包括与输出信号之一相关联的第三晶体管和与另一输出信号相关联的第四晶体管。 第一,第二,第三和第四晶体管可以是全P型或全N型。 输出信号的差分对可以具有共模,即当第一,第二,第三和第四晶体管都为N型时,接地电压附近,并且电源电压相对于接地电压为正; 当第一,第二,第三和第四晶体管都为P型并且电源电压相对于接地电压为正时在电源电压附近; 当第一,第二,第三和第四晶体管都为P型并且电源电压相对于接地电压为负时,接地电压附近; 或者当第一,第二,第三和第四晶体管都为N型并且电源电压相对于接地电压为负时,接近电源电压。
    • 18. 发明授权
    • Voltage generator with current source compensated for an error current operable over a wide voltage range
    • 具有电流源的电压发生器补偿了可在宽电压范围内工作的误差电流
    • US09348347B2
    • 2016-05-24
    • US13969865
    • 2013-08-19
    • Linear Technology Corporation
    • Robert DobkinAmitkumar Pravin Patel
    • H02M3/156G05F1/575G05F1/565H02M1/08G05F1/56G05F1/573H02M3/158
    • G05F1/56G05F1/565G05F1/573G05F1/575H02M1/08H02M3/156H02M3/1588
    • In one embodiment, a regulator circuit for generating a regulated output voltage Vout has an error amplifier using a pair of bipolar transistors at its front end. The error amplifier compares the regulated output voltage to a reference voltage Vref. A precision current source draws a first current through a user-selected set resistance to generate the desired Vref. The regulator circuit controls a power stage to cause Vout to be equal to Vref. The base current into one of the bipolar transistors normally distorts the current through the set resistance. A base current compensation circuit is coupled to the current source to adjust the first current by a value equal to the base current to offset the base current. Therefore, Vref is not affected by the base current. The error amplifier may be in a linear regulator or a switching regulator. The compensation circuit may be used in other applications.
    • 在一个实施例中,用于产生调节输出电压Vout的调节器电路在其前端具有使用一对双极晶体管的误差放大器。 误差放大器将稳压输出电压与参考电压Vref进行比较。 精密电流源通过用户选择的设定电阻画出第一电流以产生所需的Vref。 调节器电路控制功率级以使Vout等于Vref。 进入一个双极晶体管的基极电流通常使电流扭曲设定电阻。 基极电流补偿电路耦合到电流源,以将第一电流调整为等于基极电流的值以抵消基极电流。 因此,Vref不受基极电流的影响。 误差放大器可以在线性调节器或开关调节器中。 补偿电路可用于其他应用。