专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

11. 发明申请

US20060113682A1 Semiconductor component having plate and stacked dice 有权
标题翻译：半导体元件具有板和堆叠的骰子
公开(公告)号：US20060113682A1
公开(公告)日：2006-06-01
申请号：US11333662
申请日：2006-01-17
申请人： Warren Farnworth , Alan Wood , William Hiatt , James Wark , David Hembree , Kyle Kirby , Pete Benson
发明人： Warren Farnworth , Alan Wood , William Hiatt , James Wark , David Hembree , Kyle Kirby , Pete Benson
IPC分类号： H01L23/48 , H01L23/52 , H01L23/04
CPC分类号： H01L21/561 , B33Y70/00 , B33Y80/00 , H01L21/563 , H01L21/76898 , H01L23/3114 , H01L23/481 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/97 , H01L25/0652 , H01L25/0657 , H01L25/50 , H01L2221/68331 , H01L2224/02372 , H01L2224/0401 , H01L2224/05111 , H01L2224/05118 , H01L2224/05124 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05164 , H01L2224/05166 , H01L2224/05169 , H01L2224/05171 , H01L2224/05178 , H01L2224/0518 , H01L2224/05181 , H01L2224/05184 , H01L2224/05559 , H01L2224/05569 , H01L2224/05572 , H01L2224/05624 , H01L2224/05644 , H01L2224/05664 , H01L2224/05666 , H01L2224/13005 , H01L2224/13006 , H01L2224/13009 , H01L2224/13024 , H01L2224/13099 , H01L2224/16145 , H01L2224/73204 , H01L2224/97 , H01L2225/06513 , H01L2225/06524 , H01L2225/06541 , H01L2225/06582 , H01L2225/06596 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01039 , H01L2924/01042 , H01L2924/01046 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H01L2924/15312 , H01L2924/18161 , H01L2924/19015 , H01L2924/19041 , H01L2924/351 , H01L2924/207 , H01L2224/05552 , H01L2924/00 , H01L2924/00014 , H01L2924/013
摘要： A semiconductor component includes a base die and a secondary die stacked on and bonded to the base die. The base die includes conductive vias which form an internal signal transmission system for the component, and allow the circuit side of the secondary die to be bonded to the back side of the base die. The component also includes an array of terminal contacts on the circuit side of the base die in electrical communication with the conductive vias. The component can also include an encapsulant on the back side of the base die, which substantially encapsulates the secondary die, and a polymer layer on the circuit side of the base die which functions as a protective layer, a rigidifying member and a stencil for forming the terminal contacts. A method for fabricating the component includes the step of bonding singulated secondary dice to base dice on a base wafer, or bonding a secondary wafer to the base wafer, or bonding singulated secondary dice to singulated base dice.
摘要翻译：半导体部件包括基模和层叠在基模上的二次模。基模具包括形成用于部件的内部信号传输系统的导电通孔，并允许二次管芯的电路侧接合到基座的后侧。该组件还包括与导电通孔电连通的基座芯片的电路侧上的端子触点阵列。该组件还可以包括在基模的背侧上的密封剂，其基本上封装次模，以及在用作保护层的基模的电路侧上的聚合物层，用于形成的用于固化的模板终端接触。一种用于制造该部件的方法包括将单个二次骰子接合到基底晶片上的基底骰子上，或将次晶片接合到基底晶片，或将单个二次骰子接合到单个基体骰子的步骤。

12. 发明申请

US20060046471A1 Methods for forming vias of varying lateral dimensions and semiconductor components and assemblies including same 有权
标题翻译：用于形成具有不同横向尺寸的通孔的方法以及包括其的半导体部件和组件
公开(公告)号：US20060046471A1
公开(公告)日：2006-03-02
申请号：US10928598
申请日：2004-08-27
申请人： Kyle Kirby , Warren Farnworth
发明人： Kyle Kirby , Warren Farnworth
IPC分类号： H01L21/4763
CPC分类号： H01L21/76898 , H01L23/3114 , H01L23/3677 , H01L23/481 , H01L25/0657 , H01L2224/16 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06565 , H01L2225/06589 , H01L2924/00011 , H01L2924/00014 , H05K1/115 , H05K2201/09563 , H05K2201/09845 , H05K2203/0733 , H01L2224/0401
摘要： Methods for forming vias are disclosed. The methods include providing a substrate having a first surface and an opposing, second surface. A first opening and a second opening are formed in a substrate such that the first opening and the second opening are in communication with each other. A portion of the first opening and the second opening are filled with a conductive material. Semiconductor devices, including the vias of the present invention, are also disclosed. A method of forming semiconductor components, semiconductor components and assemblies resulting therefrom, and an electronic system, including the vias of the present invention, are further disclosed.
摘要翻译：公开了形成通孔的方法。所述方法包括提供具有第一表面和相对的第二表面的基底。第一开口和第二开口形成在基板中，使得第一开口和第二开口彼此连通。第一开口和第二开口的一部分填充有导电材料。还公开了包括本发明的通孔的半导体器件。还公开了一种形成半导体部件，由其产生的半导体部件和组件以及包括本发明的通孔的电子系统的方法。

13. 发明申请

US20050275084A1 Compliant contact pin assembly and card system 有权
标题翻译：符合接触针组件和卡片系统
公开(公告)号：US20050275084A1
公开(公告)日：2005-12-15
申请号：US11152513
申请日：2005-06-14
申请人： Kyle Kirby , Warren Farnworth , James Wark , William Hiatt , David Hembree , Alan Wood
发明人： Kyle Kirby , Warren Farnworth , James Wark , William Hiatt , David Hembree , Alan Wood
IPC分类号： G01R1/073 , H01L21/66 , H01L23/48 , H01L23/498 , H01L23/58 , H01R13/24 , H05K3/32 , H05K3/40 , H05K7/06 , H05K7/10
CPC分类号： G01R1/0735 , G01R1/07314 , H01L23/13 , H01L23/481 , H01L23/49811 , H01L23/49827 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/16235 , H01L2924/00014 , H01L2924/09701 , H01L2924/15311 , H01L2924/3511 , H01R12/714 , H01R13/24 , H01R2201/20 , H05K3/326 , H05K7/1069 , H05K2201/0314 , H05K2201/09036 , H05K2201/10378 , Y10T29/49165 , Y10T29/49174 , Y10T29/49204 , Y10T29/49222 , H01L2224/05599
摘要： A compliant contact pin assembly and a contactor card system are provided. The compliant contact pin assembly includes a contact pin formed from a portion of a substrate with the contact pin compliantly held suspended within the substrate by a compliant coupling structure. The suspension within the substrate results in a compliant deflection orthogonal to the plane of the substrate. The contact pin assembly is formed by generally thinning the substrate around the contact pin location and then specifically thinning the substrate immediately around the contact pin location for forming a void. The contact pin is compliantly coupled, in one embodiment by compliant coupling material, and in another embodiment by compliantly flexible portions of the substrate.
摘要翻译：提供了柔性接触销组件和接触器卡系统。柔性接触销组件包括由基板的一部分形成的接触销，其中触头销顺从地保持通过柔性联接结构悬挂在基板内。衬底内的悬浮液导致与衬底的平面垂直的柔顺偏转。接触销组件通过使基板围绕接触销位置大体变薄而形成，然后特别地使基板在接触销位置周围特别地变薄以形成空隙。在一个实施例中，接触销被顺从地联接，在一个实施例中通过柔性耦合材料，并且在另一个实施例中，通过柔性柔性部分的衬底。

14. 发明申请

US20050275048A1 Microelectronic imagers and methods of packaging microelectronic imagers 有权
标题翻译：微电子成像器和包装微电子成像器的方法
公开(公告)号：US20050275048A1
公开(公告)日：2005-12-15
申请号：US10867352
申请日：2004-06-14
申请人： Warren Farnworth , Sidney Rigg , William Hiatt , Kyle Kirby , Peter Benson , James Wark , Alan Wood , David Hembree , Salman Akram , Charles Watkins
发明人： Warren Farnworth , Sidney Rigg , William Hiatt , Kyle Kirby , Peter Benson , James Wark , Alan Wood , David Hembree , Salman Akram , Charles Watkins
IPC分类号： H01L21/00 , H01L23/02 , H01L23/48 , H01L27/14 , H01L27/146 , H01L31/00 , H01L31/0203 , H01L31/0232
CPC分类号： H01L27/14618 , H01L23/481 , H01L24/48 , H01L31/0203 , H01L31/02325 , H01L2224/48227 , H01L2924/00014 , H01L2924/01046 , H01L2924/01077 , H01L2924/01078 , H01L2924/04941 , H01L2924/12042 , H01L2924/14 , H01L2924/15174 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Microelectronic imagers and methods for packaging microelectronic imagers are disclosed herein. In one embodiment, a microelectronic imaging unit can include a microelectronic die, an image sensor, an integrated circuit electrically coupled to the image sensor, and a bond-pad electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends through the die and is in contact with the bond-pad. The interconnect can include a passage extending completely through the substrate and the bond-pad with conductive fill material at least partially disposed in the passage. An electrically conductive support member is carried by and projects from the bond-pad. A cover over the image sensor is coupled to the support member.
摘要翻译：本文公开了微电子成像器和用于封装微电子成像器的方法。在一个实施例中，微电子成像单元可以包括微电子管芯，图像传感器，电耦合到图像传感器的集成电路以及电耦合到集成电路的接合焊盘。导电晶片互连延伸穿过管芯并且与焊盘接触。互连可以包括完全延伸穿过基底的通道和具有至少部分地设置在通道中的导电填充材料的接合垫。导电支撑构件由接合垫承载和突出。图像传感器上的盖连接到支撑构件。

15. 发明申请

US20050194180A1 Compliant contact pin assembly, card system and methods thereof 失效
标题翻译：符合接触针组件，卡片系统及其方法
公开(公告)号：US20050194180A1
公开(公告)日：2005-09-08
申请号：US10791195
申请日：2004-03-02
申请人： Kyle Kirby , Warren Farnworth , James Wark , William Hiatt , David Hembree , Alan Wood
发明人： Kyle Kirby , Warren Farnworth , James Wark , William Hiatt , David Hembree , Alan Wood
IPC分类号： G01R1/073 , H01L21/66 , H01L23/48 , H01L23/498 , H01L23/58 , H01R13/24 , H05K3/32 , H05K3/40 , H05K7/06 , H05K7/10
CPC分类号： G01R1/0735 , G01R1/07314 , H01L23/13 , H01L23/481 , H01L23/49811 , H01L23/49827 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/16235 , H01L2924/00014 , H01L2924/09701 , H01L2924/15311 , H01L2924/3511 , H01R12/714 , H01R13/24 , H01R2201/20 , H05K3/326 , H05K7/1069 , H05K2201/0314 , H05K2201/09036 , H05K2201/10378 , Y10T29/49165 , Y10T29/49174 , Y10T29/49204 , Y10T29/49222 , H01L2224/05599
摘要： A compliant contact pin assembly, a contactor card, a testing system and methods for making and testing are provided. A compliant contact pin assembly includes a contact pin formed from a portion of a substrate with the contact pin compliantly held suspended within the substrate by a compliant coupling structure. The suspension within the substrate results in a compliant deflection orthogonal to the plane of the substrate. The contact pin assembly is formed by generally thinning the substrate around the contact pin location and then specifically thinning the substrate immediately around the contact pin location for forming a void. The contact pin is compliantly coupled, in one embodiment by compliant coupling material and in another embodiment by compliantly flexible portions of the substrate.
摘要翻译：提供了兼容的接触针组件，接触器卡，测试系统以及制造和测试方法。柔性接触销组件包括由衬底的一部分形成的接触针，其中触发销通过柔性耦合结构顺应地保持悬挂在衬底内。衬底内的悬浮液导致与衬底的平面垂直的柔顺偏转。接触销组件通过使基板围绕接触销位置大体变薄而形成，然后特别地使基板在接触销位置周围特别地变薄以形成空隙。在一个实施例中，接触销被顺从地联接，在一个实施例中通过柔性耦合材料并且在另一个实施例中通过柔性柔性部分的基底。

16. 发明申请

US20050186790A1 METHODS OF FABRICATING INTERCONNECTS FOR SEMICONDUCTOR COMPONENTS 有权
标题翻译：制作半导体元器件互连的方法
公开(公告)号：US20050186790A1
公开(公告)日：2005-08-25
申请号：US10784074
申请日：2004-02-20
申请人： Kyle Kirby , Shuang Meng , Garo Derderian
发明人： Kyle Kirby , Shuang Meng , Garo Derderian
IPC分类号： H01L21/768 , H01L23/48 , H01L21/4763 , H01L21/44 , H01L23/58 , H01L29/10
CPC分类号： C23C16/34 , C23C16/45525 , C23C18/1608 , C23C18/1879 , C23C18/36 , H01L21/28562 , H01L21/288 , H01L21/76898 , H01L23/481 , H01L24/11 , H01L24/13 , H01L2224/0231 , H01L2224/02372 , H01L2224/03002 , H01L2224/0401 , H01L2224/13009 , H01L2224/13024 , H01L2224/13099 , H01L2224/13111 , H01L2924/0001 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/12042 , H01L2924/14 , H01L2924/00014 , H01L2924/00
摘要： In one aspect, the invention encompasses a method of fabricating an interconnect for a semiconductor component. A semiconductor substrate is provided, and an opening is formed which extends entirely through the substrate. A first material is deposited along sidewalls of the opening at a temperature of less than or equal to about 200° C. The deposition can comprise one or both of atomic layer deposition and chemical vapor deposition, and the first material can comprise a metal nitride. A solder-wetting material is formed over a surface of the first material. The solder-wetting material can comprise, for example, nickel. Subsequently, solder is provided within the opening and over the solder-wetting material.
摘要翻译：一方面，本发明包括制造用于半导体部件的互连的方法。提供半导体衬底，并且形成完全贯穿衬底的开口。第一种材料在小于或等于约200℃的温度下沿着开口的侧壁沉积。沉积可以包括原子层沉积和化学气相沉积中的一个或两个，并且第一材料可以包括金属氮化物。在第一材料的表面上形成焊料润湿材料。焊料润湿材料可以包括例如镍。随后，在开口内和焊料润湿材料之上提供焊料。

17. 发明申请

US20050127928A1 Semiconductor interconnect having semiconductor spring contacts 失效
标题翻译：具有半导体弹簧触点的半导体互连
公开(公告)号：US20050127928A1
公开(公告)日：2005-06-16
申请号：US11044941
申请日：2005-01-27
申请人： Kyle Kirby
发明人： Kyle Kirby
IPC分类号： G01R1/04 , G01R1/073 , G01R31/02
CPC分类号： G01R1/06711 , G01R1/0483 , G01R1/07314 , Y10T29/49117 , Y10T29/49147 , Y10T29/49149 , Y10T29/49151
摘要： An interconnect for testing a semiconductor component includes a substrate, and interconnect contacts on the substrate configured to electrically engage component contacts on the component. The interconnect contacts include flexible spring segments defined by grooves in the substrate, shaped openings in the substrate, or shaped portions of the substrate. The spring segments are configured to flex to exert spring forces on the component contacts, and to compensate for variations in the size or planarity of the component contacts. The interconnect can be configured to test wafer sized components, or to test die sized components. A test method includes the steps of providing the interconnect with the interconnect contacts, and electrically engaging the component contacts under a biasing force from the spring segments. A wafer level test system includes the interconnect mounted to a testing apparatus such as a wafer probe handler. A die level test system includes the interconnect mounted to a test carrier for discrete components.
摘要翻译：用于测试半导体部件的互连件包括衬底，以及被配置为电接合部件上的部件触点的衬底上的互连触点。互连触点包括由衬底中的凹槽限定的柔性弹簧段，衬底中的成形开口或衬底的成形部分。弹簧段构造成弯曲以在部件触点上施加弹簧力，并且补偿部件触头的尺寸或平面度的变化。互连可以配置为测试晶片尺寸的组件，或者测试模具尺寸的组件。一种测试方法包括以下步骤：在互连触点之间提供互连，并且在来自弹簧段的偏压力下使部件触点电接合。晶片级测试系统包括安装到诸如晶片探测处理器的测试装置的互连。模具级测试系统包括安装到用于分立组件的测试载体的互连。

18. 发明申请

US20050101129A1 Methods of forming via plugs using an aerosol stream of particles to deposit conductive material 失效
标题翻译：使用气溶胶颗粒流形成通孔的方法以沉积导电材料
公开(公告)号：US20050101129A1
公开(公告)日：2005-05-12
申请号：US10999344
申请日：2004-11-30
申请人： Kyle Kirby
发明人： Kyle Kirby
IPC分类号： H01L21/285 , H01L21/768 , H01L21/44
CPC分类号： H01L21/76844 , H01L21/2855 , H01L21/76873 , H01L21/76874 , H01L21/76877 , H01L21/76882
摘要： An aerosol stream of particles of a conductive material is directed into a via of an integrated circuit device to deposit the conductive material within the via to form a via plug.
摘要翻译：导电材料的气溶胶流引导到集成电路器件的通孔中以将导电材料沉积在通孔内以形成通孔塞。

19. 发明申请

US20050077630A1 METHODS OF PLATING VIA INTERCONNECTS 有权
标题翻译：通过互连的方法
公开(公告)号：US20050077630A1
公开(公告)日：2005-04-14
申请号：US10682703
申请日：2003-10-09
申请人： Kyle Kirby , Warren Farnworth
发明人： Kyle Kirby , Warren Farnworth
IPC分类号： H01L21/288 , H01L21/768 , H01L23/48 , H01L23/52 , H01L21/4763 , H01L29/40
CPC分类号： H01L21/2885 , H01L21/76898 , H01L23/481 , H01L2224/02372 , H01L2224/0401 , H01L2224/05548 , H01L2224/13022 , H01L2224/13024 , H01L2224/131 , Y10S438/928 , H01L2924/014
摘要： Methods for filling high aspect ratio vias with conductive material. At least one high aspect ratio via is formed in the backside of a semiconductor substrate. The at least one via is closed at one end by a conductive element forming a conductive structure of the semiconductor substrate. The backside of the semiconductor substrate is exposed to an electroplating solution containing a conductive material in solution with the active surface semiconductor substrate isolated therefrom. An electric potential is applied across the conductive element through the electroplating solution and a conductive contact pad in direct or indirect electrical communication with the conductive element at the closed end of the at least one via (or forming such conductive element) to cause conductive material to electrochemically deposit from the electroplating solution and fill the at least one via. Semiconductor devices and in-process semiconductor devices are also disclosed.
摘要翻译：用导电材料填充高纵横比孔的方法。在半导体衬底的背面形成至少一个高宽比通孔。至少一个通孔在一端由形成半导体衬底的导电结构的导电元件封闭。将半导体衬底的背面暴露于含有与其分离的活性表面半导体衬底的溶液中的导电材料的电镀溶液。电导通过电镀溶液施加在导电元件上，导电接触焊盘在至少一个通孔的封闭端（或形成这种导电元件）与导电元件直接或间接电连通，以使导电材料从电镀溶液电化学沉积并填充至少一个通孔。还公开了半导体器件和工艺中半导体器件。

20. 发明授权

US08366852B2 Method of forming temporary carrier structure and associated release techniques 有权
标题翻译：形成临时载体结构和相关释放技术的方法
公开(公告)号：US08366852B2
公开(公告)日：2013-02-05
申请号：US13093672
申请日：2011-04-25
申请人： Kyle Kirby
发明人： Kyle Kirby
IPC分类号： B32B37/00
CPC分类号： H01L21/6835 , H01L2221/68318 , Y10T156/1064 , Y10T156/1082 , Y10T156/1111
摘要： A method of forming a temporary carrier structure is disclosed which includes forming a plurality of recesses in a carrier structure, the recesses extending to a depth that is less than a thickness of the carrier structure, forming a dissolvable material in the recesses and above a first surface of the carrier structure, securing a thin substrate above the first surface of the carrier structure using the dissolvable material to secure the thin substrate in place, performing at least one process operation on a second surface of the carrier structure to expose the dissolvable material in the recesses and contacting the exposed dissolvable material with a release agent so as to dissolve at least a portion of the dissolvable material.
摘要翻译：公开了一种形成临时载体结构的方法，其包括在载体结构中形成多个凹部，所述凹部延伸到小于载体结构的厚度的深度，在凹部中形成可溶解材料，并且在第一载体结构的表面，使用可溶解材料将薄衬底固定在载体结构的第一表面上，以将薄衬底固定就位，在载体结构的第二表面上进行至少一个工艺操作以将可溶解材料暴露在所述凹部和暴露的可溶解材料与脱模剂接触以溶解至少一部分可溶解材料。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式