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11. 发明授权

US6052015A Output stage for a low-current charge pump and demodulator integrating such a pump 失效
标题翻译：用于集成这种泵的低电流电荷泵和解调器的输出级
公开(公告)号：US6052015A
公开(公告)日：2000-04-18
申请号：US112607
申请日：1998-07-09
申请人： Eric Desbonnets
发明人： Eric Desbonnets
IPC分类号： H03D3/02 , H03L7/089 , H03K17/00
CPC分类号： H03L7/0895
摘要： The present invention discloses an output stage for a charge pump, mainly formed by transistors, for example, MOS-type transistors. This output stage includes capacitive elements intended to compensate charge/discharge phenomena of parasitic capacitances intrinsic to the transistors. A charge pump including such a stage may thus produce a low-value nominal current and enables to completely integrate a phase-locked loop demodulator.
摘要翻译：本发明公开了一种电荷泵的输出级，主要由晶体管形成，例如MOS型晶体管。该输出级包括用于补偿晶体管固有的寄生电容的充电/放电现象的电容元件。因此，包括这种级的电荷泵可以产生低值额定电流，并且能够完全集成锁相环解调器。

12. 发明授权

US5990733A Delay line ramp demodulator 失效
标题翻译：延迟线斜坡解调器
公开(公告)号：US5990733A
公开(公告)日：1999-11-23
申请号：US26062
申请日：1998-02-19
申请人： Ronald L. Mahany , Thomas J. Schuster
发明人： Ronald L. Mahany , Thomas J. Schuster
IPC分类号： H03D3/02
CPC分类号： H03D3/04
摘要： An integrated circuit includes a demodulator having delay circuitry and demodulation control circuitry that may be fully formed within a common integrated circuit. The delay circuitry receives an input signal and generates a delayed input signal. The demodulation control circuitry generates a demodulated output based upon the input signal and the delayed input signal that has a level that is proportional to, or a finction of, a period of a respective cycle of the input signal. The demodulation control circuitry includes pulse generation circuitry, pulse delay circuitry, pulse conversion circuitry and sampling circuitry. The pulse generation circuitry generates a signal pulse based upon the input signal and the delayed input signal with a duration that is proportional to at least one period of the input signal. The pulse delay circuitry generates a delayed signal pulse based upon the signal pulse. The pulse conversion circuitry generates a converted signal that has a level based upon the duration of the signal pulse. The sampling circuitry samples the converted signal based upon a sample pulse to generate the demodulated output based upon the level of the converted signal. The delay circuitry and pulse delay circuitry each include a plurality of cascaded semiconductive elements that, in combination, produce a desired delay duration.
摘要翻译：集成电路包括具有延迟电路和解调控制电路的解调器，其可以完全形成在公共集成电路内。延迟电路接收输入信号并产生延迟的输入信号。解调控制电路基于输入信号和延迟的输入信号产生解调输出，该输入信号具有与输入信号的相应周期的周期成比例的水平或功能。解调控制电路包括脉冲产生电路，脉冲延迟电路，脉冲转换电路和采样电路。脉冲产生电路基于输入信号和延迟的输入信号产生具有与输入信号的至少一个周期成比例的持续时间的信号脉冲。脉冲延迟电路基于信号脉冲产生延迟的信号脉冲。脉冲转换电路产生具有基于信号脉冲持续时间的电平的转换信号。采样电路基于采样脉冲对转换的信号进行采样，以基于转换信号的电平产生解调输出。延迟电路和脉冲延迟电路各自包括多个级联的半导体元件，其组合地产生期望的延迟持续时间。

13. 发明授权

US5850164A FM demodulation and frequency tuning for a phase-locked loop 失效
标题翻译： FM解调和频率调谐用于锁相环
公开(公告)号：US5850164A
公开(公告)日：1998-12-15
申请号：US861491
申请日：1997-05-22
申请人： Pascal Mellot
发明人： Pascal Mellot
IPC分类号： H04N5/60 , H03D3/02 , H03D3/24 , H03L7/087 , H03L7/099 , H03L7/107 , H03L7/113 , H04B1/26 , H03D3/06
CPC分类号： H03L7/107 , H03D3/241 , H03D3/245 , H03L7/099 , H03L7/113 , H03D2200/0027 , H03L2207/06 , H03L7/087
摘要： The invention provides a demodulation PLL wherein: the first position of a switch, which is controlled by a control circuit, respectively connects the outputs of a mixer and a LP filter to high gain and low gain inputs of an oscillator when frequency signals at the inputs of the mixer have not converged sufficiently, i.e. during the PLLs tuning mode; the second position of the switch respectively connects the outputs of the mixer and the LP filter to the low gain and high gain inputs of the oscillator when the frequency signals at the inputs of the mixer and the signal levels on the input and output of the filter have converged sufficiently, i.e. during the PLLs demodulation mode.
摘要翻译：本发明提供一种解调PLL，其中：由控制电路控制的开关的第一位置分别在混频器和LP滤波器的输出端连接到振荡器的高增益和低增益输入端，当输入端的频率信号的混频器没有充分收敛，即在PLL调谐模式期间; 当混频器输入端的频率信号和滤波器的输入和输出信号电平时，开关的第二位置分别将混频器和LP滤波器的输出端连接到振荡器的低增益和高增益输入已经充分收敛，即在PLL解调模式期间。

14. 发明授权

US5850161A Digital FM demodulator using pulse generators 失效
标题翻译：数字FM解调器采用脉冲发生器
公开(公告)号：US5850161A
公开(公告)日：1998-12-15
申请号：US773792
申请日：1996-12-24
申请人： Han-seung Rhie
发明人： Han-seung Rhie
IPC分类号： H03D3/00 , H03D3/04 , H03D3/02
CPC分类号： H03D3/04
摘要： A frequency modulation (FM) signal demodulating circuit having a simple structure using general digital devices is provided. The FM signal demodulating circuit according to the present invention includes a first pulse generator for generating a pulse signal having a predetermined pulse width at every rising edge of the input FM signal, a second pulse generator for generating a pulse signal having a predetermined pulse width at every falling edge of the input FM signal, a combining portion for combining the pulse signals generated in the first pulse generator and the second pulse generator, and a low-pass filter for performing a low-pass filtering operation by receiving a combined pulse signal generated in the combining portion and outputting a signal having a magnitude corresponding to the frequency of the input FM signal. The FM signal demodulating circuit according to the present invention has a simple structure.
摘要翻译：提供了使用通用数字设备具有简单结构的调频（FM）信号解调电路。根据本发明的FM信号解调电路包括：第一脉冲发生器，用于在输入FM信号的每个上升沿产生具有预定脉冲宽度的脉冲信号;第二脉冲发生器，用于产生具有预定脉冲宽度的脉冲信号输入FM信号的每个下降沿，用于组合在第一脉冲发生器中产生的脉冲信号和第二脉冲发生器的组合部分，以及低通滤波器，用于通过接收产生的组合脉冲信号来执行低通滤波操作并且输出具有与输入的FM信号的频率对应的幅度的信号。根据本发明的FM信号解调电路具有简单的结构。

15. 发明授权

US5793799A Switchable circuit for processing and demodulating digital and analog signals 失效
标题翻译：用于处理和解调数字和模拟信号的可切换电路
公开(公告)号：US5793799A
公开(公告)日：1998-08-11
申请号：US500162
申请日：1995-07-10
申请人： Veit Armbruster , Herbert Peusens , Gerd Siegel
发明人： Veit Armbruster , Herbert Peusens , Gerd Siegel
IPC分类号： H03D3/00 , H03D3/02 , H03L7/099 , H04L7/033 , H04L27/38 , H04N5/44 , H04N5/455 , H04N5/46 , H04L25/00 , H03D3/24 , H04L27/00
CPC分类号： H04N5/455 , H04N21/42638 , H04N5/4401 , H04N5/46
摘要： Components for analog or digital input signals are in each case connected by switchable means to a controllable oscillator. The switch condition of the switchable means is set automatically and/or manually as a function of the input signal.
摘要翻译：模拟或数字输入信号的组件在每种情况下都可通过可切换装置连接到可控振荡器。可切换装置的开关状态根据输入信号自动和/或手动设定。

16. 发明授权

US5787126A Detector and receiving and transmitting apparatus 失效
标题翻译：检测器和接收和发送装置
公开(公告)号：US5787126A
公开(公告)日：1998-07-28
申请号：US597708
申请日：1996-02-07
申请人： Kenji Itoh , Mitsuhiro Shimozawa , Kenji Kawakami , Noriharu Suematsu , Akio Iida
发明人： Kenji Itoh , Mitsuhiro Shimozawa , Kenji Kawakami , Noriharu Suematsu , Akio Iida
IPC分类号： H03D1/22 , H03B19/00 , H03C3/00 , H03D3/02 , H03D7/16 , H04B1/02 , H04B1/06 , H04B1/30 , H04L27/20 , H04L27/22 , H04L27/38
CPC分类号： H03D7/165 , H03B19/00
摘要： The detector comprises a first distributor for distributing a signal wave, a 45 degree shifter for shifting a local oscillation, a first even harmonic mixer and a second even harmonic mixer for generating a mixed wave between a double frequency wave of said local oscillation wave and said signal wave. The present invention can be used for increasing the accuracy and downsizing of quadrature mixer used in a receiving transmitting apparatus of a wireless communication system.
摘要翻译：检测器包括用于分配信号波的第一分配器，用于移位本地振荡的45度移位器，第一偶次谐波混合器和第二偶次谐波混合器，用于产生所述局部振荡波的双频波与所述局部振荡波的双频波之间的混合波信号波。本发明可以用于提高在无线通信系统的接收发送装置中使用的正交混频器的精度和小型化。

17. 发明授权

US5786726A Device of the phase-locked loop type for demodulating a frequency-modulated signal 失效
标题翻译：用于解调频率调制信号的锁相环类型的装置
公开(公告)号：US5786726A
公开(公告)日：1998-07-28
申请号：US741166
申请日：1996-10-29
申请人： Pascal Lemasson
发明人： Pascal Lemasson
IPC分类号： H04N5/455 , H03B1/00 , H03B5/12 , H03D3/02 , H03D3/24 , H03L7/099 , H03D3/00 , H03B5/08 , H03H11/48
CPC分类号： H03D3/241 , H03B5/1209 , H03B5/1231 , H03B5/1243 , H03B2200/0036 , H03B2200/0092 , H03B2201/02 , H03D2200/0019
摘要： Device of the phase-locked loop type for demodulating a frequency-modulated signal. Device for frequency demodulation, using a phase-locked loop. According to the invention, for linearizing the variation of the frequency of a local oscillator (11) as a function of its control signal (Vb), a variable capacitance (Cv) is formed by an electronic module (20) which supplies the equivalent of a capacitance whose variation as a function of the control voltage (Vb) has a linearity deviation which is established for compensating the linearity deviation of the frequency of the oscillator as a function of the value of the capacitance (Cv).
摘要翻译：用于解调频率调制信号的锁相环类型的装置。用于频率解调的装置，使用锁相环。根据本发明，为了将本地振荡器（11）的频率变化作为其控制信号（Vb）的函数进行线性化，可变电容（Cv）由电子模块（20）形成，电子模块（20）提供相当于作为控制电压（Vb）的函数的变化的电容具有作为用于补偿作为电容值（Cv）的函数的振荡器的频率的线性偏差而建立的线性偏差。

18. 发明授权

US5625319A FM demodulator for reception of satellite broadcasting 失效
标题翻译： FM解调器用于接收卫星广播
公开(公告)号：US5625319A
公开(公告)日：1997-04-29
申请号：US550677
申请日：1995-10-31
申请人： Kazuya Miki
发明人： Kazuya Miki
IPC分类号： H04N5/455 , H03D3/02 , H03D3/24 , H03L7/093 , H04B1/10 , H04N7/20 , H03D3/00
CPC分类号： H03D3/24 , H03D3/241
摘要： An FM demodulator demodulating an FM modulated input signal through a PLL circuit, which includes a phase comparator a loop filter, a DC amplifier, a BB amplifier, and a VCO, and outputting the demodulated signal further includes a feedback circuit connected in parallel to DC amplifier and having a resistance which is a function of an external control voltage. The feedback circuit may be connected in parallel to both DC amplifier and BB amplifier. A PIN diode is typically used as a resistance variable element in the feedback circuit.
摘要翻译：通过PLL电路解调FM调制输入信号的FM解调器，其包括相位比较器环路滤波器，DC放大器，BB放大器和VCO，并且输出解调信号还包括并联连接到DC的反馈电路并且具有作为外部控制电压的函数的电阻。反馈电路可以与DC放大器和BB放大器并联连接。 PIN二极管通常用作反馈电路中的电阻可变元件。

19. 发明授权

US5495194A High frequency multiplier 失效
标题翻译：高频倍增器
公开(公告)号：US5495194A
公开(公告)日：1996-02-27
申请号：US273788
申请日：1994-07-12
申请人： Hideo Sugawara
发明人： Hideo Sugawara
IPC分类号： H03C1/00 , G06G7/163 , H03D1/22 , H03D3/02 , H03D7/12 , H03D7/14 , G06G7/12 , H04B1/26
CPC分类号： G06G7/163 , H03D7/1433 , H03D7/1441 , H03D7/1458 , H03D7/12 , H03D7/125
摘要： A high frequency multiplier for use in modulation/demodulation circuits, frequency converters or the like. The high frequency multiplier is used at high frequency band, and has a simplified configuration. The high frequency multiplier is formed of a pair of first transistor and a second transistor which are connected differentially to each other; a pair of third and fourth transistors which are connected differentially to each other; a constant current source connected to emitters or sources of the first and second transistors; an impedance circuit connected between a node at which the collector or drain of the first transistor is connected to the emitter or source of the third transistor and a node at which the collector or drain of the second transistor is connected to the emitter or source of the fourth transistor; and a load impedance circuit connected to the collectors or drains of the third and fourth transistors. The third transistor or fourth transistor receives a first input signal at the base or gate, and the first transistor or second transistor receives a second input signal at the base or gate. An output signal having product information of the first input signal and the second input signal is outputted from the node at which the collectors or drains of the third and fourth transistors are connected to the load impedance circuit.
摘要翻译：用于调制/解调电路，变频器等的高频倍增器。高频倍频器在高频段使用，具有简化的配置。高频倍增器由彼此差分连接的一对第一晶体管和第二晶体管构成; 一对彼此差分连接的第三和第四晶体管; 连接到第一和第二晶体管的发射极或源极的恒流源; 连接在第一晶体管的集电极或漏极连接到第三晶体管的发射极或源极的节点和第二晶体管的集电极或漏极连接到第三晶体管的发射极或源极的节点之间的阻抗电路，第四晶体管; 以及连接到第三和第四晶体管的集电极或漏极的负载阻抗电路。第三晶体管或第四晶体管在基极或栅极接收第一输入信号，第一晶体管或第二晶体管在基极或栅极接收第二输入信号。具有第一输入信号和第二输入信号的产品信息的输出信号从第三和第四晶体管的集电极或漏极连接到负载阻抗电路的节点输出。

20. 发明授权

US5321726A Calibration of vector demodulator using statistical analysis 失效
标题翻译：使用统计分析校正矢量解调器
公开(公告)号：US5321726A
公开(公告)日：1994-06-14
申请号：US977735
申请日：1992-11-13
申请人： Karen Kafadar
发明人： Karen Kafadar
IPC分类号： H04L27/00 , H04L27/38 , H03D3/02
CPC分类号： H04L27/3809 , H04L2027/0016
摘要： In the calibration of a vector demodulator, a statistical approach is used for the analysis and correction of received data. The magnitude of each vector, defined by an (I,Q) pair in a received data signal, is examined. If each measured magnitude has a predetermined value, calibration is not necessary. However, if the vector magnitudes differ from this value, a number of samples of the data signal are used to define a linearly transformed circle. The transformation parameters of this model are then calculated, for example using a least squares analysis. These parameters are related to the system errors to be corrected, and hence can be used to determine calibration factors which are employed to adjust the received information and produce actual data values.
摘要翻译：在矢量解调器的校准中，采用统计方法对接收到的数据进行分析和校正。检查由接收数据信号中的（I，Q）对定义的每个矢量的大小。如果每个测量的幅度都具有预定值，则不需要校准。然而，如果矢量幅度与该值不同，则使用数据信号的采样数来定义线性变换的圆。然后计算该模型的变换参数，例如使用最小二乘法分析。这些参数与要校正的系统误差有关，因此可用于确定用于调整接收到的信息并产生实际数据值的校准因子。

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