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21. 发明申请

US20170162332A1 CAPACITOR AND PROCESS FOR PRODUCING THEREOF 审中-公开
公开(公告)号：US20170162332A1
公开(公告)日：2017-06-08
申请号：US15440429
申请日：2017-02-23
申请人： Murata Manufacturing Co., Ltd. , Leibniz Institute for Solid State and Materials Research Dresden
发明人： Shoichiro Suzuki , lvoyl P. Koutsaroff , Koichi Banno , Oliver G. Schmidt , Daniel Grimm
IPC分类号： H01G4/32 , H01G4/12 , H01G4/015
CPC分类号： H01G4/32 , H01G4/015 , H01G4/1218 , H01G4/1227 , H01G4/1236 , H01G4/1245
摘要： A roll-up type capacitor that includes a diffusion-preventing layer, a lower electrode layer, a dielectric layer and an upper electrode layer laminated in this order and rolled-up so that the upper electrode layer is present on an inner side, and the diffusion-preventing layer is formed by an atomic layer deposition method.

22. 发明授权

US09520231B2 Laminated ceramic capacitor and method for manufacturing laminated ceramic capacitor 有权
标题翻译：层叠陶瓷电容器及层叠陶瓷电容器的制造方法
公开(公告)号：US09520231B2
公开(公告)日：2016-12-13
申请号：US14612505
申请日：2015-02-03
申请人： MURATA MANUFACTURING CO., LTD.
发明人： Shoichiro Suzuki , Shinichi Yamaguchi
IPC分类号： H01G4/00 , H01G4/008 , H01G4/30 , H01G4/232
CPC分类号： H01G4/008 , H01G4/232 , H01G4/30 , Y10T29/417
摘要： A laminated ceramic capacitor that includes a ceramic laminated body of a plurality of stacked ceramic dielectric layers, a plurality of internal electrodes opposed to each other with the ceramic dielectric layers interposed therebetween within the ceramic laminated body, and external electrodes provided on the outer surface of the ceramic laminated body and electrically connected to the internal electrodes. The internal electrodes contain Ni as a main constituent, and the Ni constituting the internal electrodes has a lattice constant in the range of 0.3250 nm to 0.3450 nm.
摘要翻译：一种层压陶瓷电容器，其包括多个层叠的陶瓷电介质层的陶瓷层叠体，在陶瓷层叠体内插入陶瓷电介质层的多个内部电极，并且设置在陶瓷层叠体的外表面上的外部电极陶瓷层叠体，与内部电极电连接。内部电极含有Ni作为主要成分，构成内部电极的Ni的晶格常数为0.3250nm〜0.3450nm。

23. 发明申请

US20160358713A1 MULTILAYER CERAMIC CAPACITOR AND METHOD FOR PRODUCING THE SAME 审中-公开
标题翻译：多层陶瓷电容器及其制造方法
公开(公告)号：US20160358713A1
公开(公告)日：2016-12-08
申请号：US15163950
申请日：2016-05-25
申请人： Murata Manufacturing Co., Ltd.
发明人： AKITAKA DOI , Shinichi Yamaguchi , Shoichiro Suzuki
IPC分类号： H01G4/30 , H01G4/232 , H01G4/248 , H01G4/008
CPC分类号： H01G4/30 , H01G4/0085 , H01G4/232
摘要： A multilayer ceramic capacitor having inner electrodes containing at least one metal selected from Cu, Ag, Pd, Pt, Rh, Ir, Ru, and Os in an amount of 0.1 atom % or more that is dissolved in Ni and Sn to form a solid solution. The percentage of Sn with respect to the total amount of Ni and Sn in near-surface regions each located at a depth of 2 nm from a surface of the inner electrode in contact with an adjacent ceramic dielectric layer is 1.4 or more atom %, and X−Y≧1.0, where X represents the atomic percentage of Sn in the near-surface regions and Y represents the atomic percentage of Sn in mid-thickness regions of the inner electrodes. A method for producing a multilayer ceramic capacitor includes annealing the ceramic multilayer body to increase, in the inner electrodes, the percentage of Sn in the near-surface regions.
摘要翻译：一种多层陶瓷电容器，其具有含有选自Cu，Ag，Pd，Pt，Rh，Ir，Ru和Os中的至少一种选自Ni和Sn中的0.1原子％以上的金属的内电极，以形成固体解。相对于与相邻的陶瓷电介质层接触的内部电极的表面的距离为2nm的深度的近表面区域的Ni和Sn的总量，Sn的比例为1.4原子％以上， X-Y≥1.0，其中X表示近表面区域中的Sn的原子百分数，Y表示内部电极的中间厚度区域中的Sn的原子百分比。制造多层陶瓷电容器的方法包括使陶瓷多层体退火，使内电极中的Sn附近的表面积增加。

24. 发明申请

US20160064646A1 PIEZOELECTRIC CERAMIC, METHOD FOR PRODUCING PIEZOELECTRIC CERAMIC, AND PIEZOELECTRIC CERAMIC ELECTRONIC COMPONENT 审中-公开
标题翻译：压电陶瓷，压电陶瓷的生产方法和压电陶瓷电子元件
公开(公告)号：US20160064646A1
公开(公告)日：2016-03-03
申请号：US14938166
申请日：2015-11-11
申请人： Murata Manufacturing Co., Ltd.
发明人： Shinichiro Kawada , Shoichiro Suzuki , Hideki Ishii , Hiroyuki Hayashi , Suetake Omiya , Takashi Oyama
IPC分类号： H01L41/187 , H01L41/273 , C04B35/626 , H01L41/083 , C04B35/495 , C04B35/64
CPC分类号： H01L41/1873 , C04B35/495 , C04B35/62605 , C04B35/62655 , C04B35/64 , C04B2235/3201 , C04B2235/3203 , C04B2235/3208 , C04B2235/3232 , C04B2235/3244 , C04B2235/3262 , C04B2235/3293 , C04B2235/6025 , C04B2235/768 , H01L41/083 , H01L41/273 , H03H9/02543 , H03H9/178
摘要： A piezoelectric ceramic that contains an alkali niobate compound as its main ingredient. The alkali niobate compound has a perovskite crystal structure represented by AmBO3 and contains an alkali metal. There exists Sn in part of site A, and Zr in part of site B. A radial distribution function obtained from a K-edge X-ray absorption spectrum of Sn has a first peak intensity P1 at a first distance from a Sn atom and a second peak intensity P2 at a second distance from the Sn atom. The second distance is greater than the first distance, and the peak intensity ratio P1/P2 is 2.7 or less.
摘要翻译：一种含有铌酸碱化合物作为主要成分的压电陶瓷。碱铌酸酯化合物具有由AmBO 3表示的钙钛矿晶体结构，并含有碱金属。在部分A中存在Sn，部分位置B存在Zr。从Sn的K边X射线吸收光谱获得的径向分布函数具有与Sn原子相距第一距离的第一峰强度P1和与Sn原子相距第二距离的第二峰强度P2。第二距离大于第一距离，峰值强度比P1 / P2为2.7以下。

25. 发明授权

US09275797B2 Multilayer ceramic capacitor, dielectric ceramic, multilayer ceramic electronic component, and method for manufacturing multilayer ceramic capacitor 有权
标题翻译：多层陶瓷电容器，电介质陶瓷，多层陶瓷电子元器件及多层陶瓷电容器制造方法
公开(公告)号：US09275797B2
公开(公告)日：2016-03-01
申请号：US14011499
申请日：2013-08-27
申请人： MURATA MANUFACTURING CO., LTD.
发明人： Shoichiro Suzuki , Koichi Banno , Akihiro Shiota , Masahiro Otsuka , Taisuke Kanzaki , Masanori Nakamura
IPC分类号： H01G4/12 , H01B3/12 , C04B35/468 , C04B35/626 , C04B35/638 , H01G4/30 , B82Y30/00
CPC分类号： H01G4/1227 , B82Y30/00 , C04B35/4682 , C04B35/62675 , C04B35/62685 , C04B35/638 , C04B2235/3201 , C04B2235/3203 , C04B2235/3208 , C04B2235/3213 , C04B2235/3215 , C04B2235/3232 , C04B2235/3244 , C04B2235/3281 , C04B2235/3284 , C04B2235/3298 , C04B2235/44 , C04B2235/5454 , C04B2235/781 , C04B2235/785 , H01B3/12 , H01G4/1236 , H01G4/30
摘要： A dielectric ceramic that can be sintered at a sufficiently low temperature and has a desired specific resistance at a high temperature, and a multilayer ceramic electronic component (a multilayer ceramic capacitor and the like) using the dielectric ceramic are provided. The multilayer ceramic capacitor includes a multilayer body having a plurality of laminated dielectric ceramic layers, and a plurality of internal electrodes at interfaces between the dielectric ceramic layers; and external electrodes 8 and 9 on outer surfaces of the multilayer body. The composition of the multilayer body includes a perovskite-type compound containing Ba and Ti (where a part of Ba may be substituted by Ca, and a part of Ti may be substituted by Zr) as a primary ingredient, and further includes M (where M is at least one of Cu, Zn, Li, K, and Na) and Bi. The total content of M and Bi is equal to or greater than 3 molar parts when the total content of Ti and Zr is 100 molar parts. The crystal particle size of the dielectric ceramic is 30 nm or more and 150 nm or less.
摘要翻译：提供可以在足够低的温度下烧结并且在高温下具有所需电阻率的电介质陶瓷，以及使用电介质陶瓷的多层陶瓷电子部件（多层陶瓷电容器等）。多层陶瓷电容器包括具有多个层压电介质陶瓷层的多层体和在介电陶瓷层之间的界面处的多个内部电极; 以及在多层体的外表面上的外部电极8和9。多层体的组成包括含有Ba和Ti（其中Ba的一部分可以被Ca取代，Ti的一部分可以被Zr取代）的钙钛矿型化合物作为主要成分，并且还包括M（其中 M是Cu，Zn，Li，K和Na中的至少一种）和Bi。当Ti和Zr的总含量为100摩尔份数时，M和Bi的总含量等于或大于3摩尔份。电介质陶瓷的结晶粒径为30nm以上且150nm以下。

26. 发明授权

US09064638B2 Dielectric ceramic, stack ceramic electronic component, and method of manufacturing these 有权
标题翻译：介电陶瓷，堆叠陶瓷电子部件及其制造方法
公开(公告)号：US09064638B2
公开(公告)日：2015-06-23
申请号：US13803925
申请日：2013-03-14
申请人： MURATA MANUFACTURING CO., LTD.
发明人： Shoichiro Suzuki , Masanori Nakamura , Koichi Banno , Taisuke Kanzaki , Akihiro Shiota , Masahiro Otsuka
IPC分类号： C04B35/468 , H01G4/06 , H01G4/30 , C04B35/49 , H01B3/12 , H01G4/12 , H01G4/00 , C04B35/626 , C01G25/00 , C01G29/00
CPC分类号： H01G4/30 , C01G25/006 , C01G29/006 , C04B35/468 , C04B35/4682 , C04B35/49 , C04B35/62685 , C04B2235/3208 , C04B2235/3213 , C04B2235/3215 , C04B2235/3248 , C04B2235/3281 , C04B2235/3298 , C04B2235/6562 , C04B2235/768 , C04B2235/79 , H01B3/12 , H01G4/00 , H01G4/1227
摘要： A dielectric ceramic enabling low-temperature firing and exhibiting good dielectric characteristics, and a stack ceramic electronic component using the same are provided. The dielectric ceramic containing (Ba1-x-yCaxSry)m(Ti1-zZrz)O3 (1.005≦m≦1.2, 0≦x+y≦0.2, and 0≦z≦0.2) as a major component and an amount of Bi relative to 100 parts by mol of the major component which is 1.0 part by mol or more and 40 parts by mol or less.
摘要翻译：提供能够进行低温烧制并且具有良好的介电特性的电介质陶瓷，以及使用其的叠层陶瓷电子元件。含有（Ba1-x-yCaxSry）m（Ti1-zZrz）O3（1.005＆nlE; m＆nlE; 1.2,0＆nlE; x + y＆nlE; 0.2和0＆amp; nlE; z＆nlE; 0.2）的介电陶瓷作为主要成分，相对于100份（摩尔）为1.0份摩尔以上且40份（摩尔）以下的主成分。

27. 发明申请

US20140049877A1 DIELECTRIC CERAMIC, LAMINATED CERAMIC ELECTRONIC COMPONENT, LAMINATED CERAMIC CAPACITOR, AND METHOD FOR PRODUCING LAMINATED CERAMIC CAPACITOR 有权
标题翻译：电介质陶瓷，层压陶瓷电子元件，层压陶瓷电容器和生产层压陶瓷电容器的方法
公开(公告)号：US20140049877A1
公开(公告)日：2014-02-20
申请号：US14067591
申请日：2013-10-30
申请人： MURATA MANUFACTURING CO., LTD.
发明人： Shoichiro Suzuki , Shinichi Yamaguchi
IPC分类号： C04B35/468 , H01G4/12
CPC分类号： C04B35/4682 , B82Y30/00 , C04B2235/3208 , C04B2235/3244 , C04B2235/3262 , C04B2235/3418 , C04B2235/781 , C04B2235/785 , H01G4/1227 , H01G4/1245 , Y10T29/435
摘要： There are provided a dielectric ceramic having large specific resistance and even capacitance characteristic at 150° C., as well as a laminated ceramic electronic component employing such a dielectric ceramic. A ceramic layer includes crystal grains, the ceramic layer containing a perovskite type compound containing Ba, Ca, Ti, and Zr, containing Si, and optionally containing Mn. When the total content of Ti and Zr is 1 molar part, the content of Mn is 0.015 molar part or less, the content of Si is 0.005 molar part or more and less than 0.03 molar part, the molar ratio x of Ca/(Ba+Ca) satisfies 0.05
摘要翻译：提供了在150℃下具有大电阻和均匀电容特性的介电陶瓷，以及采用这种电介质陶瓷的层压陶瓷电子元件。陶瓷层包括晶粒，该陶瓷层含有含有含有Si的Ba，Ca，Ti和Zr的钙钛矿型化合物，并且任选地含有Mn。当Ti和Zr的总含量为1摩尔份数时，Mn的含量为0.015摩尔份以下，Si的含量为0.005摩尔以上且小于0.03摩尔份，Ca /（Ba + Ca）满足0.05

28. 发明授权

US11424074B2 Multilayer ceramic capacitor 有权
公开(公告)号：US11424074B2
公开(公告)日：2022-08-23
申请号：US17078647
申请日：2020-10-23
申请人： Murata Manufacturing Co., Ltd.
发明人： Yuya Ogawa , Shinya Isota , Shoichiro Suzuki
IPC分类号： H01G4/12 , H01G4/30 , C04B37/00 , H01G4/248
摘要： A multilayer ceramic capacitor that includes a ceramic body including a stack of a plurality of dielectric layers and a plurality of internal electrodes; a first external electrode on a first end surface of the ceramic body and electrically connected to a first set of the plurality of internal electrodes; and a second external electrode on a second end surface of the ceramic body and electrically connected to a second set of the plurality of internal electrodes. The dielectric layer includes a plurality of dielectric grains including Ca, Zr, Ti and a rare earth element, P is present between the plurality of dielectric grains, and where at least a portion of the rare earth element is in a solid solution in the dielectric grains.

29. 发明申请

US20210134527A1 MULTILAYER CERAMIC CAPACITOR 有权
公开(公告)号：US20210134527A1
公开(公告)日：2021-05-06
申请号：US17078647
申请日：2020-10-23
申请人： Murata Manufacturing Co., Ltd.
发明人： Yuya Ogawa , Shinya Isota , Shoichiro Suzuki
IPC分类号： H01G4/12 , H01G4/30 , H01G4/248 , C04B37/00
摘要： A multilayer ceramic capacitor that includes a ceramic body including a stack of a plurality of dielectric layers and a plurality of internal electrodes; a first external electrode on a first end surface of the ceramic body and electrically connected to a first set of the plurality of internal electrodes; and a second external electrode on a second end surface of the ceramic body and electrically connected to a second set of the plurality of internal electrodes. The dielectric layer includes a plurality of dielectric grains including Ca, Zr, Ti and a rare earth element, P is present between the plurality of dielectric grains, and where at least a portion of the rare earth element is in a solid solution in the dielectric grains.

30. 发明授权

US10153093B2 Ultra compact micro capacitor and method for producing same 有权
公开(公告)号：US10153093B2
公开(公告)日：2018-12-11
申请号：US15524461
申请日：2015-11-05
申请人： LEIBNIZ-INSTITUT FUER FESTKOERPER-UND WERKSTOFFFORSHUNG DRESDEN E.V. , MURATA MANUFACTURING CO., LTD.
发明人： Daniel Grimm , Martin Bauer , Oliver G. Schmidt , Shoichiro Suzuki
IPC分类号： H01G4/32 , H01G4/33 , H01G4/30 , H01G4/10 , H01G4/12
摘要： The present invention relates to the area of micro- and nanoelectronics and relates to ultra-compact micro capacitors, how they can be used, for example, in electrical and electronic devices. The object of the present invention consists in specifying an ultra-compact micro capacitor with the highest capacity. The problem is solved by an ultra-compact micro capacitor which is made from a rolled-up layer stack of alternatingly arranged layers of dielectric and/or electrically insulating and electrically conductive materials with rolled-up lengths of the layer stack of at least 1 mm, and an absolute electrical storage capacity of at least 10 nF. The problem is additionally solved by a method, in which a layer containing a water-soluble cellulose derivative is applied to a substrate and a layer stack to same, the layer containing the cellulose derivative is removed from the substrate using water, an organic solvent and/or an organic solvent mixture, and the layer stack is rolled up with a rolling speed of more than 0.1 mm/min.

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