会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 21. 发明申请
    • PROTECTION OF A MODULAR EXPONENTIATION CALCULATION PERFORMED BY AN INTEGRATED CIRCUIT
    • 集成电路执行的模块化指令计算的保护
    • US20100208883A1
    • 2010-08-19
    • US11917347
    • 2006-06-14
    • Yannick TegliaPierre-Yvan LiardetAlain Pomet
    • Yannick TegliaPierre-Yvan LiardetAlain Pomet
    • H04L9/28
    • G06F7/723G06F2207/7252H04L9/003
    • The invention concerns a method and a circuit for protecting a numerical quantity (d) contained in an integrated circuit (1) on a first number of bits (n), in a modular exponentiation computing of a data (M) by said numerical quantity, which consists in: selecting at least one second number (j) included between the unit and said first number minus two; dividing said numerical quantity into at least two parts, a first part (d(j−1, 0)) comprising, from the bit of rank null, a number of bits equal to said second number, a second part (d(n−1, j)) comprising the remaining bits; for each part of the quantity, computing a first modular exponentiation (23, 33) of said data by the part concerned and a second modular exponentiation (36, 34) of the result of the first by the FIG. 2 exponentiated to the power of the rank of the first bit of the part concerned; and computing (35) the product of the results of the first and second modular exponentiations.
    • 本发明涉及一种方法和电路,用于通过数字量(M)的模幂运算来保护包含在第一位数(n)上的集成电路(1)中的数值(d) 其包括:选择包括在所述单元和所述第一数字之间的至少一个第二数字(j)减去两个; 将所述数值分成至少两部分,第一部分(d(j-1,0)),其包括从秩零的比特数等于所述第二数的比特数,第二部分(d(n- 1,j)); 对于数量的每个部分,由相关部分计算所述数据的第一模幂(23,33)和由图1的第一个结果的第二模幂(36,34)。 2指数与有关部分的第一位的等级的权力; 并计算(35)第一和第二模幂的结果的乘积。
    • 24. 发明申请
    • Processor for Executing an Aes-Type Algorithm
    • 用于执行Aes类型算法的处理器
    • US20080285745A1
    • 2008-11-20
    • US11547195
    • 2004-03-29
    • Yannick TegliaFabrice RomainPierre-Yvan LiardetPasqualina FragnetoFabio SozzaniGuido Bertoni
    • Yannick TegliaFabrice RomainPierre-Yvan LiardetPasqualina FragnetoFabio SozzaniGuido Bertoni
    • H04L9/06
    • H04L9/0631H04L9/003H04L2209/046H04L2209/08H04L2209/122
    • A processor for executing a Rijndeal algorithm which applies a plurality of encryption rounds to a data block array in order to obtain an array of identical size, each round involving a key block array and a data block substitution table, wherein said processor comprises: a first input register (102) containing an input data block column; an output register (111) containing an output data block column or an intermediate block column; a second input register (101) containing a key block column or the intermediate data blocks; a block substitution element (104) receiving the data one block at a time following the selection (103) thereof in the first register and providing, for each block, a column of blocks; an element (109) applying a cyclic permutation to the substitution circuit column blocks; and an Exclusive-OR combination element (110) combining the permutation circuit column blocks with the content of the second register, the result of said combination being loaded into the output register.
    • 一种用于执行Rijndeal算法的处理器,该Rijndeal算法将多个加密回合应用于数据块阵列,以便获得相同大小的阵列,每轮涉及密钥块阵列和数据块替换表,其中所述处理器包括:第一 输入寄存器(102),其包含输入数据块列; 包含输出数据块列或中间块列的输出寄存器(111); 包含密钥块列或中间数据块的第二输入寄存器(101); 块替换元件(104)在第一寄存器中的选择(103)之后的时间接收数据一个块,并为每个块提供一列块; 向替代电路列块施加循环置换的元件(109); 以及将置换电路列块与第二寄存器的内容组合的异或组合元件(110),所述组合的结果被加载到输出寄存器中。