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1. 发明授权

US09959429B2 Asymmetrically masked multiplication 有权
公开(公告)号：US09959429B2
公开(公告)日：2018-05-01
申请号：US13835402
申请日：2013-03-15
申请人： Cryptography Research, Inc.
发明人： Joshua M. Jaffe
IPC分类号： G06F21/00 , G06F21/72 , G06F7/72 , H04L9/00
CPC分类号： G06F21/72 , G06F7/723 , G06F2207/7238 , G06F2207/7257 , H04L9/003 , H04L2209/046
摘要： Methods and systems for masking certain cryptographic operations in a manner designed to defeat side-channel attacks are disclosed herein. Squaring operations can be masked to make squaring operations indistinguishable or less distinguishable from multiplication operations. In general, squaring operations are converted into multiplication operations by masking them asymmetrically. Additional methods and systems are disclosed for defeating DPA, cross-correlation, and high-order DPA attacks against modular exponentiation.

2. 发明授权

US09600239B2 Cryptographic accelerator 有权
公开(公告)号：US09600239B2
公开(公告)日：2017-03-21
申请号：US14455261
申请日：2014-08-08
申请人： Texas Instruments Incorporated
发明人： Eric Thierry Peeters , Hamza Fraz
IPC分类号： G06F7/72 , G06F21/72
CPC分类号： G06F7/723 , G06F7/72 , G06F7/728 , G06F21/72
摘要： A cryptographic accelerator performs various modular arithmetic operations producing unreduced results bounded by the double of the modulus (i.e.: 2*M). In doing so, various processing elements of an ALU of the cryptographic accelerator can begin to process respective data word portions of a modular arithmetic operations before the entirety of one or more operands are loaded. Similarly, various processing elements may begin to store their respective data word portions of a modular arithmetic result before the entirety of the result is calculated.

3. 发明申请

US20170061119A1 PROTECTION OF A MODULAR EXPONENTIATION CALCULATION 审中-公开
标题翻译：保护模块化指数计算
公开(公告)号：US20170061119A1
公开(公告)日：2017-03-02
申请号：US15056601
申请日：2016-02-29
申请人： STMicroelectronics (Rousset) SAS
发明人： Yannick Teglia
IPC分类号： G06F21/52
CPC分类号： G06F21/52 , G06F7/723 , G06F2207/7219 , H04L9/004
摘要： A method of protecting a modular exponentiation calculation executed by an electronic circuit using a first register and a second register, successively comprising, for each bit of the exponent: a first step of multiplying the content of one of the registers, selected from among the first register and the second register according to the state of the bit of the exponent, by the content of the other one of the first and second registers, placing the result in said one of the registers; a second step of squaring the content of said other one of the registers by placing the result in this other register, wherein the content of said other one of the registers is stored in a third register before the first step and is restored in said other one of the registers before the second step.
摘要翻译：一种用于使用第一寄存器和第二寄存器来保护由电子电路执行的模幂运算的方法，该方法对于指数的每一位依次包括：第一步，将寄存器中的一个的内容从第一根据指数的位的状态，通过第一和第二寄存器中的另一个的内容将寄存器和第二寄存器置于所述寄存器的所述一个寄存器中; 通过将结果放置在该另一个寄存器中来平均所述另一个寄存器的内容的第二步骤，其中所述另一个寄存器的内容在第一步骤之前存储在第三寄存器中并在所述另一个寄存器中被恢复的第二步之前的寄存器。

4. 发明申请

US20160274866A1 MULTIPLIER PIPELINING OPTIMIZATION WITH A BIT FOLDING CORRECTION 有权
标题翻译：具有折叠校正的多用户管道优化
公开(公告)号：US20160274866A1
公开(公告)日：2016-09-22
申请号：US14664669
申请日：2015-03-20
申请人： Intel Corporation
发明人： T.J. O'DWYER , PIERRE LAURENT
IPC分类号： G06F7/533 , G06F7/72
CPC分类号： G06F7/533 , G06F7/723
摘要： One embodiment provides a system. The system includes a register to store an operand; a multiplier; and optimizer logic to initiate a square/multiply stage to operate on the operand, initiate a reduction stage prior to completion of the square/multiply stage, and determine whether a carry propagation has occurred.
摘要翻译：一个实施例提供一种系统。该系统包括一个用于存储操作数的寄存器; 乘数以及优化器逻辑，用于启动平方/乘法级以对操作数进行操作，在完成平方/乘法级之前启动减少级，并确定是否发生进位传播。

5. 发明授权

US08767955B2 Protection of a modular exponentiation calculation by multiplication by a random quantity 有权
标题翻译：通过乘以随机数保护模幂运算
公开(公告)号：US08767955B2
公开(公告)日：2014-07-01
申请号：US13543106
申请日：2012-07-06
申请人： Yannick Teglia
发明人： Yannick Teglia
IPC分类号： H04L9/28
CPC分类号： G06F7/723 , G06F2207/7233
摘要： A method for protecting a calculation, by an electronic circuit, of a modular exponentiation of a digital quantity, wherein: a first variable is initialized with a random quantity; at least one second variable is initialized with a value which is a function of the digital quantity; at least for a bit at 1 of an exponent of the modular exponentiation, the first variable is updated by: a) the quotient of its content and a power of the random quantity; and b) the product of its content by that of the second variable; and once all the exponent bits have been processed, the content of the first variable is divided by the random quantity to provide the result of the modular exponentiation.
摘要翻译：一种用于保护由电子电路计算数字量的模幂运算的方法，其中：第一变量用随机数进行初始化; 至少一个第二变量用作为数字量的函数的值初始化; 至少对于模幂数的指数的1位，第一个变量通过以下方式更新：a）其内容的商和随机数的幂; 和b）其内容的乘积与第二个变量的乘积; 并且一旦所有指数位都被处理，则将第一变量的内容除以随机数来提供模幂运算的结果。

6. 发明申请

US20140153716A1 WHITE-BOX IMPLEMENTATION 审中-公开
标题翻译：白盒实施
公开(公告)号：US20140153716A1
公开(公告)日：2014-06-05
申请号：US14176938
申请日：2014-02-10
申请人： IRDETO CORPORATE B.V.
发明人： Wilhelmus P.A.J. Michiels , Paulus M.H.M.A. Gorissen
IPC分类号： H04L9/16
CPC分类号： H04L9/16 , G06F7/723 , H04L9/06 , H04L9/30 , H04L2209/16
摘要： A system for enabling a device to compute an outcome of an exponentiation Cx having a base C and/or an exponent x, the system comprising means for establishing a plurality of values λi; means for establishing a plurality of values ωi satisfying ωi=Cλi; means for establishing a plurality of values φi satisfying that the sum of the values λiφi equals x; and an output for providing the device with the plurality of values φi. A device computes an outcome of the exponentiation Cx. The device comprises means for computing a product of the values ωi to the power of φi. The device is arranged for using the product as a result of the exponentiation Cx.
摘要翻译：一种用于使得设备能够计算具有基本C和/或指数x的求幂Cx的结果的系统，所述系统包括用于建立多个值λ1的装置; 用于建立满足ωi=Cλi的多个值ωi的装置; 用于建立多个值的装置，其满足值λi＆phgr; i的总和等于x; 以及用于向所述设备提供所述多个值的输出。设备计算求幂Cx的结果。该装置包括用于计算值ωi与权重i的乘积的装置。该设备被安排为使用该乘积作为乘幂Cx的结果。

7. 发明授权

US08738927B2 Arrangement for and method of protecting a data processing device against an attack or analysis 有权
标题翻译：保护数据处理设备免受攻击或分析的安排和方法
公开(公告)号：US08738927B2
公开(公告)日：2014-05-27
申请号：US11993265
申请日：2006-06-23
申请人： Gerardus Tarcisius Maria Hubert
发明人： Gerardus Tarcisius Maria Hubert
IPC分类号： G06F11/30 , G06F12/14
CPC分类号： H04L9/302 , G06F7/723 , G06F7/728 , G06F2207/7238 , H04L9/003 , H04L9/3066 , H04L2209/046
摘要： In order to further develop an arrangement for as well as a method of protecting at least one data processing device, in particular at least one embedded system, for example at least one chip card or smart card, against at least one attack, in particular against at least one side-channel attack, for example against at least one current trace analysis, the data processing device, in particular at least one integrated circuit of the data processing device, carrying out calculations, in particular cryptographic operations wherein an attack, for example an E[lectro]M[agnetic] radiation attack, or an analysis, for example a D[ifferential]P[ower]A[nalysis], such attack or such analysis in particular targeted on finding out a private key, is to be securely averted, it is proposed to blind all intermediate results of the calculations by at least one random variable, without inverting any operand of the calculations.
摘要翻译：为了进一步开发一种安排以及一种保护至少一个数据处理设备，特别是至少一个嵌入式系统（例如至少一个芯片卡或智能卡）的方法，其针对至少一次攻击，特别是针对例如至少一个侧向信道攻击，例如针对至少一个当前跟踪分析，数据处理设备，特别是数据处理设备的至少一个集成电路，执行计算，特别是加密操作，其中例如攻击或者分析，例如D [ifferential] P [oal] A [nalysis]，这种攻击或此类分析特别是寻找私钥的目的是为安全地避免，建议通过至少一个随机变量来盲目计算所有中间结果，而不颠倒计算的任何操作数。

8. 发明授权

US08621239B2 Method for strengthening the implementation of ECDSA against power analysis 有权
公开(公告)号：US08621239B2
公开(公告)日：2013-12-31
申请号：US13619557
申请日：2012-09-14
申请人： Robert J. Lambert
发明人： Robert J. Lambert
IPC分类号： G06F11/30 , H04L9/30 , G06F12/14 , H04L9/00
CPC分类号： G06F7/725 , G06F7/723 , G06F2207/7233 , H04L9/003 , H04L9/0891 , H04L9/3066 , H04L9/3252
摘要： A method of inhibiting the disclosure of confidential information through power analysis attacks on processors in cryptographic systems. The method masks a cryptographic operation using a generator G. A secret value, which may be combined with the generator G to form a secret generator is generated. The secret value is divided into a plurality of parts. A random value is generated for association with the plurality of parts. Each of the plurality of parts is combined with the random value to derive a plurality of new values such that the new values when combined are equivalent to the secret value. Each of the new values is used in the cryptographic operation, thereby using the secret generator in place of the generator G in the cryptographic operation. The introduction of randomness facilitates the introduction of noise into algorithms used by cryptographic systems so as to mask the secret value and provide protection against power analysis attacks.

9. 发明申请

US20130016826A1 PROTECTION OF A MODULAR EXPONENTIATION CALCULATION BY ADDITION OF A RANDOM QUANTITY 有权
标题翻译：通过添加随机数量来保护模块化指数计算
公开(公告)号：US20130016826A1
公开(公告)日：2013-01-17
申请号：US13542829
申请日：2012-07-06
申请人： Yannick Teglia
发明人： Yannick Teglia
IPC分类号： H04L9/28
CPC分类号： H04L9/002 , G06F7/723 , G06F2207/7233 , G06F2207/7238
摘要： A method for protecting a calculation, by an electronic circuit, of a modular exponentiation of a digital quantity, wherein: a first variable is initialized with a random quantity increased by once unit; a second variable is initialized with the product of the digital quantity by the random quantity; a third variable is initialized with the digital quantity; iteratively for all the bits at 1 of an exponent of the modular exponentiation, the first variable is updated by: a) multiplying its content by that of the third variable; and b) subtracting thereto the content of the second variable increased by the random quantity; and once all the bits of the exponent have been processed, the content of the first variable is decreased by the random quantity to provide the result of the modular exponentiation.
摘要翻译：一种用于保护由电子电路计算数字量的模数乘法的方法，其中：第一变量以随机数增加一次单位来初始化; 第二个变量用数字量乘以随机数的乘积初始化; 第三个变量用数字量初始化; 迭代地对于在幂幂的指数的1处的所有比特，第一个变量通过以下方式更新：a）将其内容乘以第三个变量的内容; b）减去所述随机数增加的第二变量的内容; 并且一旦指数的所有位都被处理，则第一变量的内容减少随机数量以提供模幂运算的结果。

10. 发明授权

US08311212B2 Method of processing data protected against attacks by generating errors and associated device 有权
标题翻译：处理数据的方法，通过产生错误和关联的设备来防范攻击
公开(公告)号：US08311212B2
公开(公告)日：2012-11-13
申请号：US12184546
申请日：2008-08-01
申请人： Christophe Giraud , Hugues Thiebeauld de la Crouee
发明人： Christophe Giraud , Hugues Thiebeauld de la Crouee
IPC分类号： H04L9/00 , G06F11/30 , G06F12/14
CPC分类号： G06F7/723 , G06F2207/7219 , H04L9/3236 , H04L9/3247 , H04L2209/30 , H04L2209/34
摘要： A data processing method comprises the following steps: determining a first result data word from a first input data word and a first secret data word; obtaining a first compressed data word from the first result data word or the first input data word using a compression algorithm; determining a second result data word from a second input data word and a second secret data word; obtaining a second compressed data word from the second result data word using the compression algorithm; comparing the first compressed data word and the second compressed data word.
摘要翻译：数据处理方法包括以下步骤：从第一输入数据字和第一秘密数据字确定第一结果数据字; 使用压缩算法从第一结果数据字或第一输入数据字获得第一压缩数据字; 从第二输入数据字和第二秘密数据字确定第二结果数据字; 使用压缩算法从第二结果数据字获得第二压缩数据字; 比较第一压缩数据字和第二压缩数据字。

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