专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

21. 发明授权

US5858578A Photo masks for developing planar layers in a semiconductor device, and methods of forming the same 失效
标题翻译：用于在半导体器件中显影平面层的照相掩模及其形成方法
公开(公告)号：US5858578A
公开(公告)日：1999-01-12
申请号：US665622
申请日：1996-06-18
申请人： Takaaki Ukeda , Tatsuya Yamada , Yoshiaki Kato , Akio Miyajima
发明人： Takaaki Ukeda , Tatsuya Yamada , Yoshiaki Kato , Akio Miyajima
IPC分类号： G03F7/11 , G03F1/68 , G03F1/80 , G03F7/00 , G03F7/40 , H01L21/027 , H01L21/302 , H01L21/3065 , H01L21/3105 , H01L21/3205 , H01L21/321 , H01L21/3213 , H01L21/768 , G03F9/00
CPC分类号： H01L21/31055 , G03F1/70 , G03F7/0035
摘要： The semiconductor masking device of the invention includes a first semiconductor mask for forming an interconnection on a semiconductor substrate and a second semiconductor mask for forming a resist pattern on an insulating film. The first semiconductor mask has three masking areas and the second semiconductor mask has two masking areas. Masking area intervals, that is, the distances between the three masking areas of the first semiconductor mask and the two masking areas of the second semiconductor mask, are all equal to one another.
摘要翻译：本发明的半导体掩模装置包括用于在半导体衬底上形成互连的第一半导体掩模和用于在绝缘膜上形成抗蚀剂图案的第二半导体掩模。第一半导体掩模具有三个掩蔽区域，第二半导体掩模具有两个掩蔽区域。掩蔽区间隔，即第一半导体掩模的三个屏蔽区域与第二半导体掩模的两个屏蔽区域之间的距离都彼此相等。

22. 发明授权

US5804879A Aluminum scandium alloy interconnection 失效
标题翻译：铝钪合金互连
公开(公告)号：US5804879A
公开(公告)日：1998-09-08
申请号：US653116
申请日：1996-05-24
申请人： Shinichi Ogawa , Hiroshi Nishimura , Tatsuya Yamada
发明人： Shinichi Ogawa , Hiroshi Nishimura , Tatsuya Yamada
IPC分类号： H01L21/28 , H01L21/768 , H01L23/532 , H01L23/48 , H01L23/52 , H01L25/40
CPC分类号： H01L21/76838 , H01L23/53219 , H01L23/53223 , H01L2924/0002 , Y10S438/927
摘要： An aluminum interconnection of the invention contains scandium as an impurity, so that the hardness of the interconnection in improved. Moreover, after a thin Al-Sc alloy film is formed, an annealing is performed 80 as to make the crystal grain larger than the width of the interconnection. The resulting Al interconnection has a high resistance against a stressmigration or electromigration, when a current stress in applied at a practical temperature in an LSI. This greatly contributes to the fabrication of a semiconductor device having a fine structure.
摘要翻译：本发明的铝互连包含钪作为杂质，使得互连的硬度得到改善。此外，在形成薄的Al-Sc合金膜之后，进行退火80以使晶粒大于互连的宽度。当在LSI中的实际温度下施加的电流应力时，所得的Al互连对于应力迁移或电迁移具有高电阻。这大大有助于制造具有精细结构的半导体器件。

23. 发明授权

US5737697A Transmission power control circuit for a communication system 失效
标题翻译：用于通信系统的传输功率控制电路
公开(公告)号：US5737697A
公开(公告)日：1998-04-07
申请号：US464828
申请日：1995-07-10
申请人： Tatsuya Yamada
发明人： Tatsuya Yamada
IPC分类号： H04B1/04 , H03G3/30
CPC分类号： H03G3/3047
摘要： A communications system free from overshooting of the transmission power. A capacitor (C1) is charged with a power setting signal (Cc) during a period from time t1 to t2 within a time slot (Tm) in which a transmission is started and keeps the charged voltage, which controls the transmission power Po at the beginning of the time slot (T1).
摘要翻译： PCT No.PCT / JP94 / 00073 Sec。 371日期1995年7月10日 102（e）日期1995年7月10日PCT 1994年1月21日PCT PCT。公开号WO94 / 17598 日期1994年8月4日通信系统不受传输功率过大的影响。在时间t1到t2的时间段内，在发送开始的时隙（Tm）内对电容器（C1）充电功率设定信号（Cc），并且将控制发送功率Po的充电电压保持在时隙（T1）的开始。

24. 发明授权

US5228975A Gas sensor having hermetic and electrically insulating seal in housing 失效
标题翻译：气体传感器在外壳中具有密封和电绝缘密封
公开(公告)号：US5228975A
公开(公告)日：1993-07-20
申请号：US598018
申请日：1990-10-11
申请人： Tatsuya Yamada , Toshiya Koide , Yoshihide Kami
发明人： Tatsuya Yamada , Toshiya Koide , Yoshihide Kami
IPC分类号： G01N27/12 , G01N27/04 , G01N27/407
CPC分类号： G01N27/407 , G01N27/4077 , G01N27/4078
摘要： The invention relates to a gas sensor using a known gas sensitive element which provides an electrical output signal. For example, the sensitive element has a zirconia solid electrolyte sensitive to oxygen. The gas sensitive element is mounted on a ceramic substrate, and the substrate is partly inserted in a tubular housing, and a hermetic and electrically insulating seal column is formed in the housing to tightly hold the substrate. Lead wires protruding from the substrate are connected to external leads within the housing, and the joints are buried in the seal column. According to the invention, the seal column is formed of a glass-ceramic origitated from a glass which is composed of ZnO, B.sub.2 O.sub.3, SiO.sub.2 and MgO and has a crystallizing temperature of 740.degree.-900.degree. C. The glass-ceramic has a linear expansion coefficient smaller than that of the housing by 3.times.10.sup.-6 /.degree.C. at the most. Preferably alumina ceramic is used as the housing material. The glass-ceramic seal column is high in heat resistance and remains sufficiently airtight and electrically insulating even when its temperature exceeds 500.degree. C.
摘要翻译：本发明涉及一种使用提供电输出信号的已知气体敏感元件的气体传感器。例如，敏感元件具有对氧敏感的氧化锆固体电解质。气体敏感元件安装在陶瓷基板上，并且基板部分地插入管状壳体中，并且在壳体中形成密封且电绝缘的密封柱以紧密地保持基板。从基板突出的引线与壳体内的外部引线相连，接头被埋在密封柱中。根据本发明，密封柱由来自由ZnO，B2O3，SiO2和MgO组成的玻璃的玻璃陶瓷形成，结晶温度为740-900℃。玻璃陶瓷具有线性最大膨胀系数小于住房的3×10 -6 /℃。优选使用氧化铝陶瓷作为外壳材料。玻璃陶瓷密封柱的耐热性高，即使温度超过500℃也保持充分的气密性和电绝缘性。

25. 发明授权

US3975085A Liquid crystal display device with interdigital electrodes 失效
标题翻译：具有叉指电极的液晶显示装置
公开(公告)号：US3975085A
公开(公告)日：1976-08-17
申请号：US519652
申请日：1974-10-31
申请人： Tatsuya Yamada , Toshihide Kawashima , Takashi Oozeki
发明人： Tatsuya Yamada , Toshihide Kawashima , Takashi Oozeki
IPC分类号： G02F1/133 , G09F9/30 , G09G3/18 , G09G3/36 , G02F1/13
CPC分类号： G09G3/18 , G09G3/3622 , G02F2201/124
摘要： AC drive voltages out of phase with each other are applied to a pair of interdigital electrodes disposed opposite to each other and adjacent to a liquid crystal material. By the AC drive voltages displaced in phase from each other rotating electric fields are generated to cause liquid crystal molecules to be violently rotated or perturbed. As a result, a contrast as well as rise and fall characteristics can be improved.
摘要翻译：彼此相位不同的交流驱动电压被施加到彼此相对设置并且与液晶材料相邻布置的一对叉指电极。通过交流驱动电压产生相位相互旋转的电场，使液晶分子剧烈旋转或扰动。结果，可以提高对比度以及上升和下降特性。

26. 发明授权

US08396601B2 Energy management apparatus for customers 有权
标题翻译：为客户提供能源管理设备
公开(公告)号：US08396601B2
公开(公告)日：2013-03-12
申请号：US12850234
申请日：2010-08-04
申请人： Yasushi Tomita , Masahiro Watanabe , Rena Tachihara , Yuichi Otake , Tatsuya Yamada
发明人： Yasushi Tomita , Masahiro Watanabe , Rena Tachihara , Yuichi Otake , Tatsuya Yamada
IPC分类号： G01M1/38
CPC分类号： F24F11/30 , F24F11/62
摘要： A customer-dedicated energy management apparatus includes an air-conditioner partial-road characteristics identification unit for creating air-conditioning partial-road characteristics by using air-conditioning operation achievement data in the past, an intra-room heat-capacity characteristics identification unit for creating intra-room heat-capacity characteristics by using the air-conditioning operation achievement data in the past, and intra-room state value data, an air-conditioning setting temperature calculation unit for determining an air-conditioning setting temperature by using the air-conditioning partial-road characteristics and the intra-room heat-capacity characteristics, the setting temperature being appropriate for implementing an air-conditioning power-consumption-amount suppression target value determined, and an air-conditioner control unit for controlling an air conditioner so that the setting temperature determined will be implemented.
摘要翻译：客户专用的能量管理装置包括：空调局部道路特性识别单元，用于通过使用过去的空调操作成果数据来产生空调部分道路特性;室内热容特性识别单元，用于通过使用过去的空调运转成果数据和室内状态值数据来产生室内热容量特性;空调设定温度计算单元，用于通过使用空调设定温度来确定空调设定温度，调节部分道路特性和房间内热容量特性，设定温度适合于确定的空调消耗量抑制目标值，以及空调器控制单元，用于控制空调，使得确定的设定温度将被实施。

27. 发明授权

US07805641B2 Test apparatus for regulating a test signal supplied to a device under test and method thereof 有权
标题翻译：用于调节提供给被测设备的测试信号的测试装置及其方法
公开(公告)号：US07805641B2
公开(公告)日：2010-09-28
申请号：US11651948
申请日：2007-01-10
申请人： Tatsuya Yamada , Masaru Doi , Shinya Satou
发明人： Tatsuya Yamada , Masaru Doi , Shinya Satou
IPC分类号： G11B5/00
CPC分类号： G01R31/31725 , G01R31/31726 , G01R31/31727 , G01R31/31937
摘要： A test apparatus tests a device under test. The test apparatus includes a period generator that generates a rate signal determining a test period according to an operating period of the device under test, a phase comparing section that inputs an operational clock signal for the device under test generated from the device under test and detects a phase difference between the operational clock signal and the rate signal using the rate signal as a standard, a test signal generating section that generates a test signal to be supplied to the device under test in synchronization with the rate signal, a delaying section that delays the test signal in accordance with the phase difference to substantially synchronize the delayed signal with the operational clock signal, and a test signal supplying section that supplies the delayed test signal to the device under test.
摘要翻译：测试设备测试被测设备。该测试装置包括周期发生器，该周期发生器根据被测器件的工作周期产生确定测试周期的速率信号;相位比较部分，输入从被测器件产生的被测器件的操作时钟信号，并检测使用速率信号作为标准的操作时钟信号和速率信号之间的相位差;测试信号生成部，其生成与速率信号同步地提供给被测设备的测试信号;延迟部，其延迟所述测试信号根据所述相位差使所述延迟信号与所述操作时钟信号基本上同步;以及测试信号提供部分，其将所述延迟的测试信号提供给被测器件。

28. 发明授权

US07725794B2 Instruction address generation for test apparatus and electrical device 有权
标题翻译：用于测试设备和电气设备的指令地址生成
公开(公告)号：US07725794B2
公开(公告)日：2010-05-25
申请号：US11689483
申请日：2007-03-21
申请人： Tatsuya Yamada
发明人： Tatsuya Yamada
IPC分类号： G06F11/00 , G06F13/00
CPC分类号： G01R31/31919 , G01R31/31813
摘要： There is provided a test apparatus that tests a device under test. The test apparatus includes a main memory that stores a test instruction stream determining a test sequence for testing the device under test, a sequence cache memory that caches the test instruction stream, a transfer section that reads the test instruction stream stored on the main memory and writes the read stream into the sequence cache memory in accordance with a described sequence, a pattern generating section that sequentially reads and executes instructions from the test instruction stream cached on the sequence cache memory and outputs a test pattern corresponding to the executed instruction, and a test signal output section that generates a test signal according to the test pattern and supplies the generated signal to the device under test, in which the transfer section overwrites the instruction read from the main memory on a space area on the sequence cache memory or an area on which executed instructions are stored and prohibits overwriting the read instruction on an area on which instructions in a predetermined range is stored, the instructions being located in the predetermined range forward from a final instruction among the executed instructions according to the described sequence.
摘要翻译：提供了测试被测设备的测试装置。该测试装置包括：主存储器，存储确定用于测试被测设备的测试序列的测试指令流;缓存测试指令流的顺序高速缓存存储器;读取存储在主存储器上的测试指令流的传送部分;以及根据所描述的顺序将读取流写入序列高速缓存存储器，模式生成部分，其顺序地从缓存在序列高速缓冲存储器上的测试指令流读取并执行指令，并输出与执行的指令相对应的测试模式，测试信号输出部分，其根据测试模式产生测试信号，并将生成的信号提供给被测器件，其中传输部分在序列高速缓存存储器上的空间区域上覆盖从主存储器读取的指令，在其上存储执行的指令，并禁止覆盖区域上的读取指令在预定范围内存储指令的情况下，根据所描述的顺序，指令位于执行指令中的最终指令之前的预定范围内。

29. 发明授权

US07716541B2 Test apparatus and electronic device for generating test signal to a device under test 有权
标题翻译：用于向被测设备产生测试信号的测试设备和电子设备
公开(公告)号：US07716541B2
公开(公告)日：2010-05-11
申请号：US11688879
申请日：2007-03-21
申请人： Tatsuya Yamada
发明人： Tatsuya Yamada
IPC分类号： G06F11/00 , G11C29/00
CPC分类号： G01R31/31919 , G01R31/31813
摘要： A test apparatus is provided. The test apparatus includes: a main memory that stores pattern data including at least one pattern bit defining a test signal provided to each of a plurality of terminals of the device under test; a pattern cache memory that caches the pattern data read from the main memory; a pattern generation control section that reads pattern data from the main memory and writes the same to the pattern cache memory; a pattern generating section that sequentially reads the pattern data stored in each cache entry of the pattern cache memory and outputs the same; and a channel circuit that generates a test signal corresponding to each of the plurality of terminals based on the pattern data outputted from the pattern generating section and provides the same to the device under test.
摘要翻译：提供了一种测试装置。测试装置包括：主存储器，其存储包括至少一个模式位的模式数据，所述模式位定义提供给被测设备的多个终端中的每个终端的测试信号; 模式缓存存储器，其缓存从主存储器读取的模式数据; 图案生成控制部，从主存储器读取图案数据，并将其写入图案高速缓冲存储器; 图案生成部，顺序读取存储在图案高速缓冲存储器的各高速缓存条目中的图案数据，并输出; 以及通道电路，其基于从图案生成部输出的图案数据生成与多个终端中的每一个对应的测试信号，并将其提供给被测设备。

30. 发明申请

US20090328038A1 Computer System and Device Controlling Method for Computer System 审中-公开
标题翻译：计算机系统与计算机系统设备控制方法
公开(公告)号：US20090328038A1
公开(公告)日：2009-12-31
申请号：US12485673
申请日：2009-06-16
申请人： Tatsuya Yamada , Hiroshi Nakajima
发明人： Tatsuya Yamada , Hiroshi Nakajima
IPC分类号： G06F9/455 , G06F15/16
CPC分类号： G06F9/5077 , G06F9/4856
摘要： According to one embodiment, a computer system configured such that a virtual machine including a guest operating system running on a source computer connected to a network migrates to a destination computer connected to the network, where the virtual machine then running on the destination computer wherein, the source computer comprises first hardware, a first backend driver running in a first hypervisor running on the first hardware, and configured to directly control the device in association with communication performed via a first interface, the virtual machine comprises a frontend driver configured to run in the guest operating system, and to control the device, the destination computer comprises second hardware, the second hypervisor running on the second hardware, and to manage the virtual machine, and a second backend driver configured to run in the second hypervisor and including a second interface which is the same as the first interface.
摘要翻译：根据一个实施例，一种计算机系统被配置为使得包括在连接到网络的源计算机上运行的客户操作系统的虚拟机迁移到连接到网络的目的地计算机，然后虚拟机在目的地计算机上运行，源计算机包括第一硬件，第一后端驱动器，其运行在第一硬件上运行的第一虚拟机管理程序中，并且被配置为与经由第一接口执行的通信相关联地直接控制所述设备，所述虚拟机包括配置为在客户操作系统，并且为了控制设备，目的地计算机包括第二硬件，在第二硬件上运行的第二管理程序，以及管理虚拟机，以及第二后端驱动器，被配置为在第二管理程序中运行，并且包括第二硬件接口与第一个接口相同。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式