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31. 发明授权

US08860647B2 Liquid crystal display apparatus and source driving circuit thereof 有权
标题翻译：液晶显示装置及其源极驱动电路
公开(公告)号：US08860647B2
公开(公告)日：2014-10-14
申请号：US13798714
申请日：2013-03-13
申请人： ILI Technology Corporation
发明人： Sung-Yau Yeh , Chin-Kang Cheng , Bing-Hung Chen
IPC分类号： G09G3/36
CPC分类号： G09G3/36 , G09G3/3611 , G09G3/3685 , G09G2330/021 , G09G2370/14
摘要： A liquid crystal display apparatus includes a liquid crystal panel and a panel driving device. The panel driving device includes a timing control circuit, a gate driving circuit, and a source driving circuit. The source driving circuit includes a low voltage differential signal (LVDS) receiver, a driving voltage generator, and a controller. The LVDS receiver includes a plurality of receive circuits and a power saving control circuit. Each of the receive circuit performs level conversion upon a data LVDS to generate a logic signal, and operates in a selected one of a normal energy consuming mode and a power saving mode. The power saving control circuit controls the receive circuits to operate in the power saving mode when the power saving control circuit does not receive a power adjustment signal from the controller.
摘要翻译：液晶显示装置包括液晶面板和面板驱动装置。面板驱动装置包括定时控制电路，栅极驱动电路和源极驱动电路。源极驱动电路包括低电压差分信号（LVDS）接收器，驱动电压发生器和控制器。 LVDS接收机包括多个接收电路和省电控制电路。每个接收电路根据数据LVDS执行电平转换以产生逻辑信号，并且以正常能量消耗模式和省电模式中的所选择的一个操作。当省电控制电路没有从控制器接收到功率调节信号时，省电控制电路控制接收电路在省电模式下工作。

32. 发明申请

US20140270515A1 IMAGE PROCESSING METHOD 有权
标题翻译：图像处理方法
公开(公告)号：US20140270515A1
公开(公告)日：2014-09-18
申请号：US13831024
申请日：2013-03-14
申请人： ILI TECHNOLOGY CORPORATION
发明人： Tsung-Hsi CHIANG , Ching-Fang HSIAO
IPC分类号： G06T5/00
CPC分类号： H04N1/6075 , H04N1/6005
摘要： An image processing method is adapted for hue adjustment of an original image pixel. The original image pixel is composed of a plurality of pixel components each having a component value. The image processing method includes: determining a hue zone to which the original image pixel belongs based directly on the component values of the pixel components thereof; obtaining a shifted hue zone according to a predefined hue shift amount, the determined hue zone, and the component values of the pixel components of the original image pixel; and obtaining a hue shifted pixel according to the obtained shifted hue zone, and the component values of the pixel components of the original image pixel.
摘要翻译：图像处理方法适用于原始图像像素的色调调整。原始图像像素由具有分量值的多个像素分量组成。图像处理方法包括：基于其像素分量的分量值，直接确定原始图像像素所属于的色相区域; 根据预定的色调偏移量，所确定的色相区域和原始图像像素的像素分量的分量值获得偏移的色调区域; 以及根据获得的偏移色调区域以及原始图像像素的像素分量的分量值获得色调偏移的像素。

33. 发明授权

US08519993B2 Dual voltage output circuit 有权
标题翻译：双电压输出电路
公开(公告)号：US08519993B2
公开(公告)日：2013-08-27
申请号：US12802070
申请日：2010-05-27
申请人： Sung-Yau Yeh , Wen-Chi Wu
发明人： Sung-Yau Yeh , Wen-Chi Wu
IPC分类号： G09G5/00
CPC分类号： H02J1/00 , Y10T307/406
摘要： A dual voltage output circuit includes first and second differential driving units. The first differential driving unit is operable to generate a first output voltage from a pair of first input voltages, has first and second nodes to receive first and second voltage levels, respectively, and has a first intermediate voltage node to receive a first intermediate voltage level. The second differential driving unit is operable to generate a second output voltage from a pair of second input voltages, has third and fourth nodes to receive the first and second voltage levels, respectively, and has a second intermediate voltage node to receive a second intermediate voltage level.
摘要翻译：双电压输出电路包括第一和第二差分驱动单元。第一差分驱动单元可操作以从一对第一输入电压产生第一输出电压，具有分别接收第一和第二电压电平的第一和第二节点，并且具有第一中间电压节点以接收第一中间电压电平。第二差分驱动单元可操作以从一对第二输入电压产生第二输出电压，具有分别接收第一和第二电压电平的第三和第四节点，并且具有第二中间电压节点以接收第二中间电压水平。

34. 发明申请

US20120044021A1 DIFFERENTIAL AMPLIFIER CIRCUIT 有权
标题翻译：差分放大器电路
公开(公告)号：US20120044021A1
公开(公告)日：2012-02-23
申请号：US12975824
申请日：2010-12-22
申请人： Sung-Yau Yeh , Kuo-Jen Hsu
发明人： Sung-Yau Yeh , Kuo-Jen Hsu
IPC分类号： H03F3/45
CPC分类号： H03F3/45219 , H03F1/0205 , H03F3/3028 , H03F2200/297 , H03F2203/30021
摘要： A differential amplifier circuit includes: P-type and N-type differential input units outputting respectively first and second outputs in response to first and second input voltages; a P-type current mirror circuit driven by the second output; an N-type current mirror circuit driven by the first output; an output unit outputting an output voltage in response to control outputs from the P-type and N-type current mirror circuits; a first sub-current source including first and second P-type transistors connected in series; and a second sub-current source including first and second N-type transistors connected in series. Control ends of the second P-type and second N-type transistors receive the control outputs from the P-type and N-type current mirror circuits, respectively. Control ends of the first P-type and first N-type transistors are coupled to a common node between the first and second P-type transistors, and a common node between the first and second N-type transistors, respectively.
摘要翻译：差分放大电路包括：P型和N型差分输入单元，响应于第一和第二输入电压分别输出第一和第二输出; 由第二输出驱动的P型电流镜电路; 由第一输出驱动的N型电流镜电路; 输出单元响应于来自P型和N型电流镜电路的控制输出而输出输出电压; 包括串联连接的第一和第二P型晶体管的第一子电流源; 以及包括串联连接的第一和第二N型晶体管的第二子电流源。第二P型和第二N型晶体管的控制端分别从P型和N型电流镜电路接收控制输出。第一P型和第N型晶体管的控制端分别耦合到第一和第二P型晶体管之间的公共节点，以及第一和第二N型晶体管之间的公共节点。

35. 发明授权

US07782287B2 Data accessing interface having multiplex output module and sequential input module between memory and source to save routing space and power and related method thereof 有权
标题翻译：数据访问接口具有多路复用输出模块和存储器与源之间的顺序输入模块，以节省路由空间和功率及其相关方法
公开(公告)号：US07782287B2
公开(公告)日：2010-08-24
申请号：US11552513
申请日：2006-10-24
申请人： Ching-Fang Hsiao
发明人： Ching-Fang Hsiao
IPC分类号： G09G3/36
CPC分类号： G09G3/3688 , G09G2310/0297
摘要： A data accessing interface between memory and source in LCD display IC includes a multiplex output module and a sequential input module. Suppose a row width of the memory is N bit. The multiplex output module is for outputting a row N-bit digital data. The multiplex output module includes a buffer for receiving the row N-bit digital data from the memory; and a multiplex unit for continuously selecting M bits from the N bit digital data to output to source. After N/M times, all of the row N bit digital data will be output to source. The sequential input module includes N latches and N/M latch control signals; when each latch control signal is active, it will latch M bit digital data from the multiplex output into M latches. After N/M latch control signals are active sequentially, the N bit digital data are stored into the N latches for source.
摘要翻译： LCD显示IC中的存储器和源极之间的数据访问接口包括多路输出模块和顺序输入模块。假设存储器的行宽为N位。复用输出模块用于输出行N位数字数据。复用输出模块包括用于从存储器接收行N位数字数据的缓冲器; 以及用于从N位数字数据连续选择M位以输出到源的多路复用单元。 N / M次后，所有行N位数字数据都将输出到源。顺序输入模块包括N个锁存器和N / M个锁存器控制信号; 当每个锁存器控制信号有效时，它将M位数字数据从多路复用输出锁存到M个锁存器中。 N / M锁存控制信号顺序激活后，N位数字数据存储在N个锁存器中作为源。

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