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31. 发明授权

US08787099B2 Adjusting access times to memory cells based on characterized word-line delay and gate delay 有权
标题翻译：根据特征字延迟和门延迟调整存储单元的访问时间
公开(公告)号：US08787099B2
公开(公告)日：2014-07-22
申请号：US13527743
申请日：2012-06-20
申请人： Donald Albert Evans , Rasoju Veerabadra Chary , Bijan Kumar Ghosh , Richard John Stephani , Christopher David Sonnek
发明人： Donald Albert Evans , Rasoju Veerabadra Chary , Bijan Kumar Ghosh , Richard John Stephani , Christopher David Sonnek
IPC分类号： G11C7/00
CPC分类号： G11C8/08 , G11C7/04 , G11C8/18 , G11C11/418
摘要： A memory tracking circuit activates a reset signal that resets a word-line pulse generator to switch the memory from an access state to a recess state. Activation is based on (i) a signal received at the far end of a tracking row after a propagation delay and (ii) a signal applied to a transistor-based gate delay. If the memory is in a fast PVT condition such that the gate delay is of less duration than, or substantially equal to, the propagation delay, then a slow-down circuit delays activation of the reset signal to allow sufficient access margin. The delay in the latter case is less than that in the former case. If the memory is in a slow PVT condition such that the gate delay is longer than the propagation delay, then the slow-down circuit does not delay activation of the reset signal to prevent excess access margin.
摘要翻译：存储器跟踪电路激活复位信号，其复位字线脉冲发生器以将存储器从访问状态切换到凹陷状态。激活基于（i）在传播延迟之后在跟踪行的远端处接收到的信号，以及（ii）施加到基于晶体管的门延迟的信号。如果存储器处于快速PVT状态，使得门延迟的持续时间小于或基本上等于传播延迟，则减速电路延迟复位信号的激活以允许足够的存取余量。后一种情况的延误小于前一种情况。如果存储器处于缓慢的PVT条件，使得门延迟比传播延迟更长，则减速电路不延迟复位信号的激活以防止多余的存取余量。

32. 发明授权

US08782504B2 Trend-analysis scheme for reliably reading data values from memory 有权
标题翻译：用于从内存中可靠地读取数据值的趋势分析方案
公开(公告)号：US08782504B2
公开(公告)日：2014-07-15
申请号：US13444186
申请日：2012-04-11
申请人： Santosh Narayanan , Benzeer Bava Arackal Pazhayakath , Vishal Deep Ajmera , Sandesh Kadirudyavara Ven Gowda
发明人： Santosh Narayanan , Benzeer Bava Arackal Pazhayakath , Vishal Deep Ajmera , Sandesh Kadirudyavara Ven Gowda
IPC分类号： G06F11/10 , H03M13/00 , G06F11/00 , G08C25/00 , H04L1/00
CPC分类号： G06F11/1004 , H03M13/09
摘要： In one embodiment, a scheme for reliably reading data values, such as rapidly-changing counter values, from a memory location. Instead of performing a single read operation, a set of N consecutive read operations is performed to obtain a set of N samples. Since, for counter values and the like, the frequency of occurrence of out-of-sequence values is relatively low, it is expected that a majority of the N samples will be in sequence. Of these N samples, the largest subset of monotonically-increasing values is selected. The median value of this subset of monotonically non-decreasing values is returned as a reliable result of the read operation.
摘要翻译：在一个实施例中，用于从存储器位置可靠地读取诸如快速变化的计数器值的数据值的方案。代替执行单个读取操作，执行一组N个连续读取操作以获得一组N个采样。由于对于计数器值等，失序值的出现频率相对较低，因此预期N个样本中的大部分将依次排列。在这N个样本中，选择单调递增值的最大子集。作为读取操作的可靠结果，返回该单个非递减值子集的中值。

33. 发明授权

US08774197B2 Line-timing in packet-based networks 有权
标题翻译：基于分组的网络中的线路定时
公开(公告)号：US08774197B2
公开(公告)日：2014-07-08
申请号：US13462927
申请日：2012-05-03
申请人： P. Stephan Bedrosian
发明人： P. Stephan Bedrosian
IPC分类号： H04L12/56
CPC分类号： H04J3/0658 , H04J3/0641 , H04W92/12 , H04W92/14
摘要： In a packet-based (e.g., Ethernet) network, such as the network of central offices and base stations of a wireless telephone system, a node receives one or more incoming packet-based signals from one or more other nodes of the network and recovers a clock signal from each incoming packet-based signal. The node selects one of the recovered clock signals as the node's reference clock signal. When the node is part of a base station, the node uses the selected clock to generate and transmit one or more outgoing packet-based signals to one or more central offices. The node also uses the selected clock to generate the base station's wireless transmissions. In one implementation, the base stations and central offices are connected by Ethernet facilities.
摘要翻译：在基于分组的（例如，以太网）网络中，诸如中心局的网络和无线电话系统的基站，节点从网络的一个或多个其他节点接收一个或多个基于分组的信号，并且恢复来自每个进入的基于分组的信号的时钟信号。节点选择一个恢复的时钟信号作为节点的参考时钟信号。当节点是基站的一部分时，节点使用所选择的时钟来生成一个或多个输出的基于分组的信号到一个或多个中心局。节点还使用所选择的时钟来生成基站的无线传输。在一个实现中，基站和中心局通过以太网设备连接。

34. 发明授权

US08773942B2 Segmented memory having power-saving mode 失效
标题翻译：具有省电模式的分段存储器
公开(公告)号：US08773942B2
公开(公告)日：2014-07-08
申请号：US13664772
申请日：2012-10-31
申请人： LSI Corporation
发明人： Richard J. Stephani , Gordon W. Priebe , Ankur Goel
IPC分类号： G11C8/00 , G11C8/08 , G11C8/10
CPC分类号： G11C8/08 , G11C8/10 , G11C8/12 , G11C8/18
摘要： A memory array is divided into multiple segments, each segment having one or more rows of bitcells. Each segment has control circuitry that controls whether the segment is in an active mode or a power-saving, sleep mode. The control circuitry ensures that a segment transitions from sleep mode to active mode before a row of the segment is accessed by driving a corresponding wordline high. The control circuitry also ensures that, at the end of a row access, the wordline is driven low before the corresponding segment is transitioned from active mode to sleep mode.
摘要翻译：存储器阵列被分成多个段，每个段具有一行或多行位单元。每个段具有控制电路，其控制该段是处于活动模式还是省电睡眠模式。控制电路确保在通过驱动相应的字线高电平访问该段的行之前，段从睡眠模式转换到活动模式。控制电路还确保在行访问结束时，在相应段从主动模式转换到睡眠模式之前，字线被驱动为低电平。

35. 发明授权

US08761916B2 High-performance tone detection using a digital signal processor (DSP) having multiple arithmetic logic units (ALUs) 失效
标题翻译：使用具有多个算术逻辑单元（ALU）的数字信号处理器（DSP）的高性能音调检测
公开(公告)号：US08761916B2
公开(公告)日：2014-06-24
申请号：US13124474
申请日：2009-05-28
申请人： Aleksey Alexandrovich Letunovskiy , Ilya Viktorovich Lyalin , Alexander Markovic , Ivan Leonidovich Mazurenko , Andrey Anatolevich Nikitin
发明人： Aleksey Alexandrovich Letunovskiy , Ilya Viktorovich Lyalin , Alexander Markovic , Ivan Leonidovich Mazurenko , Andrey Anatolevich Nikitin
IPC分类号： G06F17/00
CPC分类号： H04Q1/453 , G10L25/90
摘要： In one embodiment, a DSP having four arithmetic logic units (ALUs) and able to have two read/write operations per clock cycle performs silence detection and tone detection for data frames containing samples of an audio signal. The ALUs are used together in parallel to process the samples in the data frames received by the DSP. A received data frame is filtered by the silence detection so that substantially silent frames are dropped and non-silent frames are further processed. In the tone detection, a filtered data frame is processed, four samples at a time, to determine the power of the signal at a given frequency, where the power determination is used to determine whether a given tone (i.e., a signal at a given frequency) is present in the data frame.
摘要翻译：在一个实施例中，具有四个算术逻辑单元（ALU）并且能够在每个时钟周期中具有两个读/写操作的DSP对包含音频信号的样本的数据帧执行静音检测和音调检测。 ALU并行使用，以处理由DSP接收的数据帧中的样本。接收到的数据帧通过静音检测进行过滤，使得基本静默的帧被丢弃，非静音帧被进一步处理。在音调检测中，处理滤波后的数据帧，一次四个采样，以确定给定频率处的信号功率，其中功率确定用于确定给定的音调（即，给定的信号频率）存在于数据帧中。

36. 发明授权

US08736332B2 Leakage current reduction in a sequential circuit 有权
标题翻译：顺序电路漏电流减少
公开(公告)号：US08736332B2
公开(公告)日：2014-05-27
申请号：US12640004
申请日：2009-12-17
申请人： Srinivas Sriadibhatla
发明人： Srinivas Sriadibhatla
IPC分类号： H03K3/00 , H03K3/012
CPC分类号： H03K3/012 , H03K19/0008
摘要： A system and device for reducing leakage current in a sequential circuit is disclosed. In one embodiment, a system for reducing leakage current in a sequential circuit includes a combinational logic circuit, one or more reset flip-flops coupled to the combinational logic circuit, and one or more set-reset flip-flops coupled to the combinational logic circuit. The system further includes a control module coupled to the reset flip-flops and to the set flip-flops and configured to reset the reset flip-flops and to set the set-reset flip-flops when a standby mode of the sequential circuit is triggered.
摘要翻译：公开了一种用于减少顺序电路中的漏电流的系统和装置。在一个实施例中，用于减少顺序电路中的漏电流的系统包括组合逻辑电路，耦合到组合逻辑电路的一个或多个复位触发器以及耦合到组合逻辑电路的一个或多个设置复位触发器。该系统还包括耦合到复位触发器和设置触发器的控制模块，并且被配置为当触发顺序电路的待机模式被触发时复位复位触发器和设置置位触发器。

37. 发明授权

US08732868B2 Helmet and/or a helmet liner with at least one internal flexibility sipe with an attachment to control and absorb the impact of torsional or shear forces 有权
标题翻译：头盔和/或具有至少一个具有附件的内部柔性咀嚼物的头盔衬里以控制和吸收扭转或剪切力的冲击
公开(公告)号：US08732868B2
公开(公告)日：2014-05-27
申请号：US13765413
申请日：2013-02-12
申请人： Frampton E. Ellis
发明人： Frampton E. Ellis
IPC分类号： A42B3/00 , A42B3/10
CPC分类号： A43B13/141 , A42B3/12 , A42B3/121 , A42B3/125 , A43B3/0005 , A43B7/1425 , A43B7/1435 , A43B7/144 , A43B7/1445 , A43B7/32 , A43B13/04 , A43B13/14 , A43B13/181 , A43B13/186 , A43B13/187 , A43B13/189 , A43B13/20 , A43B23/027 , A43B23/0285 , A43B23/029 , B32B3/266 , B32B3/30 , F16F7/00 , Y10T428/24331 , Y10T428/24562 , Y10T428/2933
摘要： A helmet and/or helmet liner having one or more internal flexibility sipes for controlling and absorbing the impact of torsional or shear forces, including, for example, at least a first bladder, chamber, or compartment having an inner surface; a second bladder, chamber, or compartment having at least one cavity or void that at least partially encloses at least one gas, and an outer surface located in the first bladder, chamber, or compartment, as viewed in a cross-section, and at least one internal sipe, which is defined by a portion of the inner surface of the first bladder, chamber, or compartment and a portion of the outer surface of the second bladder, chamber, or compartment. The surface portions defining the internal sipe oppose each other and are configured to be movable relative to each other in a sliding motion and have at least one centrally located attachment between the surface portions.
摘要翻译：一种头盔和/或头盔衬套，其具有一个或多个内部柔性刀槽花纹，用于控制和吸收扭转或剪切力的冲击，包括例如具有内表面的至少第一囊，室或隔室; 具有至少部分地包围至少一种气体的至少一个腔或空隙的第二囊，腔或隔室，以及位于第一囊，室或隔室中的外表面，如在横截面中所示，至少一个内部刀槽花纹，其由第一囊，内腔或隔室的内表面的一部分和第二囊，腔或隔室的外表面的一部分限定。限定内部刀槽花纹的表面部分彼此相对并且被构造成能够以滑动运动相对于彼此移动，并且在表面部分之间具有至少一个居中定位的附件。

38. 发明授权

US08725440B2 Method and apparatus for processing a motor signal, having current ripple, of a DC motor 有权
标题翻译：用于处理具有电流纹波的电动机信号的直流电动机的方法和装置
公开(公告)号：US08725440B2
公开(公告)日：2014-05-13
申请号：US13061765
申请日：2009-08-18
申请人： Jovan Knezevic , Wolfgang Uebel , Thorsten Fuchs , Detlef Russ , Stefan Diestler
发明人： Jovan Knezevic , Wolfgang Uebel , Thorsten Fuchs , Detlef Russ , Stefan Diestler
IPC分类号： G01R25/00 , G01R27/00 , G01R15/00 , G05F1/10 , H02P7/288
CPC分类号： H02P7/2805 , G01P3/44 , G01P3/48 , H02P7/0094 , H02P7/2913
摘要： In order to process a motor signal (Ia, Um) of a DC motor (4), in particular of an adjustment drive of a motor vehicle, the armature current (Ia) and the motor voltage (Um) of the DC motor (4) are detected and used for determining the back-emf (E) of the DC motor (4), wherein the determined back-emf (E) is used to generate a useful signal (Sf, SEFL), which is in particular speed-proportional, from the armature current signal (Ia) for position sensing or for evaluating an excess force limitation.
摘要翻译：为了处理直流电动机（4）的电动机信号（Ia，Um），特别是机动车的调整驱动，直流电动机（4）的电枢电流（Ia）和电动机电压（Um））被检测并用于确定DC电动机（4）的反电动势（E），其中所确定的反电动势（E）用于产生有用信号（Sf，SEFL），其特别是速度 - 与电枢电流信号（Ia）成比例，用于位置检测或用于评估过大的力限制。

39. 发明授权

US08715575B2 Lead-free piezoelectric ceramic films and a method for making thereof 失效
标题翻译：无铅压电陶瓷膜及其制造方法
公开(公告)号：US08715575B2
公开(公告)日：2014-05-06
申请号：US13927962
申请日：2013-06-26
申请人： Wei-Heng Shih , Wan Y. Shih , Huidong Li
发明人： Wei-Heng Shih , Wan Y. Shih , Huidong Li
IPC分类号： G01N15/00
CPC分类号： G01N27/12 , H01L41/1873 , H01L41/314 , H01L41/43
摘要： This invention relates to a method of making lead-free piezoelectric ceramic films. Specifically, the invention is directed to a method for fabricating lead-free piezoelectric free standing films having enhanced piezoelectric properties. The films may be used for a number of applications including incorporation in microelectronic devices such as energy harvesting devices and sensor technologies.
摘要翻译：本发明涉及一种制造无铅压电陶瓷膜的方法。具体地，本发明涉及一种制造具有增强的压电性能的无铅压电自立式膜的方法。这些膜可以用于许多应用，包括并入诸如能量收集装置和传感器技术的微电子器件中。

40. 发明授权

US08711976B2 Pre-distortion architecture for compensating non-linear effects 有权
标题翻译：用于补偿非线性效应的预失真架构
公开(公告)号：US08711976B2
公开(公告)日：2014-04-29
申请号：US13398088
申请日：2012-02-16
申请人： Rajiv Chandrasekaran
发明人： Rajiv Chandrasekaran
IPC分类号： H04K1/02 , H04L25/03 , H04L25/49
CPC分类号： H03F3/24 , H03F1/3247 , H03F1/3294 , H03F3/195 , H03F2200/336 , H03F2200/451 , H03F2201/3212 , H03F2201/3233 , H04L27/368
摘要： An input signal is pre-distorted to reduce distortion resulting from subsequent signal amplification. Frequency-dependent pre-distortion is preferably implemented in combination with frequency-independent pre-distortion, where the frequency-dependent pre-distortion is generated by expanding the derivative of a product of a pre-distortion function and the input signal and then relaxing constraints on the pre-distortion function and/or on frequency-dependent filtering associated with the frequency-dependent pre-distortion. In one implementation, four different frequency-dependent pre-distortion signals are generated for the expansion using up to four different pre-distortion functions and up to four different frequency-dependent filters.
摘要翻译：输入信号是预失真的，以减少后续信号放大产生的失真。频率相关的预失真优选地与频率无关的预失真结合实现，其中通过扩展预失真函数和输入信号的乘积的导数然后放宽约束来产生与频率相关的预失真关于预失真功能和/或与频率相关的预失真相关联的频率依赖滤波。在一个实施方案中，使用最多四个不同的预失真功能和多达四个不同的频率相关滤波器来生成用于扩展的四个不同的频率相关的预失真信号。

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