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31. 发明公开

US20230371384A1 PRESSURE SENSOR BASED ON ZINC OXIDE NANOWIRES AND METHOD OF MANUFACTURING PRESSURE SENSOR 审中-公开
公开(公告)号：US20230371384A1
公开(公告)日：2023-11-16
申请号：US18250742
申请日：2020-10-26
申请人： INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES
发明人： Ling Li , Xuewen Shi , Nianduan Lu , Congyan Lu , Di Geng , Xinlv Duan , Ming Liu
IPC分类号： H10N30/074 , G01L1/16 , H10N30/067
CPC分类号： H10N30/074 , G01L1/16 , H10N30/067
摘要： A pressure sensor based on zinc oxide nanowires and a method of manufacturing a pressure sensor based on zinc oxide nanowires are provided. The manufacturing method includes: manufacturing a bottom electrode on a substrate; manufacturing a seed layer on the bottom electrode; manufacturing a zinc oxide nanowire layer on the seed layer; manufacturing a support layer on the zinc oxide nanowire layer; and manufacturing a top electrode on the support layer.

32. 发明公开

US20230325337A1 DATA TRANSMISSION DEVICE AND METHOD 审中-公开
公开(公告)号：US20230325337A1
公开(公告)日：2023-10-12
申请号：US18043479
申请日：2020-08-28
申请人： Institute of Microelectronics, Chinese Academy of Sciences
发明人： Chong Bi , Ming Liu
IPC分类号： G06F13/40
CPC分类号： G06F13/4063
摘要： Provided are a data transmission device and a data transmission method, which are applied to a field of an information technology. The data transmission device includes: a signal conversion module (30) and a signal transmission module (20), wherein the signal conversion module (30) is configured to convert, at a data transmitting end, an electrical signal containing a data information into a magnon signal containing the data information; the signal transmission module (20) is configured to transmit the magnon signal containing the data information to a data receiving end; and the signal conversion module (30) is further configured to convert, at the data receiving end, the magnon signal containing the data information into the electrical signal containing the data information. The data transmission method includes transmitting the data by using the magnon signal, and no voltage or current is required in a process of transmitting the data.

33. 发明申请

US20210295143A1 NEURON CIRCUIT AND NEURAL NETWORK CIRCUIT 有权
公开(公告)号：US20210295143A1
公开(公告)日：2021-09-23
申请号：US17250569
申请日：2018-08-07
申请人： Institute of Microelectronics, Chinese Academy of Sciences
发明人： Qi Liu , Xumeng Zhang , Ming Liu , Hangbing Lv , Shibing Long
IPC分类号： G06N3/063 , G06N3/08
摘要： A neuron circuit (100), including a memristive element (M1), a trigger element (D1), a feedback element (T1) and an AND circuit (A1). The memristive element (M1) is used to receive an excitation signal. The trigger element (D1) is connected to the memristive element (M1) and is used to receive a clock control signal for the neuron circuit and an output signal of the memristive element (M1). The feedback element (T1) is connected to an output end of the trigger element (D1) and an input end of the memristive element (M1) and is used to control a voltage at the input end of the memristive element (M1). The AND circuit (A1) is used to perform an AND operation on an output signal of the trigger element (D1) and the clock control signal. An output signal of the AND circuit (A1) acts as an output signal of the neuron circuit (100).

34. 发明授权

US10964529B2 Method for cleaning lanthanum gallium silicate wafer 有权
公开(公告)号：US10964529B2
公开(公告)日：2021-03-30
申请号：US15300925
申请日：2014-04-17
申请人： Institute of Microelectronics, Chinese Academy of Sciences
发明人： Dongmei Li , Lei Zhou , Shengfa Liang , Xiaojing Li , Hao Zhang , Changqing Xie , Ming Liu
IPC分类号： H01L21/02 , B08B3/12 , C11D11/00 , C11D7/06 , C11D7/08 , C11D3/39 , C11D7/10
摘要： The present disclosure provides a method for cleaning a lanthanum gallium silicate wafer which comprises the following steps: at a step of 1, a cleaning solution constituted of phosphorous acid, hydrogen peroxide and deionized water is utilized to clean the lanthanum gallium silicate wafer with a megahertz sound wave; at a step of 2, the cleaned lanthanum gallium silicate wafer is rinsed and dried by spinning; at a step of 3, a cleaning solution constituted of ammonia, hydrogen peroxide and deionized water is utilized to clean the lanthanum gallium silicate wafer with the megahertz sound wave; at a step of 4, the cleaned lanthanum gallium silicate wafer is rinsed and dried by spinning; and at a step of 5, the rinsed and dried wafer is placed in an oven to be baked. The present invention shortens a period of acidic cleaning process and prolongs a period of alkaline cleaning and utilizes a more effective cleaning with megahertz sound wave to replace the conventional ultrasonic cleaning to solve the issue of cleaning the lanthanum gallium silicate wafer after a cutting process and to improve surface cleanliness of the lanthanum gallium silicate wafer to get a better cleaning effect.

35. 发明授权

US09762217B2 Random sampler adapted to one-dimension slow-varying signal 有权
公开(公告)号：US09762217B2
公开(公告)日：2017-09-12
申请号：US14888335
申请日：2013-07-15
申请人： INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES
发明人： Dongmei Li , Qing Luo , Shengfa Liang , Hongzhang Yang , Xiaojing Li , Hao Zhang , Changqing Xie , Ming Liu
IPC分类号： H03K4/08 , A61B5/00 , H03K3/84 , H03K4/50
CPC分类号： H03K4/08 , A61B5/00 , H03K3/84 , H03K4/50
摘要： A sampler adapted to a one-dimension slow-varying signal, including: a signal preprocessing unit configured to preprocess an input signal; a slope-controllable sawtooth wave signal generating unit configured to generate a slope-controllable sawtooth wave signal and perform zero-resetting; a signal comparing unit configured to compare the preprocessed input signal from the signal preprocessing unit with the sawtooth wave signal and to output a pulse signal to the generating unit and a signal outputting unit when the preprocessed input signal is equal to the sawtooth wave signal; a counting unit configured to count a number of clock signals while the sawtooth wave signal generating unit is generating the sawtooth wave signal and to transmit the counted number to the signal outputting unit; the signal outputting unit configured to, upon receipt of the pulse signal output from the signal comparing unit, output the number counted by the counting unit at the moment.

36. 发明授权

US09508776B2 Gating device cell for cross array of bipolar resistive memory cells 有权
标题翻译：双极电阻存储器单元交叉阵列的门控器件单元
公开(公告)号：US09508776B2
公开(公告)日：2016-11-29
申请号：US14771145
申请日：2013-09-24
申请人： INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES
发明人： Qi Liu , Ming Liu , Shibing Long , Hangbing Lv , Yan Wang
IPC分类号： H01L27/24 , G11C13/00 , H01L45/00
CPC分类号： H01L27/2463 , G11C13/0007 , G11C13/0023 , G11C13/003 , G11C13/004 , G11C13/0069 , G11C2013/0054 , G11C2013/0073 , G11C2213/15 , H01L27/2409 , H01L45/04 , H01L45/08 , H01L45/124 , H01L45/1253 , H01L45/146 , H01L45/148
摘要： A gating device cell for a cross array of bipolar resistive memory cells comprises an n-p diode and a p-n diode, wherein the n-p diode and the p-n diode have opposite polarities and are connected in parallel, such that the gating device cell exhibits a bidirectional rectification feature. The gating device cell exhibits the bidirectional rectification feature, that is, it can provide a relatively high current density at any voltage polarity in its ON state, and also a relatively great rectification ratio (Rv/2/RV) under a read voltage. Therefore, it is possible to suppress read crosstalk in the cross array of bipolar resistive memory cells to avoid misreading, thereby solving the problem that a conventional rectifier diode is only applicable to a cross array of unipolar resistive memory cells.
摘要翻译：用于双极性电阻式存储单元的交叉阵列的门控器件单元包括np二极管和pn二极管，其中np二极管和pn二极管具有相反的极性并且并联连接，使得门控器件单元呈现双向整流特征。选通装置单元具有双向整流特征，即，其可以在其导通状态下的任何电压极性下提供相对高的电流密度，并且在读取电压下可以提供相对较大的整流比（Rv / 2 / RV）。因此，可以抑制双极电阻存储单元的交叉阵列中的读串扰，以避免误读，从而解决了传统的整流二极管仅可应用于单极性电阻存储单元的交叉阵列的问题。

37. 发明申请

US20160329347A1 VERTICAL CHANNEL-TYPE 3D SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：垂直通道型3D半导体存储器件及其制造方法
公开(公告)号：US20160329347A1
公开(公告)日：2016-11-10
申请号：US15214372
申请日：2016-07-19
申请人： Institute of Microelectronics. Chinese Academy of Sciences
发明人： Zongliang Huo , Ming Liu
IPC分类号： H01L27/115 , H01L21/3213 , H01L29/06 , H01L29/788 , H01L21/324 , H01L21/764 , H01L21/311 , H01L21/28
CPC分类号： H01L27/11582 , H01L21/0217 , H01L21/02181 , H01L21/02532 , H01L21/02546 , H01L21/02592 , H01L21/02595 , H01L21/02667 , H01L21/28273 , H01L21/28282 , H01L21/31111 , H01L21/32133 , H01L21/324 , H01L21/764 , H01L27/11519 , H01L27/11524 , H01L27/11556 , H01L27/11565 , H01L27/1157 , H01L29/04 , H01L29/0649 , H01L29/16 , H01L29/161 , H01L29/20 , H01L29/201 , H01L29/4916 , H01L29/517 , H01L29/518 , H01L29/7883 , H01L29/7889 , H01L29/7926
摘要： A vertical channel-type 3D semiconductor memory device and a method for manufacturing the same are disclosed. In one aspect, the method includes depositing alternating insulating and electrode layers on a substrate to form a multi-layer film. The method further includes etching the film to the substrate to form through-holes, each of which defines a channel region. The method further includes depositing barrier, storage, and tunnel layers in sequence on inner walls of through-holes to form gate stacks. The method further includes depositing and incompletely filling a channel material on a surface of the tunnel layer of gate stacks to form a hollow channels. The method further includes forming drains in contact hole regions for bit-line connection in top portions of the hollow channels. The method further includes forming sources in contact regions between the through-holes and the substrate in bottom portions of the hollow channels.
摘要翻译：公开了一种垂直沟道型3D半导体存储器件及其制造方法。一方面，该方法包括在衬底上沉积交替的绝缘和电极层以形成多层膜。该方法还包括将膜蚀刻到衬底上以形成通孔，每个通孔限定沟道区域。该方法还包括依次在通孔的内壁上沉积屏障，存储和隧道层以形成栅极叠层。该方法还包括在栅极堆叠的隧道层的表面上沉积和不完全填充沟道材料以形成中空通道。该方法还包括在接触孔区域形成用于在中空通道的顶部部分进行位线连接的排水沟。该方法还包括在中空通道的底部中的通孔和基板之间的接触区域中形成源。

38. 发明申请

US20140177039A1 SUB-WAVELENGTH EXTREME ULTRAVIOLET METAL TRANSMISSION GRATING AND MANUFACTURING METHOD THEREOF 有权
标题翻译：亚波长极限超紫外线金属传输光栅及其制造方法
公开(公告)号：US20140177039A1
公开(公告)日：2014-06-26
申请号：US14144222
申请日：2013-12-30
申请人： INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES
发明人： Hailiang Li , Changqing Xie , Ming Liu , Dongmei Li , Lina Shi , Xiaoli Zhu
IPC分类号： G02B5/18
CPC分类号： G02B5/1871 , G02B5/1809 , G02B5/1838 , G02B5/1857 , G02B2005/1804 , G03F7/0757 , G03F7/2059 , G03F7/40
摘要： A method of manufacturing a sub-wavelength extreme ultraviolet metal transmission grating is disclosed. In one aspect, the method comprises forming a silicon nitride self-supporting film window on a back surface of a silicon-based substrate having both surfaces polished, then spin-coating a silicon nitride film on a front surface of the substrate with an electron beam resist HSQ. Then, performing electron beam direct writing exposure on the HSQ, developing and fixing to form a plurality of grating line patterns and a ring pattern surrounding the grating line patterns. Then depositing a chrome material on the front surface of the substrate through magnetron sputtering. Then, removing the chrome material inside the ring pattern. Then, growing a gold material on the front surface of the substrate through atomic layer deposition. Lastly, removing the gold material on the chrome material outside the ring pattern as well as on and between the grating line patterns, thereby only retaining the gold material on sidewalls of the grating line patterns.
摘要翻译：公开了一种制造亚波长极紫外金属透射光栅的方法。在一个方面，该方法包括在硅衬底的背表面上形成氮化硅自支撑膜窗，其两面被抛光，然后用电子束在衬底的前表面上旋涂氮化硅膜抵制HSQ。然后，在HSQ上执行电子束直接写入曝光，显影和固定以形成围绕光栅线图案的多个光栅线图案和环形图案。然后通过磁控溅射在基板的前表面上沉积铬材料。然后，移除环形图案内的铬材料。然后，通过原子层沉积在基板的前表面上生长金材料。最后，除去环形图案之外的铬材料上的金材料以及光栅线图案之间和之间的金材料，从而仅将金材料保留在光栅线图案的侧壁上。

39. 发明公开

US20240005077A1 METHOD OF DESIGNING THIN FILM TRANSISTOR 审中-公开
公开(公告)号：US20240005077A1
公开(公告)日：2024-01-04
申请号：US18250461
申请日：2020-10-30
申请人： Institute of Microelectronics, Chinese Academy of Sciences
发明人： Nianduan Lu , Ling Li , Wenfeng Jiang , Di GENG , Jiawei Wang , Ming Liu
IPC分类号： G06F30/39 , G16C60/00
CPC分类号： G06F30/39 , G16C60/00 , H01L29/786
摘要： A method of designing a thin film transistor device, including: calculating characteristic parameters of searched materials; screening the materials according to a characteristic parameter threshold to obtain first active layer materials; simulating the first active layer material as an active layer material in a thin film transistor device model to obtain a device characteristic of the thin film transistor device; screening the first active layer materials according to a device characteristic threshold to obtain second active layer materials; taking the second active layer material as the active layer material of the thin film transistor device to perform an experiment; and selecting another second active layer material to perform the experiment once again when an experiment result does not meet a preset requirement, and a design of the thin film transistor device is completed until the experiment result meets the preset requirement.

40. 发明公开

US20230397504A1 ALL-ELECTRICALLY-CONTROLLED SPINTRONIC NEURON DEVICE, NEURON CIRCUIT AND NEURAL NETWORK 审中-公开
公开(公告)号：US20230397504A1
公开(公告)日：2023-12-07
申请号：US18249805
申请日：2021-05-17
申请人： Institute of Microelectronics, Chinese Academy of Sciences
发明人： Guozhong Xing , Di Wang , Ming Liu
IPC分类号： H10N52/00 , H10N52/85 , H10N59/00 , G06N3/063
CPC分类号： H10N52/101 , H10N52/85 , H10N59/00 , G06N3/063
摘要： Provided is an all-electrically-controlled spintronic neuron device, a neuron circuit and a neural network. The neuron device includes: a bottom antiferromagnetic pinning layer; a synthetic antiferromagnetic layer formed on the bottom antiferromagnetic pinning layer; a potential barrier layer formed on the ferromagnetic free layer, wherein a region of the ferromagnetic free layer directly opposite to the potential barrier layer forms a threshold region; a ferromagnetic reference layer formed on the potential barrier layer; wherein the potential barrier layer, the ferromagnetic reference layer and the ferromagnetic free layer form a magnetic tunnel junction; a first antiferromagnetic pinning layer and a second antiferromagnetic pinning layer formed on an exposed region of the ferromagnetic free layer except the region directly opposite the potential barrier layer, and located on two sides of the potential barrier layer; and a first electrode formed on the ferromagnetic reference layer.

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