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31. 发明申请

US20180054262A1 DEVICE AND METHOD FOR DETERMINING A DC COMPONENT 审中-公开
公开(公告)号：US20180054262A1
公开(公告)日：2018-02-22
申请号：US15556677
申请日：2016-03-09
申请人： Sony CORPORATION
发明人： Rolf NOETHLINGS , Norihito MIHOTA
IPC分类号： H04B17/10 , G01S13/36 , H04B1/30 , H03D3/00 , H04L25/06 , G01S7/486
CPC分类号： H04B17/104 , G01S7/4861 , G01S13/36 , H03D3/008 , H04B1/30 , H04B2001/305 , H04L25/061
摘要： A device for determining a DC component in a zero-IF radio receiver comprises an input configured to receive a complex baseband signal; and an analyzer configured to analyze the complex baseband signal to determine a DC component in the complex baseband signal by selecting at least three samples of the complex baseband signal and determining the intersection of at least two perpendicular bisectors of at least two straight lines, each straight line running through a different pair of two of said selected samples, said intersection representing the DC component. Further, a corresponding method, a radar device and a radar method are disclosed.

32. 发明申请

US20180034413A1 Messgerät 审中-公开
公开(公告)号：US20180034413A1
公开(公告)日：2018-02-01
申请号：US15660022
申请日：2017-07-26
申请人： Siemens Aktiengesellschaft
发明人： Florian Kirsammer , Hans-Guenther KLEIH , Michael LUDWIG , Guenter MARCAUX
IPC分类号： H03D3/24 , H03D3/00 , H04L27/38 , H04L27/227
CPC分类号： H03D3/24 , G01D3/028 , H03D3/005 , H03D3/007 , H04L27/2273 , H04L27/3809 , H04L2027/0057
摘要： A measuring device in which a non-electrical variable is converted into an electrical measurement signal via an electrical alternating current having a frequency, wherein the measurement signal contains a signal portion dependent on the non-electrical variable and is double the frequency, and a fault signal portion dependent on the alternating current and is at the frequency, where the measurement signal is pre-processed and digitized to generate a digital signal that is detected and processed to generate a measured value proportional to the non-electrical variable and to generate a fault signal value, wherein the fault signal value is utilized to normalize the measured value that is normalized in a normalizing stage, by forming the quotient using the square of the fault signal value, and is output as a normalized measured value.

33. 发明授权

US09853844B2 Circuits and methods for frequency offset estimation in FSK communications 有权
公开(公告)号：US09853844B2
公开(公告)日：2017-12-26
申请号：US15656039
申请日：2017-07-21
申请人： Texas Instruments Incorporated
发明人： Wenxun Qiu , Timothy Mark Schmidl
IPC分类号： H03D3/00 , H04L27/16 , H04L27/14
CPC分类号： H04L27/16 , H04L27/14
摘要： Disclosed embodiments include a receiver having an input that receives a frequency shift key (FSK) signal having a preamble comprising preamble symbols, a phase compensator that applies a compensation vector to one of first and second samples of a first preamble symbol, wherein applying the compensation vector to the one of the first and second samples produces a compensated sample, a demodulator that determines a phase offset between the compensated sample and the other one of the first and second samples of the first preamble symbol, and a frequency offset mapper that determines a frequency offset based at least upon the phase offset. The receiver applies the frequency offset to the FSK signal.

34. 发明申请

US20170302225A1 DIGITAL ISOLATOR 审中-公开
公开(公告)号：US20170302225A1
公开(公告)日：2017-10-19
申请号：US15640168
申请日：2017-06-30
申请人： TEXAS INSTRUMENTS INCORPORATED
发明人： Anant Shankar Kamath , Sreeran N S
IPC分类号： H03D3/00 , H04L25/02
CPC分类号： H03D3/00 , H04L25/0268
摘要： Several circuits and methods for transferring an input data signal in a digital isolator are disclosed. In an embodiment, the digital isolator includes an isolation element, input circuit, and output circuit. The isolation element includes at least one input node and at least one output node, the input circuit is electronically coupled to the input node and generates modulated differential data signals based on modulating the input data signal on a carrier signal. The input circuit operates using a first supply voltage with respect to a first ground. The output circuit is electronically coupled to the output node to receive the modulated differential data signals, operates using a second supply voltage with respect to a second ground and includes a frequency-shift keying demodulator configured to generate a demodulated data signal in response to detection of presence of the carrier signal. The output circuit further generates an output data signal.

35. 发明授权

US09641126B2 Systems and methods for I-Q imbalance calibration 有权
公开(公告)号：US09641126B2
公开(公告)日：2017-05-02
申请号：US14134813
申请日：2013-12-19
申请人： QUALCOMM Incorporated
发明人： Daniel Jose Fernandes Barros
IPC分类号： H04B1/38 , H03D3/00 , H04B7/0413 , H04L27/00 , H04B17/14 , H04B17/21 , H04L27/36 , H04L27/38
CPC分类号： H03D3/009 , H04B1/38 , H04B7/0413 , H04B17/14 , H04B17/21 , H04L27/0014 , H04L27/368 , H04L27/3863 , H04L2027/0067
摘要： A method for in-phase-quadrature (I-Q) imbalance calibration is described. A signal is transmitted by a first transmitter in a first system. The signal includes a constant value. The signal is received at a second receiver in a second system. An I-Q imbalance is estimated for the second receiver based on the received signal.

36. 发明授权

US09484988B2 Power supply device, power receiving device, charging system, and obstacle detection method 有权
标题翻译：电源装置，受电装置，充电系统和障碍物检测方法
公开(公告)号：US09484988B2
公开(公告)日：2016-11-01
申请号：US14378240
申请日：2013-02-08
申请人： Panasonic Corporation
发明人： Satoshi Nakaya , Tsuyoshi Nishio
IPC分类号： H02J7/00 , H04B5/00 , H02J5/00 , H01F38/14 , H03C1/00 , H03C3/00 , H03D1/00 , H03D3/00 , H02J7/02
CPC分类号： H04B5/0037 , H01F38/14 , H02J5/005 , H02J7/025 , H02J50/10 , H02J50/60 , H03C1/00 , H03C3/00 , H03D1/00 , H03D3/00
摘要： Provided are a power supply device, a power receiving device, a charging system, and an obstacle detection method that obtain a sufficient obstacle detection sensitivity even when an obstacle is small. A modulation unit (202) performs amplitude modulation or phase modulation on a test data sequence output from a test data sequence storage unit (201). A power control unit (203) generates, according to an instruction from a determination unit (204), a power control signal for increasing the power level of the test data sequence every time when the test data sequence is transmitted. The determination unit (204) determines whether there is an obstacle between the power receiving device and the power supply device based on whether the test data sequence output from the test data sequence storage unit (201) coincides with the test data sequence output from a power-transmitting-side receiving circuit (124).
摘要翻译：提供即使当障碍物小时也能够获得足够的障碍物检测灵敏度的电源装置，受电装置，充电系统和障碍物检测方法。调制单元（202）对从测试数据序列存储单元（201）输出的测试数据序列进行幅度调制或相位调制。功率控制单元（203）根据来自确定单元（204）的指令产生用于在每次发送测试数据序列时增加测试数据序列的功率电平的功率控制信号。确定单元（204）基于从测试数据序列存储单元（201）输出的测试数据序列是否与从电源输出的测试数据序列一致，确定在电力接收设备和电源设备之间是否存在障碍物 - 发射侧接收电路（124）。

37. 发明授权

US09450537B2 Method and apparatus to detect LO leakage and image rejection using a single transistor 有权
标题翻译：使用单个晶体管检测LO泄漏和图像抑制的方法和装置
公开(公告)号：US09450537B2
公开(公告)日：2016-09-20
申请号：US14467075
申请日：2014-08-25
申请人： Tensorcom, Inc.
发明人： KhongMeng Tham , Huainan Ma , Zaw Soe , Ricky Lap Kei Cheung
IPC分类号： G06G7/12 , H03D3/00 , H03D7/16
CPC分类号： H04B1/0475 , H03C2200/0058 , H03D3/008 , H03D3/009 , H03D7/125 , H03D7/165 , H04B1/04 , H04B1/0458 , H04B2001/0408
摘要： LO leakage and Image are common and undesirable effects in typical transmitters. Typically, thirty complex hardware and algorithms are used to calibrate and reduce these two impairments. A single transistor that draws essentially no de current and occupies a very small area, is used to detect the LO leakage and Image Rejection signals. The single transistor operating as a square law device, is used to mix the signals at the input and output ports of the power amplifier (PA). The mixed signal generated by the single transistor enables the simultaneous calibration of the LO leakage and Image Rejection.
摘要翻译： LO泄漏和图像在典型的发射器中是常见的和不良影响。通常，使用三十个复杂的硬件和算法来校准和减少这两个损伤。基本上没有去电流并占据非常小的面积的单个晶体管用于检测LO泄漏和图像抑制信号。作为平方律器件工作的单个晶体管用于混合功率放大器（PA）输入和输出端口的信号。由单个晶体管产生的混合信号可以同时校准LO泄漏和图像抑制。

38. 发明授权

US09438463B2 System for the correction of amplitude and phase errors of in-quadrature signals, corresponding receiver and method 有权
标题翻译：用于校正正交信号幅度和相位误差的系统，相应的接收机和方法
公开(公告)号：US09438463B2
公开(公告)日：2016-09-06
申请号：US14751339
申请日：2015-06-26
申请人： STMICROELECTRONICS S.R.L.
发明人： Leandro Grasso , Ranieri Guerra , Giuseppe Palmisano
IPC分类号： H04B1/12 , H04L27/38 , G06F17/10 , H04L27/00 , H03D3/00
CPC分类号： H04L27/3836 , G06F17/10 , H03D3/009 , H04L27/0014 , H04L27/3863 , H04L2027/003
摘要： A system may be for the correction of phase and amplitude errors. The system may receive a first input signal and a second input signal and supply a first output signal and a second output signal. The system may include two adders that supply the first and second output signals, respectively. The two adders may be configured for computing a sum of the first and second input signals, and multiplying the weighted sum by a third coefficient. Moreover, the first coefficient or the second coefficient of the first adder may be variable to enable correction of the phase errors, and the third coefficient of the second adder may be variable to enable correction of the amplitude errors.
摘要翻译：系统可以用于相位和振幅误差的校正。系统可以接收第一输入信号和第二输入信号，并提供第一输出信号和第二输出信号。该系统可以包括分别提供第一和第二输出信号的两个加法器。两个加法器可以被配置用于计算第一和第二输入信号的和，并将加权和乘以第三系数。此外，第一加法器的第一系数或第二系数可以是可变的，以使得能够校正相位误差，并且第二加法器的第三系数可以是可变的，以使得校正幅度误差。

39. 发明授权

US09385656B2 Low complexity frequency selective IQ mismatch digital RX balancer and TX inverse balancer for non-ideal RF front-end 有权
标题翻译：低复杂度频率选择性IQ失配数字RX平衡器和TX反平衡器，用于非理想RF前端
公开(公告)号：US09385656B2
公开(公告)日：2016-07-05
申请号：US13294129
申请日：2011-11-10
申请人： Ching-Yih Tseng , Wen-Sheng Cheng
发明人： Ching-Yih Tseng , Wen-Sheng Cheng
IPC分类号： H04B1/38 , H03D3/00 , H04B1/04
CPC分类号： H03D3/009 , H04B1/0475
摘要： A system for reducing a mismatch between an in-phase (I) signal and a quadrature phase (Q) signal is disclosed. The system includes a phase compensation block comprising an infinite impulse response (IIR) filter configured to reduce a first portion of a mismatch between an I signal and a Q signal, wherein the first portion includes frequency selective phase mismatch. The system further includes a gain compensation block comprising a finite impulse response (FIR) filter configured to reduce a second portion of the mismatch, wherein the second portion includes frequency selective gain mismatch. The phase compensation block and the gain compensation block are calibrated at least in part based on a loopback signal, wherein the loopback signal is routed from a transmitting portion of a radio frequency (RF) circuitry back to a receiving portion of the RF circuitry.
摘要翻译：公开了一种用于减小同相（I）信号和正交相位（Q）信号之间的失配的系统。该系统包括相位补偿块，该相位补偿块包括无限脉冲响应（IIR）滤波器，其被配置为减少I信号和Q信号之间的失配的第一部分，其中第一部分包括频率选择相位失配。该系统还包括增益补偿块，其包括被配置为减少失配的第二部分的有限脉冲响应（FIR）滤波器，其中第二部分包括频率选择增益失配。至少部分地基于环回信号校准相位补偿块和增益补偿块，其中环回信号从射频（RF）电路的发射部分路由到RF电路的接收部分。

40. 发明授权

US09306782B2 Systems and methods for narrowband signal quadrature error correction 有权
标题翻译：用于窄带信号正交纠错的系统和方法
公开(公告)号：US09306782B2
公开(公告)日：2016-04-05
申请号：US14657029
申请日：2015-03-13
申请人： Analog Devices, Inc.
发明人： Wei An , Yosef Stein
IPC分类号： H04L27/38 , H04L27/227 , H04L7/00 , H03D3/00
CPC分类号： H04L27/2276 , H03D3/009 , H04L7/0079 , H04L27/3863
摘要： Apparatus and method for quadrature error correction for narrowband or tone signal are disclosed. An analog circuit receives a modulated signal and processes in-phase signal and quadrature-phase signal in in-phase and quadrature-phase signal paths respectively. A digital signal processor performs discrete Fourier transform on each of the in-phase and quadrature-phase signals and determines statistical parameters responsive to mismatch characteristics to estimate quadrature error correction.
摘要翻译：公开了用于窄带或音调信号的正交纠错的装置和方法。模拟电路接收调制信号，分别处理同相和正交相信号路径中的同相信号和正交相位信号。数字信号处理器对每个同相和正交相位信号执行离散傅立叶变换，并且确定响应失配特性的统计参数以估计正交误差校正。

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